CN102645627A - Closed-loop test system for IO (input/output) channel signals of analog board in RTDS (real time digital simulator) - Google Patents
Closed-loop test system for IO (input/output) channel signals of analog board in RTDS (real time digital simulator) Download PDFInfo
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- CN102645627A CN102645627A CN2012100627377A CN201210062737A CN102645627A CN 102645627 A CN102645627 A CN 102645627A CN 2012100627377 A CN2012100627377 A CN 2012100627377A CN 201210062737 A CN201210062737 A CN 201210062737A CN 102645627 A CN102645627 A CN 102645627A
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Abstract
The invention discloses a closed-loop test system for IO (input/output) channel signals of an analog board in an RTDS (real time digital simulator), which comprises an amplitude input module, a frequency input module, a phase input module, a function generator, an analog output element, an analog input element and an oscillographic element, wherein the amplitude input module, the frequency input module and the phase input module are respectively correspondingly connected to amplitude, frequency and phase ports of the function generator, the output end of the function generator is connected with the input end of the analog output element, output signals of the function generator are taken as 12 channels of input signals of the analog output element, an output port of the analog output element is connected with an input port of the analog input element by using a special test busbar of the RTDS, and the oscillographic element is respectively connected with the output end of the function generator and 12 channels of inputs of the analog input element. By using the system disclosed by the invention, no other external oscillographic instrument (recording oscillograph or signal generator) is required to be used; and meanwhile, the system is reliable in implementation method, and simple and quick in operation.
Description
Technical field
The present invention relates to the analog quantity integrated circuit board IO channel signal closed loop test system among a kind of RTDS.
Background technology
Before carrying out RTDS (Real Time Digital Simulator, real-timedigital simulation appearance) l-G simulation test, need the availability of checking R TDS analog quantity integrated circuit board, whether its IO passage can the correct transmission data; In the process of carrying out the RTDS l-G simulation test; Digital quantity IO signalling channel often breaks down; Can't realize the correct transmission of data, need checking R TDS digital quantity integrated circuit board IO passage this moment, judge through test whether RTDS digital quantity integrated circuit board breaks down; And then fix a breakdown, guarantee carrying out smoothly of RTDS l-G simulation test.RTDS digital quantity integrated circuit board (GTAO (analog quantity output) integrated circuit board and GTAI (analog quantity input) integrated circuit board) IO lane testing is extremely important test link of electric system RTDS modeling and simulating test, is the important leverage of electric system RTDS Simulation results correctness.Therefore be necessary to provide a kind of efficient, correct RTDS digital quantity integrated circuit board IO lane testing method.
Therefore, prior art awaits to improve and development.
Summary of the invention
The object of the present invention is to provide the analog quantity integrated circuit board IO channel signal closed loop test system in a kind of real-timedigital simulation system, be intended to solve in the existing RTDS l-G simulation test process because the unnecessary mistake that IO channel signal problem causes.
Technical scheme of the present invention is following:
Analog quantity integrated circuit board IO channel signal closed loop test system in a kind of real-timedigital simulation system; It comprises amplitude load module, frequency load module, phase place load module, function generator, analog quantity output element, analog quantity input element and oscillography element; Corresponding respectively amplitude, frequency and the phase place port that is connected to function generator of said amplitude load module, frequency load module, phase place load module; The output terminal of function generator connects the input end of analog quantity output element; The output signal of function generator is as 12 road input signals of analog quantity output element; The output port of analog quantity output element adopts RTDS dedicated test wire row to link to each other with the input port of analog quantity input element, the output terminal of oscillography element difference contiguous function generator and 12 tunnel inputs of analog quantity input element.
Analog quantity integrated circuit board IO channel signal closed loop test system in the described real-timedigital simulation system, wherein, the waveform of choice function generator is sinusoidal wave.
Analog quantity integrated circuit board IO channel signal closed loop test system in the described real-timedigital simulation system wherein, during the test AC signal, is provided with frequency greater than 0; During the test direct current signal, frequency is set equals 0.
Analog quantity integrated circuit board IO channel signal closed loop test system in the described real-timedigital simulation system; Wherein, Its method of testing is: the waveform of and function generator output end signal is consistent to observe signal waveform in 12 tunnel inputs of analog quantity input element in the oscillography element, and waveform unanimity then normal, the inconsistent then IO of IO passage passage is undesired.
Beneficial effect of the present invention: the present invention can eliminate unnecessary mistake in the RTDS l-G simulation test process through a kind of efficient, correct real-timedigital simulation system simulation template card IO lane testing method is provided; Need not to use other outside oscillography instrument (oscillograph device or signal generating Instrument); Implementation method is reliable, and is simple and quick.Improve the electric system RTDS l-G simulation test duration effectively and guarantee the l-G simulation test quality.
Description of drawings
Fig. 1 is the structure principle chart of test macro provided by the invention.
Embodiment
For making the object of the invention, technical scheme and advantage clearer, clear and definite, below develop simultaneously embodiment to further explain of the present invention with reference to accompanying drawing.
Referring to Fig. 1, the present invention provides the analog quantity integrated circuit board IO channel signal test macro in a kind of real-timedigital simulation system to comprise: amplitude load module, frequency load module, phase place load module, function generator, analog quantity output element, analog quantity input element and oscillography element.Corresponding respectively Mag (pk), Freg (Hz) and AbsPhase (rad) port that is connected to function generator of said amplitude load module, frequency load module, phase place load module is used to be provided with amplitude, frequency and the phase place of function generator Function Generator.The output terminals A of function generator connects the input end of analog quantity output element, as the input of GTAO integrated circuit board.The output signal A of function generator is as 12 road input signal A1～A12 of GTAO.The 12 road input signals difference B1～B12 of GTAI integrated circuit board is set.Adopt RTDS dedicated test wire row, the output port of GTAO and the input port of GTAI are linked to each other.The output terminal of oscillography element difference contiguous function generator and 12 tunnel inputs of GTAI integrated circuit board are used for display simulation amount output a-signal and analog quantity input signal B1～B12.
With carrying out the test of IO channel signal after the test macro connection completion.The waveform of choice function generator is sinusoidal wave but is not limited to.And, the no-load voltage ratio of GTAO and the no-load voltage ratio of GTAI are set according to the actual conditions needs.The numerical values recited of the amplitude in signalization source, frequency and phase place as required.Judge through B1～B12 and a-signal waveform in the observation oscillography element whether the IO passage is normal, then the normal inconsistent then IO passage of IO passage is undesired for the waveform unanimity.During the test AC signal, frequency is set greater than 0; During the test direct current signal, frequency is set equals 0.
The present invention can eliminate unnecessary mistake in the RTDS l-G simulation test process through a kind of efficient, correct RTDS analog quantity integrated circuit board IO lane testing method is provided; Need not to use other outside oscillography instrument (oscillograph device or signal generating Instrument); Implementation method is reliable, and is simple and quick.Improve the electric system RTDS l-G simulation test duration effectively and guarantee the l-G simulation test quality.
Should be understood that application of the present invention is not limited to above-mentioned giving an example, concerning those of ordinary skills, can improve or conversion that all these improvement and conversion all should belong to the protection domain of accompanying claims of the present invention according to above-mentioned explanation.
Claims (4)
1. the analog quantity integrated circuit board IO channel signal closed loop test system in the real-timedigital simulation system; It is characterized in that; Comprise amplitude load module, frequency load module, phase place load module, function generator, analog quantity output element, analog quantity input element and oscillography element; Corresponding respectively amplitude, frequency and the phase place port that is connected to function generator of said amplitude load module, frequency load module, phase place load module; The output terminal of function generator connects the input end of analog quantity output element; The output signal of function generator is as 12 road input signals of analog quantity output element, and the output port of analog quantity output element adopts RTDS dedicated test wire row to link to each other with the input port of analog quantity input element, the output terminal of oscillography element difference contiguous function generator and 12 tunnel inputs of analog quantity input element.
2. the analog quantity integrated circuit board IO channel signal closed loop test system in the real-timedigital simulation according to claim 1 system is characterized in that, the waveform of choice function generator is sinusoidal wave.
3. the analog quantity integrated circuit board IO channel signal closed loop test system in the real-timedigital simulation according to claim 1 system is characterized in that, during the test AC signal, frequency is set greater than 0; During the test direct current signal, frequency is set equals 0.
4. the analog quantity integrated circuit board IO channel signal closed loop test system in the real-timedigital simulation according to claim 1 system; It is characterized in that; Its method of testing is: the waveform of and function generator output end signal is consistent to observe signal waveform in 12 tunnel inputs of analog quantity input element in the oscillography element, and waveform unanimity then normal, the inconsistent then IO of IO passage passage is undesired.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210062737.7A CN102645627B (en) | 2012-03-09 | 2012-03-09 | Closed-loop test system for IO (input/output) channel signals of analog board in RTDS (real time digital simulator) |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201210062737.7A CN102645627B (en) | 2012-03-09 | 2012-03-09 | Closed-loop test system for IO (input/output) channel signals of analog board in RTDS (real time digital simulator) |
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| CN102645627A true CN102645627A (en) | 2012-08-22 |
| CN102645627B CN102645627B (en) | 2014-06-25 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108508878A (en) * | 2018-06-30 | 2018-09-07 | 中国华电集团科学技术研究总院有限公司 | A kind of validation checking system and method for power plant analog output channel |
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| US6094624A (en) * | 1997-08-19 | 2000-07-25 | Chao; Nathan | Electronic test facility |
| CN201611448U (en) * | 2009-11-24 | 2010-10-20 | 西北电网有限公司 | Closed loop test platform of control protection device in electrical power system |
| CN102129000A (en) * | 2010-12-31 | 2011-07-20 | 中国南方电网有限责任公司电网技术研究中心 | Converter transformer protection RTDS real-time digital closed loop test system for and method thereof |
| CN202008657U (en) * | 2011-01-31 | 2011-10-12 | 杭州士兰微电子股份有限公司 | Vector generation device for simulation test of integrated circuit |
| CN203102257U (en) * | 2013-01-10 | 2013-07-31 | 中国南方电网有限责任公司超高压输电公司检修试验中心 | Real time digital system (RTDS) simulation platform analog quantity board card input-output channel signal testing system |
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2012
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US6094624A (en) * | 1997-08-19 | 2000-07-25 | Chao; Nathan | Electronic test facility |
| CN201611448U (en) * | 2009-11-24 | 2010-10-20 | 西北电网有限公司 | Closed loop test platform of control protection device in electrical power system |
| CN102129000A (en) * | 2010-12-31 | 2011-07-20 | 中国南方电网有限责任公司电网技术研究中心 | Converter transformer protection RTDS real-time digital closed loop test system for and method thereof |
| CN202008657U (en) * | 2011-01-31 | 2011-10-12 | 杭州士兰微电子股份有限公司 | Vector generation device for simulation test of integrated circuit |
| CN203102257U (en) * | 2013-01-10 | 2013-07-31 | 中国南方电网有限责任公司超高压输电公司检修试验中心 | Real time digital system (RTDS) simulation platform analog quantity board card input-output channel signal testing system |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108508878A (en) * | 2018-06-30 | 2018-09-07 | 中国华电集团科学技术研究总院有限公司 | A kind of validation checking system and method for power plant analog output channel |
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| CN102645627B (en) | 2014-06-25 |
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