CN102637724A - Insulated gate bipolar transistor (IGBT) - Google Patents
Insulated gate bipolar transistor (IGBT) Download PDFInfo
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- CN102637724A CN102637724A CN2012100935471A CN201210093547A CN102637724A CN 102637724 A CN102637724 A CN 102637724A CN 2012100935471 A CN2012100935471 A CN 2012100935471A CN 201210093547 A CN201210093547 A CN 201210093547A CN 102637724 A CN102637724 A CN 102637724A
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Abstract
The invention provides an insulated gate bipolar transistor (IGBT). The IGBT comprises a collector electrode, a drift region, a buffer region, an emitting electrode and a grid electrode, wherein a first PN junction is formed between the emitting region and the drift region; a second PN junction is formed between the drift region and the collector electrode; a third PN junction is formed between the emitting region and the source region of a field-effect transistor (FET); the buffer region comprises first doped regions and second doped regions; the doping concentrations of the first doped regions are smaller than the doping concentrations of the second doped regions; and the first and second doped regions are arranged in the buffer region in a staggered manner. The IGBT can improve the switching speed under the condition of ensuring that off-state breakdown voltage characteristics and on pressure drop characteristics can not degrade.
Description
Technical field
The present invention relates to semiconductor manufacturing and design field, more particularly, the present invention relates to a kind of manufacturing of insulated gate bipolar transistor.
Background technology
Insulated gate bipolar transistor IGBT (Insulated Gate Bipolar Transistor) is the product that field-effect transistor (MOSFET) and bipolar transistor (BJT) combine.Its main part is identical with BJT, and collector and emitter is also arranged, and the structure of the control utmost point is identical with MOSFET, is insulated gate structure, is also referred to as grid.Insulated gate bipolar transistor has the advantage of low conduction voltage drop two aspects of high input impedance and the BJT of MOS transistor concurrently.
Fig. 1 schematically shows the structure according to the insulated gate bipolar transistor of prior art.As shown in Figure 1, general, insulated gate bipolar transistor comprises emitter 1 (for example being P type emitter region), collector electrode 2 (for example P type collector region) and grid 5; Wherein, drift region 3 (for example being N type drift region) and buffering area 4 have been arranged between emitter 1 and the collector electrode 2.
There is first PN junction (being that N type doping content equals P type doping content) between P type emitter region 1 and the N type drift region 3, has second PN junction between N type drift region 3 and the P type collector region 2; There is the 3rd PN junction between the source electrode of P type emitter region 1 and MOSFET.
(Breakdown Voltage BV) is an important electrical quantity of insulated gate bipolar transistor to puncture voltage.Specifically, being defined as of puncture voltage: add positive voltage in the substrate bottom by 0 paramount scanning, (electric current generally reaches 1e-5A/cm to the magnitude of voltage when current multiplication
2); The puncture voltage that promptly is called this device, wherein when substrate adds positive voltage, first PN junction forward conduction bottom; And second PN junction from the bottom to top oppositely exhausts, and the puncture voltage of insulated gate bipolar transistor is the reverse breakdown voltage of this second PN junction in fact.
But the insulated gate bipolar transistor of prior art can't have very fast switch speed under puncture voltage BV characteristic that guarantees OFF state and situation that the conduction voltage drop characteristic can not be degenerated.Therefore, be desirable to provide a kind of insulated gate bipolar transistor that can under puncture voltage BV characteristic that guarantees OFF state and situation that the conduction voltage drop characteristic can not be degenerated, improve switch speed.
Summary of the invention
Technical problem to be solved by this invention is to having above-mentioned defective in the prior art, and a kind of insulated gate bipolar transistor that can under puncture voltage BV characteristic that guarantees OFF state and situation that the conduction voltage drop characteristic can not be degenerated, improve switch speed is provided.
According to the present invention; A kind of insulated gate bipolar transistor is provided; It comprises: collector electrode, drift region, buffering area, emitter and grid; Form first PN junction between wherein said emitter region and the said drift region, formed second PN junction between said drift region and the said collector region, formed the 3rd PN junction between the source electrode of said emitter region and said MOSFET; And wherein; Said buffering area comprises first doped region and second doped region; The doping content of wherein said first doped region is less than the doping content of said second doped region, and said first doped region and said second doped region interlaced arrangement in said buffering area.
Preferably, said collector electrode is a P type collector electrode; Said drift region is N type drift region; Said emitter is a P type collection emitter.
Preferably, the concentration of having mixed in the said collector region is that the boron of 1e19 mixes.
Preferably, the doping content of said first doped region is 1e17, and the doping content of said second doped region is 1e18.
The invention provides a kind of insulated gate bipolar transistor that can under breakdown voltage characteristics that guarantees OFF state and situation that the conduction voltage drop characteristic can not be degenerated, improve switch speed.
Description of drawings
In conjunction with accompanying drawing, and, will more easily more complete understanding be arranged and more easily understand its attendant advantages and characteristic the present invention through with reference to following detailed, wherein:
Fig. 1 schematically shows the structure according to the insulated gate bipolar transistor of prior art.
Fig. 2 schematically shows the structure according to the insulated gate bipolar transistor of the embodiment of the invention.
Fig. 3 schematically shows the test circuit according to the insulated gate bipolar transistor of the embodiment of the invention.
Fig. 4 schematically shows according to the insulated gate bipolar transistor of prior art and according to the simulation test result of the insulated gate bipolar transistor of the embodiment of the invention.
Need to prove that accompanying drawing is used to explain the present invention, and unrestricted the present invention.Notice that the accompanying drawing of expression structure possibly not be to draw in proportion.And in the accompanying drawing, identical or similar elements indicates identical or similar label.
Embodiment
In order to make content of the present invention clear more and understandable, content of the present invention is described in detail below in conjunction with specific embodiment and accompanying drawing.
Fig. 2 schematically shows the structure according to the insulated gate bipolar transistor of the embodiment of the invention.
As shown in Figure 2, comprise equally according to the insulated gate bipolar transistor of the embodiment of the invention: emitter 1 (for example being P type emitter region), collector electrode 2 (P type collector region for example, for example concentration is that the boron of 1e19 mixes) and grid 5; Wherein, drift region 3 (for example being N type drift region) and buffering area have been arranged between emitter 1 and the collector electrode 2.
Form first PN junction (for example, N type doping content equals P type doping content) between emitter region 1 and the drift region 3, formed second PN junction between drift region 3 and the collector region 2; Formed the 3rd PN junction between the source region of emitter region 1 and MOSFET.
But different with prior art shown in Figure 1 is that in prior art shown in Figure 1, buffering area 4 is doped layers that evenly mix, and for example is doping to the buffering area 4 of N type; On the contrary; Buffering area according to the insulated gate bipolar transistor of the embodiment of the invention comprises two kinds of doped regions: first doped region 41 and second doped region 42; Wherein the doping content of first doped region 41 is less than the doping content of second doped region 42, and first doped region 41 and second doped region 42 interlaced arrangement in buffering area.
In a preferred embodiment, the doping content of first doped region 41 is 1e17, and the doping content of second doped region 42 is 1e18.
Further, can be to carrying out simulation test according to the insulated gate bipolar transistor of prior art and according to the insulated gate bipolar transistor of the embodiment of the invention.Fig. 3 schematically shows the simulation test circuit according to the insulated gate bipolar transistor of the embodiment of the invention.
As shown in Figure 3, applying voltage range on the grid 5 of insulated gate bipolar transistor is the grid voltage Vg of 0V to 10V, emitter 1 ground connection, and collector electrode 2 is connected to the collecting voltage Vc that voltage swing is 200V through resistance R 1.
Fig. 4 schematically shows and utilizes test circuit shown in Figure 3 to according to the insulated gate bipolar transistor of prior art and according to the simulation test result of the insulated gate bipolar transistor of the embodiment of the invention.Wherein, abscissa express time, the ordinate electric current of insulated gate bipolar transistor of representing to flow through.
First curve C 1 wherein shows the characteristic according to the insulated gate bipolar transistor of prior art.It is that the boron of 1e19 mixes, the doping content of first doped region 41 is 1e17, second doped region 41 doping content is the characteristic under the situation of 1e18 that second curve C 2 wherein shows the concentration of having mixed in the collector region according to the insulated gate bipolar transistor of the embodiment of the invention.
Shown in the oval zone that is identified, top among Fig. 4; Nearly improved 59% according to the handoff loss by OFF state to ON state of the insulated gate bipolar transistor of the embodiment of the invention; Shown in the oval zone that is identified, below among Fig. 4, nearly improved 51% according to the handoff loss by ON state to OFF state of the insulated gate bipolar transistor of the embodiment of the invention.This is to attract the remaining hole in the drift region to realize through second doped region 41 that utilization has increased doping content.
On the other hand, through test, fail with not comparing according to the insulated gate bipolar transistor of prior art according to the conduction voltage drop of the insulated gate bipolar transistor of the embodiment of the invention and puncture voltage.
It is understandable that though the present invention with the preferred embodiment disclosure as above, yet the foregoing description is not in order to limit the present invention.For any those of ordinary skill in the art; Do not breaking away under the technical scheme scope situation of the present invention; All the technology contents of above-mentioned announcement capable of using is made many possible changes and modification to technical scheme of the present invention, or is revised as the equivalent embodiment of equivalent variations.Therefore, every content that does not break away from technical scheme of the present invention, all still belongs in the scope of technical scheme protection of the present invention any simple modification, equivalent variations and modification that above embodiment did according to technical spirit of the present invention.
Claims (4)
1. insulated gate bipolar transistor; It comprises: collector electrode, drift region, buffering area, emitter and grid; Formed first PN junction between wherein said emitter region and the said drift region; Form second PN junction between said drift region and the said collector region, formed the 3rd PN junction between the source region of said emitter region and said field-effect transistor (MOSFET); It is characterized in that; Said buffering area comprises first doped region and second doped region; The doping content of wherein said first doped region is less than the doping content of said second doped region, and said first doped region and said second doped region interlaced arrangement in said buffering area.
2. insulated gate bipolar transistor according to claim 1 is characterized in that, said collector electrode is a P type collector electrode; Said drift region is N type drift region; Said emitter is a P type collection emitter.
3. insulated gate bipolar transistor according to claim 1 and 2 is characterized in that, the concentration of having mixed in the said collector region is the boron doping of 1e19.
4. insulated gate bipolar transistor according to claim 1 and 2 is characterized in that, the doping content of said first doped region is 1e17, and the doping content of said second doped region is 1e18.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012100935471A CN102637724A (en) | 2012-03-31 | 2012-03-31 | Insulated gate bipolar transistor (IGBT) |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012100935471A CN102637724A (en) | 2012-03-31 | 2012-03-31 | Insulated gate bipolar transistor (IGBT) |
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| CN102637724A true CN102637724A (en) | 2012-08-15 |
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| CN2012100935471A Pending CN102637724A (en) | 2012-03-31 | 2012-03-31 | Insulated gate bipolar transistor (IGBT) |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103346085A (en) * | 2013-07-02 | 2013-10-09 | 江苏博普电子科技有限责任公司 | Technology for improving bipolar transistor BVcbo production |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5569941A (en) * | 1992-10-20 | 1996-10-29 | Mitsubishi Denki Kabushiki Kaisha | Insulated gate semiconductor device with a buried gapped semiconductor region |
| CN1841769A (en) * | 2000-09-28 | 2006-10-04 | 株式会社东芝 | Semiconductor device |
| US20080173893A1 (en) * | 2007-01-23 | 2008-07-24 | Mitsubishi Electric Corporation | Semiconductor device and method for manufacturing the same |
| CN102394244A (en) * | 2011-11-29 | 2012-03-28 | 上海宏力半导体制造有限公司 | Insulated gate bipolar transistor and manufacturing method thereof |
-
2012
- 2012-03-31 CN CN2012100935471A patent/CN102637724A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5569941A (en) * | 1992-10-20 | 1996-10-29 | Mitsubishi Denki Kabushiki Kaisha | Insulated gate semiconductor device with a buried gapped semiconductor region |
| CN1841769A (en) * | 2000-09-28 | 2006-10-04 | 株式会社东芝 | Semiconductor device |
| US20080173893A1 (en) * | 2007-01-23 | 2008-07-24 | Mitsubishi Electric Corporation | Semiconductor device and method for manufacturing the same |
| CN102394244A (en) * | 2011-11-29 | 2012-03-28 | 上海宏力半导体制造有限公司 | Insulated gate bipolar transistor and manufacturing method thereof |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103346085A (en) * | 2013-07-02 | 2013-10-09 | 江苏博普电子科技有限责任公司 | Technology for improving bipolar transistor BVcbo production |
| CN103346085B (en) * | 2013-07-02 | 2016-02-24 | 江苏博普电子科技有限责任公司 | A kind of production technology improving bipolar transistor BVcbo |
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Owner name: SHANGHAI HUAHONG GRACE SEMICONDUCTOR MANUFACTURING Free format text: FORMER OWNER: HONGLI SEMICONDUCTOR MANUFACTURE CO LTD, SHANGHAI Effective date: 20140425 |
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Effective date of registration: 20140425 Address after: 201203 Shanghai Zhangjiang hi tech park Zuchongzhi Road No. 1399 Applicant after: Shanghai Huahong Grace Semiconductor Manufacturing Corporation Address before: 201203 Shanghai Guo Shou Jing Road, Pudong New Area Zhangjiang hi tech Park No. 818 Applicant before: Hongli Semiconductor Manufacture Co., Ltd., Shanghai |
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