CN102609597A - Method for layout of compound semiconductor microwave power chip - Google Patents
Method for layout of compound semiconductor microwave power chip Download PDFInfo
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- CN102609597A CN102609597A CN2012100877777A CN201210087777A CN102609597A CN 102609597 A CN102609597 A CN 102609597A CN 2012100877777 A CN2012100877777 A CN 2012100877777A CN 201210087777 A CN201210087777 A CN 201210087777A CN 102609597 A CN102609597 A CN 102609597A
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Abstract
The invention discloses a method for layout of a compound semiconductor microwave power chip and belongs to the technical field of layout methods. The method includes: dividing active device units at each level into active device unit groups, each comprising one to N active device units; distributing the active device unit groups at each level along a Y-axis direction between matching circuits, wherein grid direction of the active device unit in each active device unit group is parallel with the Y-axis, distributing the active device unit in each active device unit group along an X-axis direction. Due to the fact that the grid direction of the active device unit is changed, size of the layout in the X-axis direction is increased slightly compared with the prior art. Due to the fact that aligning direction of active device unit in third level is changed, the size of the layout in the Y-axis direction is reduced greatly.
Description
Technical field
The invention belongs to microwave power chip layout layout method technical field, relate in particular to a kind of method of compound semiconductor microwave power chip laying out pattern.
Background technology
Compound semiconductor materials such as GaAs, GaN and SiC have good characteristics such as the forbidden band is wide, high heat conductance, high carrier saturation drift velocity because of it, determined they are widely applied among the semiconductor microwave power device is made.After the power density of active device developed into to a certain degree, the power that improves monolithic needed extra increase area of chip usually, causes the decline of yield rate usually but increase area of chip, and effective chip-count of wafer is reduced but simultaneously.
The leading indicator of power amplifier comprises: output power, power gain, power added efficiency etc., and usually again with the principal character of saturation output power as amplifier.Microwave power amplifier adopts the mode of secondary or three-stage cascade to realize usually; In order to realize big output power; Method comprises: improve the power density of active device, total grid width of raising output stage active device; As far as circuit design, the total grid width that improves the output stage active device is main consideration angle.
At present, common laying out pattern method is with the some single active device element stack of final stage together, to guarantee enough saturation output powers.According to frequency and junction temperature requirement, confirm the grid width singly refer to, and confirm the number of unit component according to the requirement of saturation output power.GaN base device or GaAs base device are owing to there is higher power density; So refer to that singly grid width is not high usually,, need a lot of device cells to pile up so will satisfy extra high demanded power output; Cause the size of whole domain very big, reduced the utilization ratio of backing material.And if with referring to that singly grid width increases, and can not satisfy the junction temperature requirement again.So have difficulties aspect the more powerful power amplifier monolithic designing and producing, Fig. 3 is the laying out pattern mode of prior art.
Summary of the invention
Technical matters to be solved by this invention provides a kind of method of compound semiconductor microwave power chip laying out pattern, can under the prerequisite that does not increase chip area, increase the active device unit, thereby increases output power.
For solving the problems of the technologies described above; The technical scheme that the present invention taked is: a kind of method of compound semiconductor microwave power chip laying out pattern; It is characterized in that: the active device unit at different levels is divided into active device unit group respectively, and each active device unit group is made up of 1-N active device unit; Active device unit group at different levels is arranged between the match circuit along Y direction, and the grid finger direction of the active device unit in each active device unit group is parallel with the Y axle, arranges along X-direction in the active device unit in each active device unit group.
Further scheme of the present invention is: the number with the active device unit of each the active device unit group in the one-level is identical.
Adopt the beneficial effect that technique scheme produced to be: because variation has taken place the grid finger direction of active device unit; Cause compared with prior art; The X-direction size of domain is because the change in size of third level active device, second level active device and first order active device; Slightly increase; But on the Y direction since in the third level orientation of active device unit variation has taken place, make the Y direction of domain reduce greatly, and the number of active device unit has been realized the reasonable increase of power and area in number through being provided with and regulating active device unit group and the unit group than prior art.Said method can realize big output power under less chip area, just under the prerequisite of size, increased output power not increasing the chip folk prescription.
Description of drawings
Below in conjunction with accompanying drawing and embodiment the present invention is done further detailed explanation.
Fig. 1 is the laying out pattern synoptic diagram of the embodiment of the invention one;
Fig. 2 is the laying out pattern synoptic diagram of the embodiment of the invention two;
Fig. 3 prior art laying out pattern synoptic diagram;
Fig. 4 is the laying out pattern synoptic diagram of the embodiment of the invention three;
Fig. 5 is the laying out pattern synoptic diagram of the embodiment of the invention four;
Wherein: 1, match circuit 2, first order active device unit group 3, first and second intervalve matching circuit 4, active device unit, second level group 5, second and third intervalve matching circuit 6, third level active device unit group 7, third level output matching circuit before the first order.
Embodiment
A kind of method of compound semiconductor microwave power chip laying out pattern is characterized in that: the active device unit at different levels is divided into active device unit group respectively, and each active device unit group is made up of 1-N active device unit; Active device unit group at different levels is arranged between the match circuit along Y direction, and the grid finger direction of the active device unit in each active device unit group is parallel with the Y axle, arranges along X-direction in the active device unit in each active device unit group.
Embodiment one, and is as shown in Figure 1, increases saturation output power through the number that increases Y direction active device unit group.Increase in theory and be twice, saturation output power increases 3dB, but the size of the Y direction of domain increases and be twice, and area increases and is twice.In Fig. 1, first order active device unit group is made up of 1 active device unit, is provided with 2 first order active device unit groups; Active device unit, second level group is made up of 2 active device unit, is provided with active device unit, 2 second level group; Third level active device unit group is made up of 4 active device unit, is provided with 4 third level active device unit groups.
Embodiment two, and is as shown in Figure 2, increases saturation output power through the number that increases the active device unit in the X-direction active device unit group.Number increases and is twice in theory, and saturation output power increases 3dB, and the size of X-direction slightly increases, and total area slightly increases.Excessively do not increase in order to keep the X-direction size, first order active device, second level active device adopt Y direction to increase the mode of number.In Fig. 2, first order active device unit group is made up of 1 active device unit, is provided with 4 first order active device unit groups; Active device unit, second level group is made up of 2 active device unit, is provided with active device unit, 4 second level group; Third level active device unit group is made up of 8 active device unit, is provided with 4 third level active device unit groups.
Embodiment three, and is as shown in Figure 4, and first order active device unit group is made up of 1 active device unit in the drawings, is provided with 1 first order active device unit group; Active device unit, second level group is made up of 1 active device unit, is provided with active device unit, 4 second level group; Third level active device unit group is made up of 4 active device unit, is provided with 4 third level active device unit groups.
Embodiment four, and is as shown in Figure 5, and first order active device unit group is made up of 1 active device unit in the drawings, is provided with 1 first order active device unit group; Active device unit, second level group is made up of 1 active device unit, is provided with active device unit, 2 second level group; Third level active device unit group is made up of 2 active device unit, is provided with 4 third level active device unit groups.
Number with the active device unit of each the active device unit group in the one-level can be arranged to identical or different as required.
Four embodiments have below only been pointed out; But design philosophy is crucial: can be through the number of adjusting active device unit group and the number of the interior active device unit of unit group; Realize the reasonable increase of power and area, realized the increase and the minimized purpose of the contradiction between the chip area of saturation output power.
Claims (2)
1. the method for a compound semiconductor microwave power chip laying out pattern, it is characterized in that: the active device unit at different levels is divided into active device unit group respectively, and each active device unit group is made up of 1-N active device unit; Active device unit group at different levels is arranged between the match circuit along Y direction, and the grid finger direction of the active device unit in each active device unit group is parallel with the Y axle, arranges along X-direction in the active device unit in each active device unit group.
2. the method for a kind of compound semiconductor microwave power chip laying out pattern according to claim 1 is characterized in that with the number of the active device unit of each the active device unit group in the one-level identical.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2012100877777A CN102609597A (en) | 2012-03-29 | 2012-03-29 | Method for layout of compound semiconductor microwave power chip |
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| Application Number | Priority Date | Filing Date | Title |
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| CN2012100877777A CN102609597A (en) | 2012-03-29 | 2012-03-29 | Method for layout of compound semiconductor microwave power chip |
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| CN102609597A true CN102609597A (en) | 2012-07-25 |
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| CN2012100877777A Pending CN102609597A (en) | 2012-03-29 | 2012-03-29 | Method for layout of compound semiconductor microwave power chip |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103778423A (en) * | 2013-11-25 | 2014-05-07 | 中国人民解放军国防科学技术大学 | Finger vein line restoration method based on gray scale neighbor and variance constraint |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1206495A (en) * | 1996-10-25 | 1999-01-27 | 恩德盖茨公司 | Method for making circuit structure having flip-mounted matrix of device |
| CN1294763A (en) * | 1998-04-24 | 2001-05-09 | 恩德威夫公司 | Coplanar oscillator circuit structures |
| US20100295843A1 (en) * | 2009-05-25 | 2010-11-25 | Au Optronics Corporation | Liquid crystal display panel and driving method thereof |
| CN202013558U (en) * | 2009-08-12 | 2011-10-19 | 智点科技（深圳）有限公司 | Active touch control system |
-
2012
- 2012-03-29 CN CN2012100877777A patent/CN102609597A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1206495A (en) * | 1996-10-25 | 1999-01-27 | 恩德盖茨公司 | Method for making circuit structure having flip-mounted matrix of device |
| CN1294763A (en) * | 1998-04-24 | 2001-05-09 | 恩德威夫公司 | Coplanar oscillator circuit structures |
| US20100295843A1 (en) * | 2009-05-25 | 2010-11-25 | Au Optronics Corporation | Liquid crystal display panel and driving method thereof |
| CN202013558U (en) * | 2009-08-12 | 2011-10-19 | 智点科技（深圳）有限公司 | Active touch control system |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103778423A (en) * | 2013-11-25 | 2014-05-07 | 中国人民解放军国防科学技术大学 | Finger vein line restoration method based on gray scale neighbor and variance constraint |
| CN103778423B (en) * | 2013-11-25 | 2016-09-21 | 中国人民解放军国防科学技术大学 | Finger vein grain restorative procedure based on gray scale neighbour and Variance Constraints |
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Application publication date: 20120725 |