CN102594185A - Four-level topology unit and application circuit thereof - Google Patents
Four-level topology unit and application circuit thereof Download PDFInfo
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- CN102594185A CN102594185A CN2012100385058A CN201210038505A CN102594185A CN 102594185 A CN102594185 A CN 102594185A CN 2012100385058 A CN2012100385058 A CN 2012100385058A CN 201210038505 A CN201210038505 A CN 201210038505A CN 102594185 A CN102594185 A CN 102594185A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
- H02M7/4837—Flying capacitor converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
- H02M7/487—Neutral point clamped inverters
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Abstract
The invention discloses a four-level topology unit comprising a first switching tube, a second switching tube, a third switching tube, a fourth switching tube, a fifth switching tube, a sixth switching tube, a first clamping diode, a second clamping diode and six diodes. Compared with the diode clamping type four-level topology unit in the prior art, the four-level topology unit disclosed by the invention has the advantages that two clamping diodes are reduced, so that the cost of an inverter is effectively reduced, the structure of the inverter is simplified and the encapsulation difficulty is lowered. Compared with the flying capacitor type four-level topology unit in the prior art, the four-level topology unit disclosed by the invention has the advantages that three capacitors can be reduced when the four-level topology unit is applied to a four-level inverter; and as the cost of the capacitor is far higher than that of the diode, the cost of the inverter is effectively reduced. The invention also discloses a variety of four-level inverters and a four-level direct-current/alternating-current converting chip.
Description
Technical field
The invention belongs to the power electronic technology technical field, relate in particular to four level topology unit and application circuits thereof.
Background technology
Inverter can change direct current into alternating current.Along with the continuous development and progress of technology, the improving constantly of people's living standard, inverter also becomes a kind of visual plant that people are emergent and go out.Mostly present inverter is diode clamp type inverter or striding capacitance type inverter.
Fig. 1 and Fig. 2 show the part-structure of traditional four electrical level inverters respectively.Wherein, Fig. 1 is the part-structure of diode clamp type four electrical level inverters, and Fig. 2 is the part-structure of striding capacitance type four electrical level inverters.In inverter structure shown in Figure 1, through the signal of telecommunication of capacitor C 1, C2 and four different potentials of C3 generation, and each four level topology unit comprises six switching tubes and ten diodes; In inverter structure shown in Figure 2, each four level topology unit comprises six switching tubes and six diodes, but in the inverter signal of telecommunication that capacitor C 1, C2, C3, C4, C5 and C6 produce four different potentials must be set.
Therefore, the semiconductor device quantity of using in conventional diode clamper type four electrical level inverters and striding capacitance type four electrical level inverters is more, has increased the cost of inverter, and has also increased the encapsulation difficulty of inverter.
Summary of the invention
In view of this, the object of the present invention is to provide a kind of four level topology unit that are applied to four electrical level inverters, can reduce the quantity of semiconductor device in four electrical level inverters, effectively reduce the cost and the encapsulation difficulty of four electrical level inverters.The invention also discloses multiple four electrical level inverters and exchange conversion chip with a kind of four level DCs.
For realizing above-mentioned purpose, the present invention provides following technical scheme:
A kind of four level topology unit; Be applied in four electrical level inverters, comprise first switching tube, second switch pipe, the 3rd switching tube, the 4th switching tube, the 5th switching tube, the 6th switching tube, first clamp diode, second clamp diode and six diodes;
Said first switching tube, second switch pipe, the 3rd switching tube, the 4th switching tube, the 5th switching tube and the 6th switching tube be diode of reverse parallel connection respectively;
The anode of DC power supply is connected to the negative terminal of said DC power supply successively through first electric capacity, second electric capacity and the 3rd electric capacity;
First end, second end that first end of said first switching tube is connected to said first electric capacity are connected to first node; First end of said second switch pipe is connected to said first node, second end is connected to Section Point; First end of said the 5th switching tube is connected to said Section Point, second end is connected to the 3rd node; First end of said the 6th switching tube is connected to second end that said the 3rd node, second end are connected to said the 3rd electric capacity; First end, second end that first end of said the 3rd switching tube is connected to said second electric capacity are connected to the 4th node; First end of said the 4th switching tube is connected to said Section Point, second end is connected to said the 4th node; Second end, negative electrode that the anode of said first clamp diode is connected to said second electric capacity are connected to said first node; The anode of said second clamp diode is connected to second end that said the 3rd node, negative electrode are connected to said second electric capacity; Said Section Point is the ac output end of said four level topology unit.
Preferably,
Above-mentioned four level topology unit comprise four operation modes, are respectively:
First operation mode, said first switching tube and the conducting of second switch pipe, the rest switch pipe ends;
Second operation mode, said the 3rd switching tube and the 4th switching tube conducting, the rest switch pipe ends;
The 3rd operation mode, said second switch pipe and the 5th switching tube conducting, the rest switch pipe ends;
The 4th operation mode, said the 5th switching tube and the 6th switching tube conducting, the rest switch pipe ends.
Preferably,
In above-mentioned four level topology unit; The drive signal of said first switching tube, second switch pipe, the 3rd switching tube, the 4th switching tube, the 5th switching tube and the 6th switching tube is confirmed with first triangular wave and/or second triangular wave through relatively more sinusoidal wave; Said first triangular wave has identical frequency and amplitude with second triangular wave, and the trough of said first triangular wave equals the crest of said second triangular wave;
The drive signal of said first switching tube compares generation by said sine wave and said first triangular wave, when the said first switching tube conducting during greater than said first triangular wave of said sine wave, otherwise ends;
The drive signal of said second switch pipe compares generation by the backward-wave and said first triangular wave of said sine wave, when the said second switch pipe conducting during less than said first triangular wave of the backward-wave of said sine wave, otherwise ends;
The drive signal of said the 3rd switching tube compares generation by said sine wave and said second triangular wave; In the positive half period of said sine wave; When said the 3rd switching tube conducting during of said sine wave, otherwise end, in the negative half-cycle of said sine wave greater than said second triangular wave; When said the 3rd switching tube conducting during less than said second triangular wave of the backward-wave of said sine wave, otherwise end;
The drive signal of said the 4th switching tube compares generation by said sine wave and said first triangular wave, when said the 4th switching tube conducting during less than said first triangular wave of said sine wave, otherwise ends;
The drive signal of said the 5th switching tube compares generation by said sine wave and said second triangular wave; In the positive half period of said sine wave; When said the 5th switching tube conducting during of said sine wave, otherwise end, in the negative half-cycle of said sine wave less than said second triangular wave; When said the 5th switching tube conducting during greater than said second triangular wave of the backward-wave of said sine wave, otherwise end;
The drive signal of said the 6th switching tube compares generation by the backward-wave and said first triangular wave of said sine wave, when said the 6th switching tube conducting during greater than said first triangular wave of the backward-wave of said sine wave, otherwise ends.
Preferably,
In above-mentioned four level topology unit, said switching tube is insulated gate bipolar transistor (IGBT), and said first end is a collector electrode, and second end is an emitter.
A kind of single-phase full bridge four electrical level inverters comprise electric capacity string, the one or four level topology unit and the two or four level topology unit;
Said electric capacity string is in series by first electric capacity, second electric capacity and the 3rd electric capacity successively, and the anode of DC power supply is connected to the negative terminal of said DC power supply successively through said first electric capacity, second electric capacity and the 3rd electric capacity;
Said the one or four level topology unit and the two or four level topology unit are aforementioned any four level topology unit; First end of first switching tube all is connected to first end of said first electric capacity in said the one or four level topology unit and the two or the four level topology unit; Second end of the 6th switching tube all is connected to second end of said the 3rd electric capacity in said the one or four level topology unit and the two or the four level topology unit; The negative electrode of the anode of first clamp diode and second clamp diode all is connected to the common port of said second electric capacity and the 3rd electric capacity in said the one or four level topology unit and the two or the four level topology unit; First end of the 3rd switching tube all is connected to the common port of said first electric capacity and second electric capacity in said the one or four level topology unit and the two or the four level topology unit, and the ac output end of said the one or four level topology unit and the two or four level topology unit is respectively as two ac output ends of said single-phase full bridge four electrical level inverters;
The phase place and being used to that is used to produce the sine wave of said the one or four level topology unit drive signal produces 180 ° of the phase phasic differences of the sine wave of said the two or four level topology unit drive signal.
Preferably,
In above-mentioned single-phase full bridge four electrical level inverters, the ac output end of said the one or four level topology unit is connected to an end of an AC load, and the ac output end of said the two or four level topology unit is connected to the other end of said AC load;
Also comprise filter circuit in said single-phase full bridge four electrical level inverters, said filter circuit comprises first inductance, second inductance and electric capacity; Said first inductance is series between the ac output end and said AC load of said the one or four level topology unit; Said second inductance is series between the ac output end and said AC load of said the two or four level topology unit; Said electric capacity is parallel to said AC load two ends.
A kind of phase three-wire three four electrical level inverters comprise electric capacity string, the one or four level topology unit, the two or four level topology unit and the three or four level topology unit;
Said electric capacity string is in series by first electric capacity, second electric capacity and the 3rd electric capacity successively, and the anode of DC power supply is connected to the negative terminal of said DC power supply successively through said first electric capacity, second electric capacity and the 3rd electric capacity;
Said the one or four level topology unit, the two or four level topology unit and the three or four level topology unit are aforementioned any four level topology unit; First end of first switching tube all is connected to first end of said first electric capacity in said the one or four level topology unit, the two or four level topology unit and the three or the four level topology unit; Second end of the 6th switching tube all is connected to second end of said the 3rd electric capacity in said the one or four level topology unit, the two or four level topology unit and the three or the four level topology unit; The negative electrode of the anode of first clamp diode and second clamp diode all is connected to the common port of said second electric capacity and the 3rd electric capacity in said the one or four level topology unit, the two or four level topology unit and the three or the four level topology unit; First end of the 3rd switching tube all is connected to the common port of said first electric capacity and second electric capacity in said the one or four level topology unit, the two or four level topology unit and the three or the four level topology unit, and the ac output end of said the one or four level topology unit, the two or four level topology unit and the three or four level topology unit is respectively as three ac output ends of said phase three-wire three four electrical level inverters;
Be used to produce the phase place that the phase place of the sine wave of said the one or four level topology unit drive signal, the phase place and being used to that is used to produce the sine wave of said the two or four level topology unit drive signal produce the sine wave of said the three or four level topology unit drive signal and differ 120 ° successively.
Preferably,
In above-mentioned phase three-wire three four electrical level inverters; The ac output end of said the one or four level topology unit is connected to an end of first AC load; The ac output end of said the two or four level topology unit is connected to an end of second AC load; The ac output end of said the three or four level topology unit is connected to an end of the 3rd AC load, and the other end of the other end of said first AC load, said second AC load is connected with the other end of said the 3rd AC load;
Also comprise filter circuit in said phase three-wire three four electrical level inverters, said filter circuit comprises first inductance, second inductance, the 3rd inductance, first electric capacity, second electric capacity and the 3rd electric capacity; Said first inductance is series between the ac output end and said first AC load of said the one or four level topology unit; Said second inductance is series between the ac output end and said second AC load of said the two or four level topology unit; Said the 3rd inductance is series between the ac output end and said the 3rd AC load of said the three or four level topology unit; One end of said first electric capacity is connected to the common port of said first inductance and first AC load; One end of said second electric capacity is connected to the common port of said second inductance and second AC load; One end of said the 3rd electric capacity is connected to the common port of said the 3rd inductance and the 3rd AC load, and the other end of the other end of said first electric capacity, said second electric capacity is connected with the other end of said the 3rd electric capacity.
A kind of three-phase and four-line four electrical level inverters comprise electric capacity string, the one or four level topology unit, the two or four level topology unit, the three or four level topology unit and the four or four level topology unit;
Said electric capacity string is in series by first electric capacity, second electric capacity and the 3rd electric capacity successively, and the anode of DC power supply is connected to the negative terminal of said DC power supply successively through said first electric capacity, second electric capacity and the 3rd electric capacity;
Said the one or four level topology unit, the two or four level topology unit, the three or four level topology unit and the four or four level topology unit are aforementioned any four level topology unit; First end of first switching tube in said the one or four level topology unit, the two or four level topology unit, the three or four level topology unit and the four or the four level topology unit all is connected to first end of said first electric capacity; Second end of the 6th switching tube all is connected to second end of said the 3rd electric capacity in said the one or four level topology unit, the two or four level topology unit, the three or four level topology unit and the four or the four level topology unit; The negative electrode of the anode of first clamp diode and second clamp diode all is connected to the common port of said second electric capacity and the 3rd electric capacity in said the one or four level topology unit, the two or four level topology unit, the three or four level topology unit and the four or the four level topology unit; First end of the 3rd switching tube all is connected to the common port of said first electric capacity and second electric capacity in said the one or four level topology unit, the two or four level topology unit, the three or four level topology unit and the four or the four level topology unit, and the ac output end of said the one or four level topology unit, the two or four level topology unit, the three or four level topology unit and the four or four level topology unit is respectively four ac output ends of said three-phase and four-line four electrical level inverters;
Be used to produce the phase place that the phase place of the sine wave of the two or four level topology unit drive signal, the phase place and being used to that is used to produce the sine wave of the three or four level topology unit drive signal produce the sine wave of the four or four level topology unit drive signal and differ 120 ° successively.
Preferably,
In above-mentioned three-phase and four-line four electrical level inverters; The ac output end of said the two or four level topology unit is connected to an end of first AC load; The ac output end of said the three or four level topology unit is connected to an end of second AC load; The ac output end of said the four or four level topology unit is connected to an end of the 3rd AC load; The ac output end of said the one or four level topology unit is connected to an end of an end of said first AC load, said second AC load and an end of the 3rd AC load respectively, and the other end of the other end of said first AC load, said second AC load is connected with the other end of said the 3rd AC load;
Also comprise filter circuit in said three-phase and four-line four electrical level inverters, said filter circuit comprises first inductance, second inductance, the 3rd inductance, first electric capacity, second electric capacity and the 3rd electric capacity; Said first inductance is series between the ac output end and said first AC load of said the two or four level topology unit; Said second inductance is series between the ac output end and said second AC load of said the three or four level topology unit; Said the 3rd inductance is series between the ac output end and said the 3rd AC load of said the four or four level topology unit; One end of said first electric capacity is connected to the common port of said first inductance and first AC load; One end of said second electric capacity is connected to the common port of said second inductance and second AC load; One end of said the 3rd electric capacity is connected to the common port of said the 3rd inductance and the 3rd AC load, and the other end of the other end of said first electric capacity, said second electric capacity and the other end of said the 3rd electric capacity are connected to the ac output end of said the one or four level topology unit.
A kind of four level DCs exchange conversion chip; Comprise above-mentioned any four level topology unit; Also comprise five exits, said five exits are respectively the common port, second end and the Section Point of the 6th switching tube of negative electrode of anode and second clamp diode of first end, first clamp diode of first end, the 3rd switching tube of first switching tube.
This shows; Beneficial effect of the present invention is: four level topology unit disclosed by the invention are compared with diode clamp type four level topology unit of the prior art; Reduced the use of two clamp diodes, thus effectively reduce inverter cost, simplified the structure of inverter and reduced encapsulation difficulty; Compare with striding capacitance type four level topology unit of the prior art, in the process that is applied to four electrical level inverters, can reduce the use of 3 electric capacity, because the cost of electric capacity itself far above the cost of diode, therefore effectively reduces the cost of inverter.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art; To do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art below; Obviously, the accompanying drawing in describing below is some embodiments of the present invention, for those of ordinary skills; Under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the part-structure sketch map of diode clamp type four electrical level inverters in the prior art;
Fig. 2 is the part-structure sketch map of striding capacitance type four electrical level inverters in the prior art;
Fig. 3 is the circuit diagram of a kind of four level topology unit disclosed by the invention;
The topological diagram of correspondence when Fig. 4 is in first operation mode for four level topology unit disclosed by the invention;
The topological diagram of correspondence when Fig. 5 is in second operation mode for four level topology unit disclosed by the invention;
The topological diagram of correspondence when Fig. 6 is in the 3rd operation mode for four level topology unit disclosed by the invention;
The topological diagram of correspondence when Fig. 7 is in the 4th operation mode for four level topology unit disclosed by the invention;
Fig. 8 is the conducting sequential chart of six switching tubes in the four level topology unit disclosed by the invention;
Fig. 9 is that four level DCs disclosed by the invention exchange conversion chip;
Figure 10 is the topological diagram of a kind of single-phase full bridge four electrical level inverters disclosed by the invention;
Figure 11 is the topological diagram of another kind of single-phase bridge four electrical level inverters disclosed by the invention;
Figure 12 is the topological diagram of a kind of phase three-wire three four electrical level inverters disclosed by the invention;
Figure 13 is the topological diagram of another kind of phase three-wire three four electrical level inverters disclosed by the invention;
Figure 14 is the topological diagram of a kind of three-phase and four-line four electrical level inverters disclosed by the invention;
Figure 15 is the topological diagram of another kind of three-phase and four-line four electrical level inverters disclosed by the invention.
Embodiment
Clear in order to describe, english abbreviation and the term that hereinafter occurs carried out brief description:
IGBT:Insulated Gate Bipolar Transistor, insulated gate bipolar transistor;
MOSFET:Metal-Oxide-Semiconductor Field-Effect Transistor, metal-oxide layer-semiconductor-field-effect transistor is called for short metal-oxide half field effect transistor;
IGCT:Intergrated Gate Commutated Thyristors, integrated gate commutated thyristor;
IEGT:Injection Enhanced Gate Transistor is the above IGBT series power electronic device of the withstand voltage 4KV of reaching.
The present invention discloses a kind of four level topology unit that are applied to four electrical level inverters, can reduce the quantity of semiconductor device in four electrical level inverters, effectively reduces the cost and the encapsulation difficulty of four electrical level inverters.In addition, the invention also discloses four electrical level inverters of this four level topology unit of multiple application.
For the purpose, technical scheme and the advantage that make the embodiment of the invention clearer; To combine the accompanying drawing in the embodiment of the invention below; Technical scheme in the embodiment of the invention is carried out clear, intactly description; Obviously, described embodiment is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills are not making the every other embodiment that is obtained under the creative work prerequisite, all belong to the scope of the present invention's protection.
Referring to Fig. 3, Fig. 3 is the circuit diagram of a kind of four level topology unit disclosed by the invention.
This four level topology unit comprises first switch transistor T 1, second switch pipe T2, the 3rd switch transistor T 3, the 4th switch transistor T 4, the 5th switch transistor T 5, the 6th switch transistor T 6, the first clamp diode DB1, the second clamp diode DB2, the first diode D1, the second diode D2, the 3rd diode D3, the 4th diode D4, the 5th diode D5 and the 6th diode D6.
The anode DC+ of DC power supply 31 is connected to the negative terminal DC-of DC power supply 31 successively through first capacitor C 1, second capacitor C 2 and the 3rd capacitor C 3.
First end of first switch transistor T 1 is connected to first end (being the anode DC+ of DC power supply 31) of first capacitor C 1, and second end of first switch transistor T 1 is connected to first node a; First end of second switch pipe T2 is connected to first node a, and second end of second switch pipe T2 is connected to Section Point b; First end of the 5th switch transistor T 5 is connected to Section Point b, and second end of the 5th switch transistor T 5 is connected to the 3rd node c; First end of the 6th switch transistor T 6 is connected to the 3rd node, and second end of the 6th switch transistor T 6 is connected to second end of the 3rd electric capacity; First end of the 3rd switch transistor T 3 is connected to first end (i.e. second end of first capacitor C 1, just the common port M1 of first capacitor C 1 and second capacitor C 2) of second capacitor C 2, and second end of the 3rd switch transistor T 3 is connected to the 4th node d; First end of the 4th switch transistor T 4 is connected to Section Point b, and second end of the 4th switch transistor T 4 is connected to the 4th node d; The anode of the first clamp diode DB1 is connected to second end (i.e. first end of the 3rd capacitor C 1, just the common port M2 of second capacitor C 2 and the 3rd capacitor C 3) of second capacitor C 2, and the negative electrode of the first clamp diode DB1 is connected to first node a; The anode of the second clamp diode DB2 is connected to the 3rd node c, and the negative electrode of the second clamp diode DB2 is connected to second end (i.e. first end of the 3rd capacitor C 3, just the common port M2 of second capacitor C 2 and the 3rd capacitor C 3) of second capacitor C 2.
And; At diode of the two ends of each switching tube difference reverse parallel connection; Concrete: the reverse parallel connection first diode D1 between first end of first switch transistor T 1 and second end; The reverse parallel connection second diode D2 between first end of second switch pipe T2 and second end, reverse parallel connection the 3rd diode D3 between first end of the 3rd switch transistor T 3 and second end, reverse parallel connection the 4th diode D4 between first end of the 4th switch transistor T 4 and second end; Reverse parallel connection the 5th diode D5 between first end of the 5th switch transistor T 5 and second end, reverse parallel connection the 6th diode D6 between first end of the 6th switch transistor T 6 and second end.
Section Point b (being the common port of first end of second end and the 5th switch transistor T 5 of second switch pipe T2) is the ac output end AC of this four level topology unit.
Compare with diode clamp type four level topology unit of the prior art, only comprise two clamp diodes in the four level topology unit disclosed by the invention, reduced the usage quantity of clamp diode.
In addition, in the another kind of striding capacitance type four level topology unit that prior art provides, though removed clamp diode; But need increase striding capacitance in order to generate many level; In each inverter, need to use 6 electric capacity,, finally cause increasing of striding capacitance type inverter cost because the cost of electric capacity itself is higher; And four level topology unit disclosed by the invention only need be used 3 electric capacity when being applied to four electrical level inverters, can effectively reduce the cost of inverter.
To sum up; Four level topology unit disclosed by the invention are compared with diode clamp type four level topology unit of the prior art; Reduced the use of two clamp diodes, thus effectively reduce inverter cost, simplified the structure of inverter and reduced encapsulation difficulty; Compare with striding capacitance type four level topology unit of the prior art, in the process that is applied to four electrical level inverters, can reduce the use of 3 electric capacity, because the cost of electric capacity itself far above the cost of diode, therefore effectively reduces the cost of inverter.
Need to prove, more than six switching tubes can manage for IGBT, MOSFET pipe, IGCT pipe or IEGT pipe.When each switching tube was the IGBT pipe, its first end was a collector electrode, and second end is an emitter.It is understandable that, more than six switching tubes also can select the switching tube of other types.
Need to prove that the diode of above switching tube reverse parallel connection can be diode independently, also can be the diode that integrates with the switching tube encapsulation.
Four level topology unit disclosed by the invention have four kinds of operation modes, and every kind of operation mode has two switching tube conductings, are elaborated below in conjunction with four kinds of operation modes of accompanying drawing to four level topology unit.
See also Fig. 4～Fig. 7, Fig. 4～Fig. 7 is respectively four level topology unit disclosed by the invention corresponding topological diagram when being in first operation mode, second operation mode, the 3rd operation mode and the 4th operation mode.
Need to prove do not have the switching tube of pulsed drive to illustrate with fine line in the drawings, have the switching tube of pulsed drive and the path of conducting to illustrate with heavy line.
First operation mode: first switch transistor T 1 and the equal conducting of second switch pipe T2, rest switch Guan Jun ends.When ac output end AC flowed out electric current, current path was: the DC power supply anode DC+-first switch transistor T 1-second switch pipe T2-ac output end AC.When by ac output end AC inflow current, current path is: the ac output end AC-second diode D2-first diode D1-DC power supply anode DC-.
Second operation mode: the 3rd switch transistor T 3 and 4 conductings of the 4th switch transistor T, rest switch Guan Jun ends.When ac output end AC flowed out electric current, current path was: the first end M1-the 3rd switch transistor T 3-the 4th diode D4-ac output end AC of second capacitor C 2.When by ac output end AC inflow current, current path is: the first end M1 of ac output end AC-the 4th switch transistor T 4-the 3rd diode D3-second electric capacity.
The 3rd operation mode: second switch pipe T2 and the 5 equal conductings of the 5th switch transistor T, rest switch Guan Jun ends.When ac output end AC flowed out electric current, current path was: the first end M2-, the first clamp diode DB1-second switch pipe T2-ac output end AC of the 3rd capacitor C 3.When by ac output end AC inflow current, current path is: the first end M2 of ac output end AC-the 5th switch transistor T 5-second clamp diode DB2-the 3rd capacitor C 3.
The 4th operation mode: the 5th switch transistor T 5 and the 6 equal conductings of the 6th switch transistor T, rest switch Guan Jun ends.When ac output end AC flowed out electric current, current path was: DC power supply negative terminal DC--the 6th diode D6-the 5th diode D5-ac output end AC.When by ac output end AC inflow current, current path is: ac output end AC-the 5th switch transistor T 5-the 6th switch transistor T 6-DC power supply negative terminal.
Need to prove:
At first operation mode, though loaded drive signal on the 3rd switch transistor T 3, because what add on the ac output end AC this moment is the voltage of DC+ end, this moment, the 4th diode D4 bore back-pressure blocking-up electric current, therefore the 3rd switch transistor T 3 not conducting flow through electric current.This is in order to simplify the Pulse Design of the 3rd switch transistor T 3.
At second operation mode; Though loaded drive signal on the second switch pipe T2; But because what add on the ac output end AC this moment is the voltage of M1 end, this moment, the first clamp diode DB1 bore back-pressure blocking-up electric current, so second switch pipe T2 does not have conducting and flows through electric current.This is in order to simplify the Pulse Design of second switch pipe T2.
At the 3rd operation mode and the 4th operation mode; Though loaded drive signal on the 4th switch transistor T 4; But because what add on the ac output end AC this moment is the voltage of M2 end or DC-end, this moment, the 3rd diode D3 bore back-pressure blocking-up electric current, therefore the 4th switch transistor T 4 not conducting flow through electric current.This is in order to simplify the Pulse Design of the 4th switch transistor T 4.
Referring to Fig. 8, Fig. 8 is the conducting sequential chart of six switching tubes in the four level topology unit disclosed by the invention.
The waveform of upper end comprises two triangular waves (being respectively the first triangular wave A and the second triangular wave B) and a sinusoidal wave Z among Fig. 8; Wherein, The first triangular wave A, the second triangular wave B have identical frequency and identical amplitude, and the trough of the first triangular wave A equals the crest of the second triangular wave B.
S1～S6 among Fig. 8 is respectively the drive signal that loads on switch transistor T 1～T6 control end, when the drive signal of switching tube is high level, and the conducting of corresponding switch pipe, when the drive signal of switching tube was low level, the corresponding switch pipe ended.S1～S6 is through more sinusoidal wave Z and the first triangular wave A and/or second triangular wave B generation.
Vao among Fig. 8 is the voltage on the ac output end AC.
The drive signal S1 of first switch transistor T 1 compares generation by the sinusoidal wave Z and the first triangular wave A, when sinusoidal wave Z first switch transistor T, 1 conducting during greater than the first triangular wave A, otherwise ends.
The drive signal S2 of second switch pipe T2 compares generation by the backward-wave and the first triangular wave A of sinusoidal wave Z, when the second switch pipe T2 conducting during less than the first triangular wave A of the backward-wave of sinusoidal wave Z, otherwise ends.
The drive signal S3 of the 3rd switch transistor T 3 compares generation by the sinusoidal wave Z and the second triangular wave B, in the positive half period of sinusoidal wave Z, when sinusoidal wave Z the 3rd switch transistor T 3 conductings during greater than the second triangular wave B, otherwise ends; In the negative half-cycle of sinusoidal wave Z,, otherwise end when the 3rd switch transistor T 3 conductings during less than the second triangular wave B of the backward-wave of sinusoidal wave Z.
The drive signal S4 of the 4th switch transistor T 4 compares generation by the sinusoidal wave Z and the first triangular wave A, when sinusoidal wave Z the 4th switch transistor T 4 conductings during less than the first triangular wave A, otherwise ends.
The drive signal S5 of the 5th switch transistor T 5 compares generation by the sinusoidal wave Z and the second triangular wave B, in the positive half period of sinusoidal wave Z, when sinusoidal wave Z the 5th switch transistor T 5 conductings during less than the second triangular wave B, otherwise ends; In the negative half-cycle of sinusoidal wave Z,, otherwise end when the 5th switch transistor T 5 conductings during greater than the second triangular wave B of the backward-wave of sinusoidal wave Z.
The drive signal S6 of the 6th switch transistor T 6 compares generation by the backward-wave and the first triangular wave A of sinusoidal wave Z, when the 6th switch transistor T 6 conductings during greater than the first triangular wave A of the backward-wave of sinusoidal wave Z, otherwise ends.
The invention also discloses four electrical level inverters of using above-mentioned four level topology unit, compare, can effectively reduce the cost of inverter, the structure of simplification inverter, thereby reduce encapsulation difficulty with four electrical level inverters of identical standard in the prior art.
Need to prove that four electrical level inverters comprise single-phase full-bridge inverter, phase three-wire three four electrical level inverters and three-phase and four-line four electrical level inverters.This three's identical point is: include the electric capacity string that is connected the DC power supply two ends; Difference is: comprise two four level topology unit in the single-phase full-bridge inverter, comprise three four level topology unit in phase three-wire three four electrical level inverters, comprise four four level topology unit in three-phase and four-line four electrical level inverters.But, four level topology unit in each inverter and the annexation between the electric capacity string, with and course of work basically identical.Respectively the structure of four electrical level inverters of various standards is described below.
Referring to Figure 10, Figure 10 is the topological diagram of a kind of single-phase full bridge four electrical level inverters disclosed by the invention.
These single-phase full bridge four electrical level inverters comprise electric capacity string the 32, the 1 level topology unit 33 and the two or four level topology unit 34.Wherein:
The one or four level topology unit 33 and the two or four level topology unit 34 are disclosed any the four level topology unit of preamble of the present invention, the structure of the one or four level topology unit 33 and the two or four level topology unit 34 and consistent with annexation between the electric capacity string 32.
Concrete; First end of first switching tube in the one or four level topology unit 33 and the two or the four level topology unit 34 all is connected to first end (being the anode of DC power supply 31) of first capacitor C 1; Second end of the 6th switching tube in the one or four level topology unit 33 and the two or the four level topology unit 34 all is connected to second end (being the negative terminal of DC power supply 31) of the 3rd capacitor C 3; The negative electrode of the anode of first clamp diode and second clamp diode all is connected to the common port of second capacitor C 2 and the 3rd capacitor C 3 in the one or four level topology unit 33 and the two or the four level topology unit 34; First end of the 3rd switching tube in the one or four level topology unit 33 and the two or the four level topology unit 34 all is connected to the common port of first capacitor C 1 and second capacitor C 2, and the ac output end AC of the one or four level topology unit 33 and the two or four level topology unit 34 is respectively as two ac output ends of single-phase full bridge four electrical level inverters.
Need to prove; Four operation modes that each four level topology unit has in single-phase full bridge four electrical level inverters shown in Figure 10; And the conducting sequential of four six switching tubes in the level topology unit is all consistent with four level topology unit shown in Figure 3, repeats no more at this.In addition; In the present invention's single-phase full bridge four electrical level inverters shown in Figure 10, the phase place and being used to of sine wave that is used to produce the drive signal of the one or four level topology unit 33 produces 180 ° of the phase phasic differences of sine wave of the drive signal of the two or four level topology unit 34.
When the present invention's single-phase full bridge four electrical level inverters shown in Figure 10 in use; Ac output end AC in the one or the four level topology unit 33 can be connected to an end of an AC load, and the ac output end AC in the two or the four level topology unit 34 can be connected to the other end of this AC load.
In addition, can further in single-phase full bridge four electrical level inverters shown in Figure 10, increase filter circuit, shown in figure 11.
This filtered circuit comprises first inductance L 1, second inductance L 2 and the capacitor C.
Wherein, first inductance L 1 is series at the ac output end AC and the AC load V of the one or four level topology unit 33
GBetween, second inductance L 2 is series at the ac output end AC and the AC load V of the two or four level topology unit 34
GBetween, capacitor C is parallel to AC load V
GTwo ends.
Single-phase full bridge four electrical level inverters disclosed by the invention are compared with diode clamp type single-phase full bridge four electrical level inverters of the prior art; All reduced the use of two clamp diodes in each four level topology unit; Therefore; Single-phase full bridge four electrical level inverters disclosed by the invention are compared with diode clamp type single-phase full bridge four electrical level inverters, have reduced the usage quantity of diode, thus effectively reduce inverter cost, simplified the structure of inverter and reduced its encapsulation difficulty; Compare with striding capacitance type single-phase full bridge four electrical level inverters of the prior art, reduced the use of 3 electric capacity, because the cost of electric capacity far above the cost of diode, therefore effectively reduces the cost of inverter.
Referring to Figure 12, Figure 12 is the topological diagram of a kind of phase three-wire three four electrical level inverters disclosed by the invention.
These phase three-wire three four electrical level inverters comprise electric capacity string the 32, the 1 level topology unit the 33, the 24 level topology unit 34 and the three or four level topology unit 35.Wherein:
The one or four level topology unit the 33, the 24 level topology unit 34 and the three or four level topology unit 35 are disclosed any the four level topology unit of preamble of the present invention, the structure of the one or four level topology unit the 33, the 24 level topology unit 34 and the three or four level topology unit 35 and consistent with annexation between the electric capacity string 32.
Concrete; First end of first switching tube in the one or four level topology unit the 33, the 24 level topology unit 34 and the three or the four level topology unit 35 all is connected to first end (being the anode of DC power supply 31) of first capacitor C 1; Second end of the 6th switching tube in the one or four level topology unit the 33, the 24 level topology unit 34 and the three or the four level topology unit 35 all is connected to second end (being the negative terminal of DC power supply 31) of the 3rd capacitor C 3; The negative electrode of the anode of first clamp diode and second clamp diode all is connected to the common port of second capacitor C 2 and the 3rd capacitor C 3 in the one or four level topology unit the 33, the 24 level topology unit 34 and the three or the four level topology unit 35; First end of the 3rd switching tube in the one or four level topology unit the 33, the 24 level topology unit 34 and the three or the four level topology unit 34 all is connected to the common port of first capacitor C 1 and second capacitor C 2, and the ac output end AC of the one or four level topology unit the 33, the 24 level topology unit 34 and the three or four level topology unit 35 is respectively as three ac output ends of phase three-wire three four electrical level inverters.
Need to prove; Four operation modes that each four level topology unit has in phase three-wire three four electrical level inverters shown in Figure 12; And the conducting sequential of four six switching tubes in the level topology unit is all consistent with four level topology unit shown in Figure 3, repeats no more at this.Simultaneously; In the present invention's phase three-wire three four electrical level inverters shown in Figure 12, the phase place of sine wave of phase place, drive signal that the phase place and being used to of sine wave that is used to produce the drive signal of the two or four level topology unit 34 produces the three or four level topology unit 35 of sine wave that is used to produce the drive signal of the one or four level topology unit 33 differs 120 ° successively.
When the present invention's phase three-wire three four electrical level inverters shown in Figure 10 in use, the ac output end AC in the one or the four level topology unit 33 can be connected to the first AC load v
G1An end, the ac output end AC in the two or the four level topology unit 34 can be connected to the second AC load v
G2An end, the ac output end AC of the three or four level topology unit 35 can be connected to the 3rd AC load v
G3An end, and each AC load v
G1, v
G2And v
G3The other end link together, shown in figure 13.
In addition, in phase three-wire three four electrical level inverters, filter circuit can also be set, referring to Figure 13.
This filter circuit comprises first inductance L 1, second inductance L 2, the 3rd inductance L 3, first capacitor C 1, second capacitor C 2 and the 3rd capacitor C 3.
Wherein, first inductance L 1 is series at the ac output end AC and the first AC load v of the one or four level topology unit 33
G1Between; Second inductance L 2 is series at the ac output end AC and the second AC load v of the two or four level topology unit 34
G2Between; The 3rd inductance L 3 is series at the ac output end AC and the 3rd AC load v of the three or four level topology unit 35
G3Between; One end of first capacitor C 1 is connected to first inductance L 1 and the first AC load v
G1Common port, an end of second capacitor C 2 is connected to second inductance L 2 and the second AC load v
G2Common port, an end of the 3rd capacitor C 3 is connected to the 3rd inductance L 3 and the 3rd AC load v
G3Common port, and the other end of the other end of first capacitor C 1, second capacitor C 2 is connected with the other end of the 3rd capacitor C 3.
Phase three-wire three four electrical level inverters disclosed by the invention are compared with diode clamp type phase three-wire three four electrical level inverters of the prior art; All reduced the use of two clamp diodes in each four level topology unit; Therefore; Phase three-wire three four electrical level inverters disclosed by the invention are compared with diode clamp type phase three-wire three four electrical level inverters, have reduced the usage quantity of diode, thus effectively reduce inverter cost, simplified the structure of inverter and reduced its encapsulation difficulty; Compare with striding capacitance type phase three-wire three four electrical level inverters of the prior art, reduced the use of 3 electric capacity, because the cost of electric capacity far above the cost of diode, therefore effectively reduces the cost of inverter.
Referring to Figure 14, Figure 14 is the topological diagram of a kind of three-phase and four-line four electrical level inverters disclosed by the invention.
These three-phase and four-line four electrical level inverters comprise electric capacity string the 32, the 1 level topology unit the 33, the 24 level topology unit the 34, the 34 level topology unit 35 and the four or four level topology unit 36.Wherein:
The one or four level topology unit the 33, the 24 level topology unit the 34, the 34 level topology unit 35 and the four or four level topology unit 36 are disclosed any the four level topology unit of preamble of the present invention, the structure of the one or four level topology unit the 33, the 24 level topology unit the 34, the 34 level topology unit 35 and the four or four level topology unit 36 and consistent with annexation between the electric capacity string 32.
Concrete; First end of first switching tube in the one or four level topology unit the 33, the 24 level topology unit the 34, the 34 level topology unit 35 and the four or the four level topology unit 36 all is connected to first end (being the anode of DC power supply 31) of first capacitor C 1; Second end of the 6th switching tube in the one or four level topology unit the 33, the 24 level topology unit the 34, the 34 level topology unit 35 and the four or the four level topology unit 36 all is connected to second end (being the negative terminal of DC power supply 31) of the 3rd electric capacity; The negative electrode of the anode of first clamp diode and second clamp diode all is connected to the common port of second capacitor C 2 and the 3rd capacitor C 3 in the one or four level topology unit the 33, the 24 level topology unit the 34, the 34 level topology unit 35 and the four or the four level topology unit 36; First end of the 3rd switching tube in the one or four level topology unit the 33, the 24 level topology unit the 34, the 34 level topology unit 35 and the four or the four level topology unit 36 all is connected to the common port of first capacitor C 1 and second capacitor C 2, and the ac output end AC of the one or four level topology unit the 33, the 24 level topology unit the 34, the 34 level topology unit 35 and the four or four level topology unit 36 is respectively four ac output ends of three-phase and four-line four electrical level inverters.
Need to prove; Four operation modes that each four level topology unit has in three-phase and four-line four electrical level inverters shown in Figure 14; And the conducting sequential of four six switching tubes in the level topology unit is all consistent with four level topology unit shown in Figure 3, repeats no more at this.Simultaneously; In three-phase and four-line four electrical level inverters shown in Figure 14; The phase place of sine wave of phase place, drive signal that the phase place and being used to of sine wave that is used to produce the drive signal of the three or four level topology unit 35 produces the four or four level topology unit 36 of sine wave that is used to produce the drive signal of the two or four level topology unit 34 differs 120 ° successively, and the phase place of sine wave that is used to produce the drive signal of the one or four level topology unit 33 is set according to the practical application scene.
When the present invention's three-phase and four-line four electrical level inverters shown in Figure 14 in use, the ac output end AC of the two or four level topology unit 34 is connected to the first AC load v
G1An end, the ac output end AC of the three or four level topology unit 35 is connected to the second AC load v
G2An end, the ac output end AC of the four or four level topology unit 36 is connected to the 3rd AC load v
G3An end, the ac output end AC of the one or four level topology unit 33 is connected to the first AC load v respectively
G1An end, the second AC load v
G2An end and the 3rd AC load v
G3An end, and, the first AC load v
G1The other end, the second AC load v
G2The other end and the 3rd AC load v
G3The other end link together, shown in figure 15.
In addition, in three-phase and four-line four electrical level inverters, filter circuit can also be set, referring to Figure 15.
This filter circuit comprises first inductance L 1, second inductance L 2, the 3rd inductance L 3, first capacitor C 1, second capacitor C 2 and the 3rd capacitor C 3.
Wherein, first inductance L 1 is series at the ac output end AC and the first AC load v of the two or four level topology unit 34
G1Between; Second inductance L 2 is series at the ac output end AC and the second AC load v of the three or four level topology unit 35
G2Between; The 3rd inductance L 3 is series at the ac output end AC and the 3rd AC load v of the four or four level topology unit 36
G3Between; One end of first capacitor C 1 is connected to first inductance L 1 and the first AC load v
G1Common port, an end of second capacitor C 2 is connected to second inductance L 2 and the second AC load v
G2Common port, an end of the 3rd capacitor C 3 is connected to the 3rd inductance L 3 and the 3rd AC load v
G3Common port, and the other end of the other end of first capacitor C 1, second capacitor C 2 and the other end of the 3rd capacitor C 3 are connected to the ac output end AC of the one or four level topology unit 33.
Three-phase and four-line four electrical level inverters disclosed by the invention are compared with diode clamp type three-phase and four-line four electrical level inverters of the prior art; All reduced the use of two clamp diodes in each four level topology unit; Therefore; Three-phase and four-line four electrical level inverters disclosed by the invention are compared with diode clamp type three-phase and four-line four electrical level inverters, have reduced the usage quantity of diode, thus effectively reduce inverter cost, simplified the structure of inverter and reduced its encapsulation difficulty; Compare with striding capacitance type three-phase and four-line four electrical level inverters of the prior art, reduced the use of 3 electric capacity,
To sum up; Four electrical level inverters disclosed by the invention; Can be single-phase full bridge system, three-phase three-wire system and three-phase four-wire system; Compare with diode clamp type four electrical level inverters of identical standard, all reduced the use of two clamp diodes in each four level topology unit, thus effectively reduce inverter cost, simplified the structure of inverter and reduced its encapsulation difficulty; Compare with striding capacitance type four electrical level inverters of identical standard, reduced the use of 3 electric capacity, because the cost of electric capacity far above the cost of diode, therefore effectively reduces the cost of inverter.
The invention also discloses a kind of four level DCs and exchange conversion chip, see Fig. 9.Portion is packaged with one four level topology unit within it; This four level topology unit is that above-mentioned disclosed any one the four level topology unit of the application (describe referring to preamble by concrete structure; Repeat no more at this); This four level DC exchanges conversion chip and also comprises five exits, and these five exits are respectively the common port, second end and the Section Point of the 6th switching tube of negative electrode of anode and second clamp diode of first end, first clamp diode of first end, the 3rd switching tube of first switching tube.
Each embodiment adopts the mode of going forward one by one to describe in this specification, and what each embodiment stressed all is and the difference of other embodiment that identical similar part is mutually referring to getting final product between each embodiment.For the disclosed device of embodiment, because it is corresponding with the embodiment disclosed method, so description is fairly simple, relevant part is partly explained referring to method and is got final product.
To the above-mentioned explanation of the disclosed embodiments, make this area professional and technical personnel can realize or use the present invention.Multiple modification to these embodiment will be conspicuous concerning those skilled in the art, and defined General Principle can realize under the situation that does not break away from the spirit or scope of the present invention in other embodiments among this paper.Therefore, the present invention will can not be restricted to these embodiment shown in this paper, but will meet and principle disclosed herein and features of novelty the wideest corresponding to scope.
Claims (10)
1. level topology unit; Be applied in four electrical level inverters; It is characterized in that, comprise first switching tube, second switch pipe, the 3rd switching tube, the 4th switching tube, the 5th switching tube, the 6th switching tube, first clamp diode, second clamp diode and six diodes;
Said first switching tube, second switch pipe, the 3rd switching tube, the 4th switching tube, the 5th switching tube and the 6th switching tube be diode of reverse parallel connection respectively;
The anode of DC power supply is connected to the negative terminal of said DC power supply successively through first electric capacity, second electric capacity and the 3rd electric capacity;
First end, second end that first end of said first switching tube is connected to said first electric capacity are connected to first node; First end of said second switch pipe is connected to said first node, second end is connected to Section Point; First end of said the 5th switching tube is connected to said Section Point, second end is connected to the 3rd node; First end of said the 6th switching tube is connected to second end that said the 3rd node, second end are connected to said the 3rd electric capacity; First end, second end that first end of said the 3rd switching tube is connected to said second electric capacity are connected to the 4th node; First end of said the 4th switching tube is connected to said Section Point, second end is connected to said the 4th node; Second end, negative electrode that the anode of said first clamp diode is connected to said second electric capacity are connected to said first node; The anode of said second clamp diode is connected to second end that said the 3rd node, negative electrode are connected to said second electric capacity; Said Section Point is the ac output end of said four level topology unit.
2. four level topology unit according to claim 1 is characterized in that, said four level topology unit comprise four operation modes, are respectively:
First operation mode, said first switching tube and the conducting of second switch pipe, the rest switch pipe ends;
Second operation mode, said the 3rd switching tube and the 4th switching tube conducting, the rest switch pipe ends;
The 3rd operation mode, said second switch pipe and the 5th switching tube conducting, the rest switch pipe ends;
The 4th operation mode, said the 5th switching tube and the 6th switching tube conducting, the rest switch pipe ends.
3. four level topology unit according to claim 2; It is characterized in that; The drive signal of said first switching tube, second switch pipe, the 3rd switching tube, the 4th switching tube, the 5th switching tube and the 6th switching tube is confirmed with first triangular wave and/or second triangular wave through relatively more sinusoidal wave; Said first triangular wave has identical frequency and amplitude with second triangular wave, and the trough of said first triangular wave equals the crest of said second triangular wave;
The drive signal of said first switching tube compares generation by said sine wave and said first triangular wave, when the said first switching tube conducting during greater than said first triangular wave of said sine wave, otherwise ends;
The drive signal of said second switch pipe compares generation by the backward-wave and said first triangular wave of said sine wave, when the said second switch pipe conducting during less than said first triangular wave of the backward-wave of said sine wave, otherwise ends;
The drive signal of said the 3rd switching tube compares generation by said sine wave and said second triangular wave; In the positive half period of said sine wave; When said the 3rd switching tube conducting during of said sine wave, otherwise end, in the negative half-cycle of said sine wave greater than said second triangular wave; When said the 3rd switching tube conducting during less than said second triangular wave of the backward-wave of said sine wave, otherwise end;
The drive signal of said the 4th switching tube compares generation by said sine wave and said first triangular wave, when said the 4th switching tube conducting during less than said first triangular wave of said sine wave, otherwise ends;
The drive signal of said the 5th switching tube compares generation by said sine wave and said second triangular wave; In the positive half period of said sine wave; When said the 5th switching tube conducting during of said sine wave, otherwise end, in the negative half-cycle of said sine wave less than said second triangular wave; When said the 5th switching tube conducting during greater than said second triangular wave of the backward-wave of said sine wave, otherwise end;
The drive signal of said the 6th switching tube compares generation by the backward-wave and said first triangular wave of said sine wave, when said the 6th switching tube conducting during greater than said first triangular wave of the backward-wave of said sine wave, otherwise ends.
4. single-phase full bridge four electrical level inverters is characterized in that, comprise electric capacity string, the one or four level topology unit and the two or four level topology unit;
Said electric capacity string is in series by first electric capacity, second electric capacity and the 3rd electric capacity successively, and the anode of DC power supply is connected to the negative terminal of said DC power supply successively through said first electric capacity, second electric capacity and the 3rd electric capacity;
Said the one or four level topology unit and the two or four level topology unit are each described four level topology unit of claim 1 to 3; First end of first switching tube all is connected to first end of said first electric capacity in said the one or four level topology unit and the two or the four level topology unit; Second end of the 6th switching tube all is connected to second end of said the 3rd electric capacity in said the one or four level topology unit and the two or the four level topology unit; The negative electrode of the anode of first clamp diode and second clamp diode all is connected to the common port of said second electric capacity and the 3rd electric capacity in said the one or four level topology unit and the two or the four level topology unit; First end of the 3rd switching tube all is connected to the common port of said first electric capacity and second electric capacity in said the one or four level topology unit and the two or the four level topology unit, and the ac output end of said the one or four level topology unit and the two or four level topology unit is respectively as two ac output ends of said single-phase full bridge four electrical level inverters;
The phase place and being used to that is used to produce the sine wave of said the one or four level topology unit drive signal produces 180 ° of the phase phasic differences of the sine wave of said the two or four level topology unit drive signal.
5. single-phase full bridge four electrical level inverters according to claim 4 is characterized in that:
The ac output end of said the one or four level topology unit is connected to an end of an AC load, and the ac output end of said the two or four level topology unit is connected to the other end of said AC load;
Also comprise filter circuit in said single-phase full bridge four electrical level inverters, said filter circuit comprises first inductance, second inductance and electric capacity; Said first inductance is series between the ac output end and said AC load of said the one or four level topology unit; Said second inductance is series between the ac output end and said AC load of said the two or four level topology unit; Said electric capacity is parallel to said AC load two ends.
6. phase three-wire three four electrical level inverters is characterized in that, comprise electric capacity string, the one or four level topology unit, the two or four level topology unit and the three or four level topology unit;
Said electric capacity string is in series by first electric capacity, second electric capacity and the 3rd electric capacity successively, and the anode of DC power supply is connected to the negative terminal of said DC power supply successively through said first electric capacity, second electric capacity and the 3rd electric capacity;
Said the one or four level topology unit, the two or four level topology unit and the three or four level topology unit are each described four level topology unit of claim 1 to 3; First end of first switching tube all is connected to first end of said first electric capacity in said the one or four level topology unit, the two or four level topology unit and the three or the four level topology unit; Second end of the 6th switching tube all is connected to second end of said the 3rd electric capacity in said the one or four level topology unit, the two or four level topology unit and the three or the four level topology unit; The negative electrode of the anode of first clamp diode and second clamp diode all is connected to the common port of said second electric capacity and the 3rd electric capacity in said the one or four level topology unit, the two or four level topology unit and the three or the four level topology unit; First end of the 3rd switching tube all is connected to the common port of said first electric capacity and second electric capacity in said the one or four level topology unit, the two or four level topology unit and the three or the four level topology unit, and the ac output end of said the one or four level topology unit, the two or four level topology unit and the three or four level topology unit is respectively as three ac output ends of said phase three-wire three four electrical level inverters;
Be used to produce the phase place that the phase place of the sine wave of said the one or four level topology unit drive signal, the phase place and being used to that is used to produce the sine wave of said the two or four level topology unit drive signal produce the sine wave of said the three or four level topology unit drive signal and differ 120 ° successively.
7. phase three-wire three four electrical level inverters according to claim 6 is characterized in that:
The ac output end of said the one or four level topology unit is connected to an end of first AC load; The ac output end of said the two or four level topology unit is connected to an end of second AC load; The ac output end of said the three or four level topology unit is connected to an end of the 3rd AC load, and the other end of the other end of said first AC load, said second AC load is connected with the other end of said the 3rd AC load;
Also comprise filter circuit in said phase three-wire three four electrical level inverters, said filter circuit comprises first inductance, second inductance, the 3rd inductance, first electric capacity, second electric capacity and the 3rd electric capacity; Said first inductance is series between the ac output end and said first AC load of said the one or four level topology unit; Said second inductance is series between the ac output end and said second AC load of said the two or four level topology unit; Said the 3rd inductance is series between the ac output end and said the 3rd AC load of said the three or four level topology unit; One end of said first electric capacity is connected to the common port of said first inductance and first AC load; One end of said second electric capacity is connected to the common port of said second inductance and second AC load; One end of said the 3rd electric capacity is connected to the common port of said the 3rd inductance and the 3rd AC load, and the other end of the other end of said first electric capacity, said second electric capacity is connected with the other end of said the 3rd electric capacity.
8. three-phase and four-line four electrical level inverters is characterized in that, comprise electric capacity string, the one or four level topology unit, the two or four level topology unit, the three or four level topology unit and the four or four level topology unit;
Said electric capacity string is in series by first electric capacity, second electric capacity and the 3rd electric capacity successively, and the anode of DC power supply is connected to the negative terminal of said DC power supply successively through said first electric capacity, second electric capacity and the 3rd electric capacity;
Said the one or four level topology unit, the two or four level topology unit, the three or four level topology unit and the four or four level topology unit are each described four level topology unit of claim 1 to 3; First end of first switching tube in said the one or four level topology unit, the two or four level topology unit, the three or four level topology unit and the four or the four level topology unit all is connected to first end of said first electric capacity; Second end of the 6th switching tube all is connected to second end of said the 3rd electric capacity in said the one or four level topology unit, the two or four level topology unit, the three or four level topology unit and the four or the four level topology unit; The negative electrode of the anode of first clamp diode and second clamp diode all is connected to the common port of said second electric capacity and the 3rd electric capacity in said the one or four level topology unit, the two or four level topology unit, the three or four level topology unit and the four or the four level topology unit; First end of the 3rd switching tube all is connected to the common port of said first electric capacity and second electric capacity in said the one or four level topology unit, the two or four level topology unit, the three or four level topology unit and the four or the four level topology unit, and the ac output end of said the one or four level topology unit, the two or four level topology unit, the three or four level topology unit and the four or four level topology unit is respectively four ac output ends of said three-phase and four-line four electrical level inverters;
Be used to produce the phase place that the phase place of the sine wave of the two or four level topology unit drive signal, the phase place and being used to that is used to produce the sine wave of the three or four level topology unit drive signal produce the sine wave of the four or four level topology unit drive signal and differ 120 ° successively.
9. three-phase and four-line four electrical level inverters according to claim 8 is characterized in that:
The ac output end of said the two or four level topology unit is connected to an end of first AC load; The ac output end of said the three or four level topology unit is connected to an end of second AC load; The ac output end of said the four or four level topology unit is connected to an end of the 3rd AC load; The ac output end of said the one or four level topology unit is connected to an end of an end of said first AC load, said second AC load and an end of the 3rd AC load respectively, and the other end of the other end of said first AC load, said second AC load is connected with the other end of said the 3rd AC load;
Also comprise filter circuit in said three-phase and four-line four electrical level inverters, said filter circuit comprises first inductance, second inductance, the 3rd inductance, first electric capacity, second electric capacity and the 3rd electric capacity; Said first inductance is series between the ac output end and said first AC load of said the two or four level topology unit; Said second inductance is series between the ac output end and said second AC load of said the three or four level topology unit; Said the 3rd inductance is series between the ac output end and said the 3rd AC load of said the four or four level topology unit; One end of said first electric capacity is connected to the common port of said first inductance and first AC load; One end of said second electric capacity is connected to the common port of said second inductance and second AC load; One end of said the 3rd electric capacity is connected to the common port of said the 3rd inductance and the 3rd AC load, and the other end of the other end of said first electric capacity, said second electric capacity and the other end of said the 3rd electric capacity are connected to the ac output end of said the one or four level topology unit.
10. a level DC exchanges conversion chip; It is characterized in that; Comprise each described four level topology unit in the claim 1 to 3; Also comprise five exits, said five exits are respectively the common port, second end and the Section Point of the 6th switching tube of negative electrode of anode and second clamp diode of first end, first clamp diode of first end, the 3rd switching tube of first switching tube.
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103490656A (en) * | 2013-10-10 | 2014-01-01 | 哈尔滨工业大学 | Four-level inverter topological structure based on H-bridge and carrier modulation method thereof |
| CN105162345A (en) * | 2015-09-16 | 2015-12-16 | 上海交通大学 | Four-level DC-AC converter for DC microgrid |
| WO2017076367A1 (en) * | 2015-11-06 | 2017-05-11 | 汪洪亮 | Single-phase four-level inverter circuit topology and three-phase four-level inverter circuit topology |
| CN107733272A (en) * | 2017-11-07 | 2018-02-23 | 江苏固德威电源科技股份有限公司 | Four level three-phase grid-connected inverters and its modulator approach and electricity generation system |
| CN108667334A (en) * | 2018-05-11 | 2018-10-16 | 易事特集团股份有限公司 | A kind of four level topology units |
| CN108900105A (en) * | 2018-08-16 | 2018-11-27 | 珠海泰芯半导体有限公司 | A kind of carrier wave stacking phase-shifting control method of three-phase tri-level inverter circuit |
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP2141794A2 (en) * | 2008-07-01 | 2010-01-06 | Converteam Technology Ltd | Three-level converter |
| JP4599959B2 (en) * | 2004-09-17 | 2010-12-15 | 富士電機ホールディングス株式会社 | Multi-level converter and control method thereof |
-
2012
- 2012-02-20 CN CN201210038505.8A patent/CN102594185B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4599959B2 (en) * | 2004-09-17 | 2010-12-15 | 富士電機ホールディングス株式会社 | Multi-level converter and control method thereof |
| EP2141794A2 (en) * | 2008-07-01 | 2010-01-06 | Converteam Technology Ltd | Three-level converter |
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| CN103490656A (en) * | 2013-10-10 | 2014-01-01 | 哈尔滨工业大学 | Four-level inverter topological structure based on H-bridge and carrier modulation method thereof |
| CN105162345A (en) * | 2015-09-16 | 2015-12-16 | 上海交通大学 | Four-level DC-AC converter for DC microgrid |
| CN105162345B (en) * | 2015-09-16 | 2019-01-25 | 上海交通大学 | A kind of four electrical level DC-AC converters of direct-current micro-grid |
| WO2017076367A1 (en) * | 2015-11-06 | 2017-05-11 | 汪洪亮 | Single-phase four-level inverter circuit topology and three-phase four-level inverter circuit topology |
| CN108476000A (en) * | 2015-11-06 | 2018-08-31 | 汪洪亮 | Four electrical level inverter topological circuit of single-phase four electrical level inverters topological circuit and three-phase |
| CN108476000B (en) * | 2015-11-06 | 2020-06-30 | 汪洪亮 | Single-phase four-level inverter topology circuit and three-phase four-level inverter topology circuit |
| CN107733272A (en) * | 2017-11-07 | 2018-02-23 | 江苏固德威电源科技股份有限公司 | Four level three-phase grid-connected inverters and its modulator approach and electricity generation system |
| CN107733272B (en) * | 2017-11-07 | 2023-07-07 | 固德威技术股份有限公司 | Four-level three-phase grid-connected inverter, modulation method thereof and power generation system |
| CN108667334A (en) * | 2018-05-11 | 2018-10-16 | 易事特集团股份有限公司 | A kind of four level topology units |
| CN108667334B (en) * | 2018-05-11 | 2023-11-03 | 易事特集团股份有限公司 | Four-level topological unit |
| CN108900105A (en) * | 2018-08-16 | 2018-11-27 | 珠海泰芯半导体有限公司 | A kind of carrier wave stacking phase-shifting control method of three-phase tri-level inverter circuit |
| CN110518821A (en) * | 2019-07-01 | 2019-11-29 | 山东大学 | A kind of six level converter of high-frequency and its topological circuit and modulator approach |
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