CN102568604A - BCH (Broadcast Channel) encoder and decoder - Google Patents
BCH (Broadcast Channel) encoder and decoder Download PDFInfo
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- CN102568604A CN102568604A CN2011104032845A CN201110403284A CN102568604A CN 102568604 A CN102568604 A CN 102568604A CN 2011104032845 A CN2011104032845 A CN 2011104032845A CN 201110403284 A CN201110403284 A CN 201110403284A CN 102568604 A CN102568604 A CN 102568604A
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Abstract
The invention is suitable for the technical field of communication and provides a BCH (Broadcast Channel) encoder. The BCH encoder is provided with a code word input end and an encoding calculation unit, wherein the encoding calculation unit comprises at least two complementation circuits used for encoding calculation of the code words, the input end of a first complementation circuit is connected with the code word input end through a first switch, and the input end of a second complementation circuit is also connected with the code word input end through a second switch. The invention provides a BCH decoder correspondingly, and the BCH decoder also comprises at least two complementation circuits used for decoding calculation. Therefore, the encoder and the decoder have double error correcting capabilities, by properly enlarging the verifying data space of BCH codes, the delaying is lowered, and the error correcting property is improved.
Description
Technical field
The present invention relates to communication technical field, relate in particular to a kind of Bose-Chaudhuri-Hocquenghem Code device and demoder.
Background technology
The error correcting technique that is applied to solid state hard disc at present mainly is BCH, and cataloged procedure is realized through the division circuit complementation.Decode procedure is divided into three parts, at first is complementation, uses linear feedback shift register to realize on the hardware, is the calculating of syndrome then successively, and key equation solving is the money search procedure at last.When BCH code of design carries out Error Correction of Coding; Usually will consider the employed area in error correction coding/decoding unit and economize as far as possible, sluggish (latency) is short as far as possible, simultaneously; Employed checking data space also will be lacked as far as possible; Error-correcting performance is also high as much as possible, yet to require some be that competing, present BCH encoding and decoding error correction all is through merely increasing checking data or increasing code length and improve error correcting capability in practical application for these; And meanwhile, but sacrificed data space or sluggish.
Can know that to sum up existing Bose-Chaudhuri-Hocquenghem Code device and demoder obviously exist inconvenience and defective, so be necessary to improve on reality is used.
Summary of the invention
To above-mentioned defective, the object of the present invention is to provide a kind of Bose-Chaudhuri-Hocquenghem Code device and demoder, it not only can reduce sluggishness, can also improve the error correcting capability of BCH code.
To achieve these goals; The present invention provides a kind of Bose-Chaudhuri-Hocquenghem Code device; Have a code word input end and coding computing unit; Said coding computing unit comprises two-way complementation circuit at least, and the coding that all is used for code word calculates, and the input end of the first complementation circuit connects said code word input end through first switch; The input end of the second complementation circuit also connects said code word input end through second switch.
According to Bose-Chaudhuri-Hocquenghem Code device of the present invention, said code word input end connects a buffer, is used for the said code word of buffer memory.
According to Bose-Chaudhuri-Hocquenghem Code device of the present invention, the output terminal of the said first complementation circuit, the second complementation circuit and buffer all is connected in a multiplexer, and through said multiplexer output data.
According to Bose-Chaudhuri-Hocquenghem Code device of the present invention, each corresponding generator polynomial of the said first complementation circuit and the second complementation circuit.
According to Bose-Chaudhuri-Hocquenghem Code device of the present invention, said Bose-Chaudhuri-Hocquenghem Code device is a scale-of-two Bose-Chaudhuri-Hocquenghem Code device.
The present invention provides a kind of BCH demoder accordingly; Have a code word input end and conciliate yardage calculation unit; Said decoding computing unit comprises two-way complementation circuit at least, and the decoding that all is used for code word is calculated, and the input end of the 3rd complementation circuit connects said code word input end through the 3rd switch; The input end of the 4th complementation circuit also connects said code word input end through the 4th switch.
According to BCH demoder of the present invention, said BCH demoder also comprises
The error message computing unit is used to calculate the errors present information of confirming said decoded code word;
Error correction unit is used for said mistake is carried out error correction;
Said the 3rd complementation circuit is connected in said error message computing unit, and said the 4th complementation circuit is connected in said error message computing unit through a buffer, and said error message computing unit is connected in said error correction unit.
According to BCH demoder of the present invention, said error message computing unit comprises:
The syndrome computation subunit is used for calculating and obtains syndrome;
The key equation solving subelement is used for confirming key equation according to said syndrome, and finds the solution;
Money is searched for subelement, is used to obtain the root of key equation, and output error message.
Control sub unit is used to control the reference position that said money is searched for.
According to BCH demoder of the present invention, each corresponding generator polynomial of said the 3rd complementation circuit and the 4th complementation circuit.
According to BCH demoder of the present invention, said BCH demoder is two to advance the BCM demoder.
The present invention realizes the Code And Decode of BCH through two-way complementation circuit is set respectively; Better, every road complementation circuit corresponding generates polynomial expression, corresponding different respectively error correcting capabilities; When one tunnel code word occur correcting wrong the time, can carry out the strong error correction of secondary through another road.Whereby, encoder of the present invention can increase the checking data space of part BCH code, under the situation that does not increase sluggishness, improves error-correcting performance.
Description of drawings
Fig. 1 is the structural representation of Bose-Chaudhuri-Hocquenghem Code device of the present invention;
Fig. 2 is the structural representation of BCH demoder of the present invention.
Embodiment
In order to make the object of the invention, technical scheme and advantage clearer,, the present invention is further elaborated below in conjunction with accompanying drawing and embodiment.Should be appreciated that specific embodiment described herein only in order to explanation the present invention, and be not used in qualification the present invention.
Referring to Fig. 1, the invention provides a kind of Bose-Chaudhuri-Hocquenghem Code device 10, it has code word input end 11 and coding computing unit 12, and coding computing unit 12 is used for receiving code word and it being done division complementation computing from code word input end 11, obtains coding result whereby.
In practical application, the scale-of-two BCH code is one of the most frequently used BCH code, and the code element of scale-of-two BCH code is all taken from GF (2), and each code element polynomial expression must be times formula of generator polynomial, that is to say that generator polynomial is an a power time minimum code element polynomial expression.The code length of supposing certain scale-of-two primitive BCH code is n, and information bit is long to be k, and code polynomial is C (x), and generator polynomial is g (x), then has:
With t (x)=c (x) * x
N-k+ p (x) is as the data output after encoding.Through behind the channel at the decoding end, t (x) becomes r (x), if r (x) can be divided exactly by g (x), explain error-freely, otherwise explains and has made mistakes, and need carry out error correction.The highest power of g (x) is determined that by error correcting capability it equals the highest power of residue p (x).
The present invention is an example with scale-of-two Bose-Chaudhuri-Hocquenghem Code device, because of it has two-way complementation circuit, so corresponding two kinds of error correcting capabilities; Be respectively weak error correcting capability and strong error correcting capability; Simultaneously, the corresponding generator polynomial of every road complementation circuit, the weak error correcting capability of corresponding front and strong error correcting capability respectively.
For better describing the present invention, suppose among the embodiment that the code length that weak error correcting capability sign indicating number is corresponding is n1, code polynomial is M (x), the long k1=2kByte of information bit, generator polynomial is g1 (x), and weak error correction number is t1, and residue just check bit polynomial expression is Mr (x); The corresponding code length of strong error correcting capability sign indicating number is n2, and code polynomial is K (x), the long k2=4Kbyte of information bit, and generator polynomial is g2 (x), and strong error correction number is t2, and residue just check bit polynomial expression is Kr (x).In order to reduce the additional hardware expense that different galois fields brings, the present invention is in the same galois field two kinds of error correcting capabilities, and gets bigger galois field among both, gets GF (2 in this example
16).Figure below has represented to pass through the codeword structure of the 4Kbyte behind the scale-of-two Bose-Chaudhuri-Hocquenghem Code.
From last figure, can find out, code word 1 used weak error correcting capability, by M (x) * x
N1-k1/ g1 (x) produces Mr (x), code word 1 and code word 2 is used in combination strong error correcting capability, by K (x) * x
N2-k2/ g2 (x) produces Kr (x).Conspicuous, the structure of the Bose-Chaudhuri-Hocquenghem Code device 10 that two-way division circuit that need be shown in Figure 1 when coding constitutes with double-deck error correcting capability.A concrete course of work of Bose-Chaudhuri-Hocquenghem Code device 10 of the present invention is following: when first code word was imported, first switch S 1 was all closed with second switch S2, and two-way complementation circuit is worked simultaneously, at this moment also first code word is exported synchronously; Behind the first code word EOI, second code word is come, at this moment; With the output of the residue Mr (x) in the first complementation circuit 121 (to g1 (x) complementation), simultaneously S1 is broken off, S2 remains closed; Continuation inputs to second code word in the second complementation circuit 122 (to g2 (x) complementation), and also output synchronously of second code word is simultaneously accomplished until the input of second code word; Again the residue Kr (x) in the second complementation circuit 122 is exported the codeword structure behind the coding shown in just formation is upward shown whereby.
Again referring to Fig. 2; The invention provides a kind of BCH demoder 20, it has a code word input end 21 and conciliates yardage calculation unit 22, and said decoding computing unit 22 comprises two-way complementation circuit at least; The decoding that all is used for code word is calculated, the corresponding generator polynomial of every road complementation circuit.The input end of the 3rd complementation circuit 221 also connects code word input end 21 through the input end that the 3rd switch A connects code word input end 21, the four complementation circuit 222 through the 4th switch B.
Embodiments of the invention are the example explanation with scale-of-two BCH demoder; It comprises error message computing unit 23 and error correction unit 24; Error message computing unit 23 is used to calculate the errors present information of confirming said decoded code word; Error correction unit 24 is used for the mistake of decoded code word is corrected, and concrete is carries out the negate error correction to the code word of the position of corresponding error.The output terminal that the output terminal of the 3rd complementation circuit 221 is connected in error message computing unit 23, the four complementation circuit 222 is connected in error message computing unit 23 through a buffer 223, and the error message computing unit is connected in error correction unit 24.
In one embodiment of the invention, code word input end 21 also is connected in error correction unit 24 through another impact damper 25, and error message computing unit 23 comprises:
Syndrome computation subunit 231 is used for obtaining 2t syndrome according to the decoded data calculating of decoding computing unit 22, and t is the error correction number.
Key equation solving subelement 232 is used for confirming key equation according to syndrome, and finds the solution, and the process of key equation solving is exactly to utilize syndrome to find the solution the process of error location polynomial.
Money is searched for subelement 233, is used to obtain the root of key equation, and output error message.The process of money search is a process of searching root, and just with the root substitution of all possible error location polynomial, judging whether to make error location polynomial is 0, if be 0, then is the root of error location polynomial, just errors present.
Control sub unit 234 is used to control the reference position that money is searched for.
In one embodiment of the invention, the course of work of scale-of-two BCH demoder 20 is following: when first code word was imported, switch A and B were all closed; Two-way complementation circuit is worked simultaneously, and behind the first code word EOI, second code word is come; Break off the 3rd switch A this moment, and the 4th switch B remains closed.For the 3rd complementation circuit 221; To carry out weak BCH decoding, and, then continue second code word is imported in the 4th complementation circuit 222 for the 4th complementation circuit 222; Also need carry out strong BCH decoding simultaneously; These two processes are worked simultaneously, but the end meeting of the 4th complementation circuit 222 relatively lags behind than the end of the 3rd complementation circuit 221, so the error message computing unit 23 and error correction unit 24 of the shared latter half of two-way complementation circuit.After the money search of the 3rd complementation circuit 221 is accomplished; If the number of makeing mistakes that searches is not higher than the highest power of key equation; The mistake that first code word is described can be repaired; At this moment through the search reference position of control sub unit 234 controls the 4th complementation circuit 222 money search, make its mistake of only searching for second code word, reduce sluggish (latency); Otherwise; If it is unequal; Explain that then can not error correction miss has appearred in first code word, at this moment, the search reference position of the 4th complementation circuit 222 just must be since first code word; Strong error correction through the 4th complementation circuit 222 comes first code word is carried out the secondary error correction, improves the error correcting capability of whole codeword whereby.
In sum, the present invention realizes the Code And Decode of BCH through two-way complementation circuit is set respectively, better; Every road complementation circuit corresponding one generates polynomial expression; Can not correct appears in respectively corresponding different error correcting capabilities, the code word when a tunnel when wrong, can carry out the strong error correction of secondary through another road.Whereby, encoder of the present invention improves error-correcting performance through increasing the checking data space of some BCH codes under the situation that does not increase sluggishness.
Certainly; The present invention also can have other various embodiments; Under the situation that does not deviate from spirit of the present invention and essence thereof; Those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection domain of the appended claim of the present invention.
Claims (10)
1. Bose-Chaudhuri-Hocquenghem Code device; Have a code word input end and coding computing unit, it is characterized in that said coding computing unit comprises two-way complementation circuit at least; The coding that all is used for code word calculates, and the input end of the first complementation circuit connects said code word input end through first switch; The input end of the second complementation circuit also connects said code word input end through second switch.
2. Bose-Chaudhuri-Hocquenghem Code device according to claim 1 is characterized in that, said code word input end connects a buffer, is used for the said code word of buffer memory.
3. Bose-Chaudhuri-Hocquenghem Code device according to claim 2 is characterized in that, the output terminal of the said first complementation circuit, the second complementation circuit and buffer all is connected in a multiplexer, and through said multiplexer output data.
4. Bose-Chaudhuri-Hocquenghem Code device according to claim 1 is characterized in that, each corresponding generator polynomial of the said first complementation circuit and the second complementation circuit.
5. Bose-Chaudhuri-Hocquenghem Code device according to claim 1 is characterized in that, said Bose-Chaudhuri-Hocquenghem Code device is a scale-of-two Bose-Chaudhuri-Hocquenghem Code device.
6. BCH demoder; Have a code word input end and conciliate yardage calculation unit, it is characterized in that said decoding computing unit comprises two-way complementation circuit at least; The decoding that all is used for code word is calculated, and the input end of the 3rd complementation circuit connects said code word input end through the 3rd switch; The input end of the 4th complementation circuit also connects said code word input end through the 4th switch.
7. BCH demoder according to claim 6 is characterized in that, said BCH demoder also comprises
The error message computing unit is used to calculate the errors present information of confirming said decoded code word;
Error correction unit is used for said mistake is carried out error correction;
Said the 3rd complementation circuit is connected in said error message computing unit, and said the 4th complementation circuit is connected in said error message computing unit through a buffer, and said error message computing unit is connected in said error correction unit.
8. BCH demoder according to claim 7 is characterized in that, said error message computing unit comprises:
The syndrome computation subunit is used for calculating and obtains syndrome;
The key equation solving subelement is used for confirming key equation according to said syndrome, and finds the solution;
Money is searched for subelement, is used to obtain the root of key equation, and output error message.
Control sub unit is used to control the reference position that said money is searched for.
9. BCH demoder according to claim 6 is characterized in that, each corresponding generator polynomial of said the 3rd complementation circuit and the 4th complementation circuit.
10. BCH demoder according to claim 6 is characterized in that, said BCH demoder is a scale-of-two BCH demoder.
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| CN111200478A (en) * | 2018-11-19 | 2020-05-26 | 晨星半导体股份有限公司 | Demodulation device and demodulation method for digital satellite broadcast signals |
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| CN111200478A (en) * | 2018-11-19 | 2020-05-26 | 晨星半导体股份有限公司 | Demodulation device and demodulation method for digital satellite broadcast signals |
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