CN102521526B - Signal processing device based on soft data support target estimation - Google Patents

Signal processing device based on soft data support target estimation Download PDF

Info

Publication number
CN102521526B
CN102521526B CN201110454173.7A CN201110454173A CN102521526B CN 102521526 B CN102521526 B CN 102521526B CN 201110454173 A CN201110454173 A CN 201110454173A CN 102521526 B CN102521526 B CN 102521526B
Authority
CN
China
Prior art keywords
module
signal processing
target
soft data
receiving
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201110454173.7A
Other languages
Chinese (zh)
Other versions
CN102521526A (en
Inventor
刘轩
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sichuan Jiuzhou Electric Group Co Ltd
Original Assignee
Sichuan Jiuzhou Electric Group Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sichuan Jiuzhou Electric Group Co Ltd filed Critical Sichuan Jiuzhou Electric Group Co Ltd
Priority to CN201110454173.7A priority Critical patent/CN102521526B/en
Publication of CN102521526A publication Critical patent/CN102521526A/en
Application granted granted Critical
Publication of CN102521526B publication Critical patent/CN102521526B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Medical Treatment And Welfare Office Work (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)

Abstract

The invention discloses a signal processing device based on soft data support target estimation, comprising target equipment, a multi-layer target estimation system, a soft data support library management system and peripheral equipment which are connected mutually. In the multi-layer target estimation system, a signal processing module, a stimulation module, a receiving and transmitting front-end module and a receiving module are sequentially connected to form a loop and are respectively connected with the same interface control module, the receiving and transmitting front-end module is externally connected with the target equipment, and the interface control module is externally connected with the soft data support library management system and the peripheral equipment. By the aid of the signal processing device based on soft data support target estimation, target estimation reliability and anti-spoofing capacity can be improved, simultaneously, target conclusion information is enriched specifically, the purpose of weakening differences such as uncertainties, granularities, dimensions, weak compatibilities and the like in multi-source conclusion is achieved, and the signal processing device is favorable for comprehensively estimating a target.

Description

The signal processing apparatus of estimating based on soft data support target
Technical field
The present invention relates to a kind of signal processing apparatus, particularly a kind of signal processing apparatus of estimating based on soft data support target.
Background technology
In target, estimate that the inside, field processes and substantially all need a large amount of hardware devices signal, existing device structure all very complicated, cost is also very expensive, and volume large, take up space.Use inconvenience very.
Summary of the invention
Goal of the invention of the present invention is: for the problem of above-mentioned existence, provide a kind of signal processing apparatus of estimating based on soft data support target.
The technical solution used in the present invention is such: a kind of signal processing apparatus of estimating based on soft data support target, comprises that interconnective target device, multilevel objectives estimating system, soft data support base management system and external unit; In described multilevel objectives estimating system, signal processing module, stimulating module, receiving and transmitting front end module and receiver module connect to form successively a loop and are connected with same interface control module respectively; The external target device of described receiving and transmitting front end module; The external soft data of described interface control module is supported base management system and external unit.
As optimal way, the chip that described signal processing module comprises FPGA, DSP, DSP external memory bus and has transmitting-receiving agreement, level conversion, isolation and driving function, between described FPGA and chip, exchange channel data and control signal and provide clock signal for DSP, exchange agreement data between described DSP and chip, described signal processing module is connected with transmission channel, receiving cable and external unit.
As optimal way, described multi-layer target estimating system also comprises information analysis characteristic module, characteristic vector sequence matching module and semantic information evidence judging module, and described soft data is supported to comprise characteristic base module, priori features vector set library module and semantic constraint condition library module in base management system.
In sum, owing to having adopted technique scheme, the invention has the beneficial effects as follows: this model can not only improve target and estimate confidence level and anti-deception ability, enriched targetedly target conclusion information simultaneously, reach and weaken the uncertainty that exists in multi-source conclusion, different grain size, different scale, the weak difference such as compatible, be beneficial to target and comprehensively estimate.
Accompanying drawing explanation
Fig. 1 is that system hardware of the present invention forms system chart.
Fig. 2 is target estimating system data flow diagram of the present invention.
Fig. 3 the present invention is based on the target algorithm for estimating model that soft data supports.
Fig. 4 is signal processing module hardware configuration conceptual scheme in Fig. 1.
Fig. 5 is the hardware instance schematic diagram of implementing scheme in Fig. 4.
Fig. 6 is signal processing module operational flow diagram in Fig. 1.
Fig. 7 is signal processing module initialization flowchart in Fig. 1.
Fig. 8 is that in Fig. 1, signal processing module target is estimated operational flowchart.
Fig. 9 is analogue system schematic diagram of the present invention.
Mark in figure: 1-1 is information analysis characteristic extracting module, 1-2 is characteristic vector sequence matching module, 1-3 is semantic information evidence judging module, 1-4 is characteristic base module, 1-5 is priori features vector set library module, 1-6 is semantic constraint condition library module, 2-1 is echo signal source, 2-2 is receiving cable, 2-3 is that signal is processed, 2-4 is that soft data is supported base management system, 2-5 is transmission channel, 3-1 is signal processing module, 3-2 is stimulating module, 3-3 is receiving and transmitting front end module, 3-4 is target device, 3-5 is receiver module, 3-6 is interface control module, 3-7 is external unit.
Embodiment
Below in conjunction with accompanying drawing, the present invention is described in detail.
As shown in Figure 1, a kind of signal processing apparatus of estimating based on soft data support target, comprises that interconnective target device 3-4, multilevel objectives estimating system, soft data support base management system and external unit 3-7; In described multilevel objectives estimating system, signal processing module 3-1, stimulating module 3-2, receiving and transmitting front end module 3-3 and receiver module 3-5 connect to form successively a loop and are connected with same interface control module 3-6 respectively; The external target device 3-4 of described receiving and transmitting front end module 3-3; The external soft data of described interface control module 3-6 is supported base management system 2-4 and external unit 3-7.
In the present invention, data flowchart as shown in Figure 2.When carrying out passive assessment, the modulation signal that echo signal source 2-1 sends directly converts digital signal to through receiving cable 2-2 and delivers to and in signal processing module 3-1, carry out signal and process 2-3, and signal processing module 3-1 completes target by the support of outside soft data storehouse 2-4 and estimates to resolve; If active sensor, needs to use transmission channel 2-5, by first launching the closed-loop process receiving again, complete the estimation to target.
As shown in Figure 3, described multi-layer target estimating system inside also comprises three functional modules such as information analysis characteristic module 1-1, characteristic vector sequence matching module 1-2 and semantic information evidence judging module 1-3, and described soft data is supported to comprise and this three functional module characteristic of correspondence data knowledge library module 1-4, priori features vector set library module 1-5 and semantic constraint condition library module 1-6 in base management system.
As shown in Figure 4, Figure 5, the chip that described signal processing module 3-1 comprises FPGA, DSP, DSP external memory bus and has transmitting-receiving agreement, level conversion, isolation and driving function, between described FPGA and chip, exchange channel data and control signal and provide clock signal for DSP, exchange agreement data between described DSP and chip, described signal processing module 3-1 is connected with transmission channel, receiving cable and external unit 3-7.
FPGA is responsible for providing channel module interface, and transceiver channel data also complete coding and decoding, transmits control signal, simultaneously for DSP provides clock to channel module; The management, multi-layer target that DSP is responsible for device interior soft data estimate judgement and and external unit between message exchange.
FLASH in signal processing module 3-1, SDRAM, FPGA are all hung in DSP peripheral hardware memory bus, by data/address bus, conduct interviews.FLASH is used for storing target signature knowledge base data, and SDRAM, for storing when the required target feature vector collection of subtask and constraint condition database data, also needs target signature knowledge base data to move to SDRAM from FLASH, to promote operation efficiency under duty.Signal processing module 3-1 manages by DSP/BIOS operating system, realizes command analysis, task triggering, state control.
Signal processing module 3-1 operational scheme is as shown in Figure 6: module powers on and carries out module initialization 5-1, enter subsequently waiting status 5-2, when receiving corresponding task order 5-3, target is estimated to 5-4 and result report 5-5, after task completes, again enter and wait for 5-2.
Module initialization has comprised that module hardware initialization and soft data support the configuration in storehouse, and its operational scheme is as Fig. 7: carry out hardware initialization, comprise the initial configuration 6-1 to FPGA, DSP and related peripheral chip; Read the external knowledge storehouse 6-2 of version number, if with FLASH in the inconsistent 6-3 of knowledge base version, need from outside, enroll knowledge base data and data FLASH are upgraded to 6-4; Knowledge base data are moved to the 6-5 to SDRAM from FLASH; From outside admission set of eigenvectors and constraint condition stock, enter SDRAM 6-6 again; The pre-service 6-7(that finally completes the relevant global variable of algorithm based on soft data storehouse comprises the calculating such as feature weight), thus the use configuration to soft data completed.
In signal processing module 3-1, carry out operational scheme that target estimate to process as Fig. 8: receive that, from 7-1 after the A/D data in echo signal source, FPGA carries out decoding, parses signal pulse series 7-2 signal; DSP supports 3 levels of carrying out in Fig. 1 by the soft data in SDRAM and estimates judgement, by feature knowledge storehouse 7-3, complete element extraction respectively and resolve 7-4, by extraordinary vector set storehouse 7-5, complete proper vector coupling 7-6, by constraint condition storehouse 7-7, complete information semantic judgement 7-6; Finally obtain the estimated result to target.
As shown in Figure 9, analogue system estimates that by 1 target device (detector simulation), 1 target terminal, 1 station server, 1 overlay device form.Target device can be replaced by detector; Target estimates that terminal is the hardware handles equipment that the present invention designs; Server is 1 PC, completes the management in soft data storehouse; Overlay device is simulated by 1 PC, by aobvious control interface software, to target, estimates that terminal issues work order, and shows passback result.
After system powers on, first server supports storehouse by predetermined protocol by soft data and transfers to target estimation terminal; Overlay device is carried out pattern configurations by display and control software to estimating terminal, and terminal enters duty; When terminal, receive after the signal from target device, signal is carried out pre-service, resolved, finally complete target and estimate, and to overlay device reported result, in display and control software, demonstrate the whole course of work.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, all any modifications of doing within the spirit and principles in the present invention, be equal to and replace and improvement etc., within all should being included in protection scope of the present invention.

Claims (1)

1. a signal processing apparatus of estimating based on soft data support target, is characterized in that: comprise that interconnective target device (3-4), multilevel objectives estimating system, soft data support base management system and external unit (3-7); In described multilevel objectives estimating system, signal processing module (3-1), stimulating module (3-2), receiving and transmitting front end module (3-3) and receiver module (3-5) connect to form successively a loop and are connected with same interface control module (3-6) respectively; The external target device of described receiving and transmitting front end module (3-3) (3-4); The external soft data of described interface control module (3-6) is supported base management system (2-4) and external unit (3-7); The chip that described signal processing module (3-1) comprises FPGA, DSP, DSP external memory bus and has transmitting-receiving agreement, level conversion, isolation and driving function, between described FPGA and chip, exchange channel data and control signal and provide clock signal for DSP, exchange agreement data between described DSP and chip, described signal processing module (3-1) is connected with transmission channel, receiving cable and external unit (3-7); Described multi-layer target estimating system also comprises information analysis characteristic module (1-1), characteristic vector sequence matching module (1-2) and semantic information evidence judging module (1-3), and described soft data is supported to comprise and these three functional module characteristic of correspondence data knowledge library modules (1-4), priori features vector set library module (1-5) and semantic constraint condition library module (1-6) in base management system.
CN201110454173.7A 2011-12-30 2011-12-30 Signal processing device based on soft data support target estimation Expired - Fee Related CN102521526B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201110454173.7A CN102521526B (en) 2011-12-30 2011-12-30 Signal processing device based on soft data support target estimation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201110454173.7A CN102521526B (en) 2011-12-30 2011-12-30 Signal processing device based on soft data support target estimation

Publications (2)

Publication Number Publication Date
CN102521526A CN102521526A (en) 2012-06-27
CN102521526B true CN102521526B (en) 2014-07-16

Family

ID=46292437

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201110454173.7A Expired - Fee Related CN102521526B (en) 2011-12-30 2011-12-30 Signal processing device based on soft data support target estimation

Country Status (1)

Country Link
CN (1) CN102521526B (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101950019A (en) * 2010-09-08 2011-01-19 四川九洲电器集团有限责任公司 Method for identifying multi-level targets by secondary radar based on attributive data
CN102175997A (en) * 2010-12-01 2011-09-07 四川九洲电器集团有限责任公司 Air traffic control transponder side lobe inhibition time detecting mode
CN102213761A (en) * 2011-04-06 2011-10-12 哈尔滨工程大学 Multi-target location method of bistatic common-address multi-input-multi-output radar

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101950019A (en) * 2010-09-08 2011-01-19 四川九洲电器集团有限责任公司 Method for identifying multi-level targets by secondary radar based on attributive data
CN102175997A (en) * 2010-12-01 2011-09-07 四川九洲电器集团有限责任公司 Air traffic control transponder side lobe inhibition time detecting mode
CN102213761A (en) * 2011-04-06 2011-10-12 哈尔滨工程大学 Multi-target location method of bistatic common-address multi-input-multi-output radar

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
多传感器信息融合及其应用综述;王耀南等;《控制与决策》;20010930;第16卷(第5期);518-521 *
王耀南等.多传感器信息融合及其应用综述.《控制与决策》.2001,第16卷(第5期),

Also Published As

Publication number Publication date
CN102521526A (en) 2012-06-27

Similar Documents

Publication Publication Date Title
US10360170B2 (en) System, apparatus and method for wirelessly expanding serial communication port between electronic computing device and its peripheral device
RU2015129459A (en) NAVIGATION SYSTEM FOR MOBILE DEVICE
RU2008145039A (en) METHOD, SYSTEM AND COMPUTER SOFTWARE-IMPLEMENTED CODE FOR AUTOMATIC INSTALLATION OF TRAIN WITH DISTRIBUTED POWER
WO2014149498A3 (en) Remote secure transactions
EA201692086A1 (en) METHOD AND SYSTEM FOR IMPLEMENTING A WIRELESS DIGITAL WALL
JP2018014097A5 (en)
CN107450062B (en) The method, apparatus and system of antenna delay calibration
CN104613320A (en) Positioning device for pipeline blockage points
WO2010132165A3 (en) Aircraft dispatch information
RU2012140027A (en) INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING SYSTEM, INFORMATION PROCESSING METHOD AND INFORMATION MEDIA
CN109254262A (en) A kind of localization method and system of intelligent mine lamp
WO2019103149A3 (en) Residence network system for in-residence payment and information communication
CN102752396A (en) Embedded type sensing server and data control method thereof
CN102736578A (en) Multifunctional intelligent home terminal system
CN102521526B (en) Signal processing device based on soft data support target estimation
EP2973462B1 (en) Surveillance system with intelligently interchangeable cameras
US20150142937A1 (en) Method and system for remote equipment data installation
JP2010191882A5 (en)
CN107864005B (en) Portable satellite communication control system, satellite communication method and terminal device
CN203480263U (en) Intelligent energy efficiency terminal
CN108551475A (en) Data transmission method and device
CN104335552A (en) Data interface sleep mode logic
TW200720941A (en) Host computer memory configuration data remote access method and system
JP2008071332A (en) Usb peripheral device with dynamic change class, usb microprocessor, and operation method of usb peripheral device
CN203894411U (en) Special-purpose Beidou navigation remote service terminal for engineering vehicle

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20140716

Termination date: 20171230

CF01 Termination of patent right due to non-payment of annual fee