CN102437186A - Device structure beneficial to elimination of inverted U-shaped nickel silicide and preparation process thereof - Google Patents

Device structure beneficial to elimination of inverted U-shaped nickel silicide and preparation process thereof Download PDF

Info

Publication number
CN102437186A
CN102437186A CN201110222302XA CN201110222302A CN102437186A CN 102437186 A CN102437186 A CN 102437186A CN 201110222302X A CN201110222302X A CN 201110222302XA CN 201110222302 A CN201110222302 A CN 201110222302A CN 102437186 A CN102437186 A CN 102437186A
Authority
CN
China
Prior art keywords
amorphous carbon
oxide
carbon layer
coating
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201110222302XA
Other languages
Chinese (zh)
Other versions
CN102437186B (en
Inventor
郑春生
张文广
徐强
陈玉文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Huali Microelectronics Corp
Original Assignee
Shanghai Huali Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Huali Microelectronics Corp filed Critical Shanghai Huali Microelectronics Corp
Priority to CN201110222302.XA priority Critical patent/CN102437186B/en
Publication of CN102437186A publication Critical patent/CN102437186A/en
Application granted granted Critical
Publication of CN102437186B publication Critical patent/CN102437186B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Drying Of Semiconductors (AREA)

Abstract

The invention discloses a device structure beneficial to elimination of inverted U-shaped nickel silicide. The device structure comprises a silicon substrate, wherein a gate oxidation layer retaining structure is formed on the silicon substrate; a sample gate structure is formed on the gate oxidation layer retaining structure; and the top of the sample gate structure is provided with a groove. Through the device structure beneficial to elimination of inverted U-shaped nickel silicide and a preparation process thereof, a gate cutting angle caused by dry method etching used in a side wall preparation process and cavities generated in the process of integrating oxides between the gate and the side wall are effectively avoided, and then the finally formed gate nickel silicide is prevented from generating an inverted U shape. The process is simple and easy to control.

Description

A kind of device architecture and preparation technology thereof who helps to eliminate inverted U-shaped nickel silicide
Technical field
The present invention relates to the semiconductor fabrication technical field, relate to a kind of device architecture and preparation technology thereof who helps to eliminate inverted U-shaped nickel silicide specifically.
Background technology
In semi-conductive production technology; Around grid structure, generally all can relate to the side wall moulding process; Generally be used for all around gate structure through the formed side wall of side wall moulding process; Preventing more heavy dose of source/too approaching raceway groove of leakages injection, thereby cause the generation of source/leakage punch through.
But the dry etching that is adopted in the side wall moulding process is easy to cause the grid top rake, because the existence of grid top rake; Make the nickel of follow-up deposit on grid also can appear inverted U-shaped; Therefore cause in the process of integrating, to form certain cavity, and in fact when nickel and pasc reaction generation nickel silicide, nickel is a side who moves at the oxide between the side wall of follow-up grid and all around gate; Therefore, be easy to cause the final grid nickel silicide that forms to appear inverted U-shaped.
Summary of the invention
The object of the present invention is to provide a kind of device architecture and preparation technology thereof who helps to eliminate inverted U-shaped nickel silicide, the top rake of the grid structure that dry etching caused that it can effectively avoid in side wall forms technology, being adopted and the grid nickel silicide that is therefore caused appear inverted U-shaped.
For solving above-mentioned purpose, technical scheme provided by the present invention is:
A kind of device architecture that helps to eliminate the inverted U nickel silicide; Wherein, comprise a silicon substrate, be formed with gate oxide on the said silicon substrate and keep structure; Be formed with a sample grid structure on the described gate oxide reservation structure, the top of described sample grid structure respectively has a groove.
A kind of preparation technology who helps to eliminate the device architecture of inverted U nickel silicide wherein, comprises the steps:
Step S1: a silicon substrate is provided, on the said silicon substrate under deposit gate oxide, polysilicon layer, oxide skin(coating), amorphous carbon layer successively, and on said amorphous carbon layer, apply one deck photoresist;
Step S2: carry out photoetching process, form the opening that is arranged in said photoresist layer;
Step S3: with said photoresist is mask; Through the said amorphous carbon layer of said opening etching successively, said oxide skin(coating) and said polysilicon layer; Formation is arranged in the through hole of said amorphous carbon layer, the groove that is positioned at the through hole of said oxide skin(coating) and is positioned at said polysilicon layer respectively, and removes said photoresist;
Step S4: adopt the said amorphous carbon layer of dry etching etching, when making the thickness of said amorphous carbon layer reduce, enlarge the through hole that is arranged in said amorphous carbon layer;
Step S5: fill oxide in through hole in the through hole in said amorphous carbon layer, the said oxide skin(coating) and the groove in the said polysilicon layer;
Step S6: remove said amorphous carbon layer;
Step S7: with form among the step S5 to be arranged in the oxide that said amorphous carbon layer fills be mask; Said oxide skin(coating) of etching and said polysilicon layer successively; Form said sample grid structure and keep structure with the oxide skin(coating) that is positioned on the said sample grid structure; And remove the oxide in the former through hole that is filled in said amorphous carbon layer, keep the through hole that is filled in the said oxide skin(coating) and the oxide in the groove in the said polysilicon layer;
Step S8: remove said oxide skin(coating) and keep structure and the through hole and the oxide in the groove in the said polysilicon layer that are filled in the former said oxide skin(coating); And be the said gate oxide of mask etching with said sample grid structure, form the said sample grid structure that has groove and keep structure with the gate oxide that is positioned under the said sample grid structure.
Above-mentioned preparation technology wherein, removes said photoresist through ashing method in said step S3.
Above-mentioned preparation technology wherein, adopts the said amorphous carbon layer of dry etching etching, said oxide skin(coating) and the said polysilicon layer of isotropic in said step S3.
Above-mentioned preparation technology wherein, removes said amorphous carbon layer through ashing method in said step S6.
A kind of device architecture and preparation technology thereof who helps to eliminate inverted U-shaped nickel silicide of the present invention; The cavity that the grid top rake that dry etching caused that can effectively avoid in side wall preparation technology, being adopted and the oxide between grid and side wall are produced in integration process; And then can avoid the grid nickel silicide generation of final molding inverted U-shaped, technical process is simple and easy to control.
Description of drawings
Fig. 1 is a kind of structural representation that helps to eliminate the device architecture of inverted U-shaped nickel silicide of the present invention;
Fig. 2 is the preparation technology's of of the present invention a kind of device architecture that helps to eliminate inverted U-shaped nickel silicide shown in Figure 1 flow chart;
Fig. 2 A-2H is the cross-sectional view of the formed device architecture of each step in preparation technology's the flow chart of of the present invention a kind of device architecture that helps to eliminate inverted U-shaped nickel silicide shown in Figure 2.
Embodiment
Come a kind of device architecture and preparation technology thereof of eliminating inverted U-shaped nickel silicide of helping of the present invention done explanation in further detail below in conjunction with Figure of description and embodiment.
As shown in Figure 1; A kind of device architecture that helps to eliminate inverted U-shaped nickel silicide of the present invention; Comprise a silicon substrate 110; On silicon substrate 110, be formed with two sample grid structure 130a and 130b, between two sample grid structure 130a and 130b and silicon substrate 110, be formed with gate oxide respectively and keep structure 120a and 120b, sample grid structure 130 ' and 130 " the top respectively have a groove 130a and 130b.
A kind of preparation technology who helps to eliminate the device architecture of inverted U nickel silicide wherein, comprises the steps:
Step S1 a: silicon substrate 110 is provided, on silicon substrate 110, deposits gate oxide 120, polysilicon layer 130, oxide skin(coating) 140, amorphous carbon layer 150 from top to bottom successively, and on amorphous carbon layer 150, apply one deck photoresist 160;
Step S2: carry out photoetching process, form the opening 160a and the 160b that are arranged in photoresist 160;
Step S3: with photoresist 160 is mask; Adopt isotropic dry etching through opening 160a and 160b etching amorphous carbon layer 150, oxide skin(coating) 140 and polysilicon layer 130 successively; Form groove 130a and the 130b that is arranged in the through hole 150a and the 150b of amorphous carbon layer 150, the through hole 140a that is arranged in oxide skin(coating) 140 and 140b and is arranged in polysilicon layer 130 respectively, and remove photoresist 160 with ashing method;
Step S4: adopt dry etching etching amorphous carbon layer 150, when making the thickness of amorphous carbon layer 150 reduce, enlarge the through hole 150a and the 150b that are arranged in amorphous carbon layer 150, also promptly form through hole 150c and the 150d that is arranged in amorphous carbon layer 150;
Step S5: fill oxide among groove 130a in through hole 140a in through hole 150c in amorphous carbon layer 150 and 150d, the oxide skin(coating) 140 and 140b and the polysilicon layer 130 and the 130b forms oxide interstitital texture 1501 and 1502;
Step S6: remove amorphous carbon layer 150 with ashing method;
Step S7: be mask with oxide interstitital texture 1501 and 1502 respectively; Etching oxide layer 140 and polysilicon layer 130 successively; Form sample grid structure 130 ' and 130 " and be positioned at sample grid structure 130 ' and 130 " on oxide skin(coating) reservation structure 140c, 140d, 140e and 140f; And remove the former through hole 150c of amorphous carbon layer 150 and the oxide of 150d of being arranged in of oxide interstitital texture 1501 and 1502, the oxide of filling among through hole 140a in reservationization thing interstitital texture 1501 and 1502 the primary oxide layer 140 and the 140b and the oxide of groove 130a in the polysilicon layer 130 and the filling among the 130b;
Step S8: remove oxide skin(coating) and keep the oxide of filling among the oxide of filling among through hole 140a and the 140b in structure 140c, 140d, 140e and 140f, the primary oxide layer 140 and groove 130a in the polysilicon layer 130 and the 130b; And with sample grid structure 130 ' and 130 " be mask etching gate oxide 120, thereby form the sample grid structure 130 ' and 130 have groove 130a and 130b " and be positioned at said sample grid structure 130 ' and 130 " and silicon substrate 110 between gate oxide reservation structure 120a and 120b.
In sum; A kind of device architecture and preparation technology thereof who helps to eliminate inverted U-shaped nickel silicide of the present invention; The cavity that the grid top rake that dry etching caused that can effectively avoid in side wall preparation technology, being adopted and the oxide between grid and side wall are produced in integration process; And then can avoid the grid nickel silicide generation of final molding inverted U-shaped, technical process is simple and easy to control, is suitable for penetration and promotion and is suitable for.
Should be pointed out that foregoing is enumerating of specific embodiment of the present invention, equipment of wherein not describing in detail to the greatest extent and structure are construed as with the common mode in this area to be implemented; And above-mentioned specific embodiment is not to be used for limiting practical range of the present invention, and promptly all equivalent transformation and modifications of doing according to content of the patent of the present invention all fall into protection scope of the present invention.

Claims (5)

1. device architecture that helps to eliminate the inverted U nickel silicide; It is characterized in that, comprise a silicon substrate, form gate oxide on the said silicon substrate and keep structure; Be formed with sample grid structure on the described gate oxide reservation structure, the top of said sample grid structure respectively has a groove.
2. a preparation technology who helps to eliminate the device architecture of inverted U nickel silicide as claimed in claim 1 is characterized in that, comprises the steps:
Step S1 a: silicon substrate is provided, on said silicon substrate, deposits gate oxide, polysilicon layer, oxide skin(coating), amorphous carbon layer from bottom to up successively, and on said amorphous carbon layer, apply one deck photoresist;
Step S2: carry out photoetching process, form the opening that is arranged in said photoresist layer;
Step S3: with said photoresist is mask; Through the said amorphous carbon layer of said opening etching successively, said oxide skin(coating) and said polysilicon layer; Formation is arranged in the through hole of said amorphous carbon layer, the groove that is positioned at the through hole of said oxide skin(coating) and is positioned at said polysilicon layer respectively, and removes said photoresist;
Step S4: adopt the said amorphous carbon layer of dry etching etching, when making the thickness of said amorphous carbon layer reduce, enlarge the through hole that is arranged in said amorphous carbon layer;
Step S5: fill oxide in through hole in the through hole in said amorphous carbon layer, the said oxide skin(coating) and the groove in the said polysilicon layer;
Step S6: remove said amorphous carbon layer;
Step S7: with form among the step S5 to be arranged in the oxide that said amorphous carbon layer fills be mask; Said oxide skin(coating) of etching and said polysilicon layer successively; Form said sample grid structure and keep structure with the oxide skin(coating) that is positioned on the said sample grid structure; And remove the oxide in the former through hole that is filled in said amorphous carbon layer, keep the through hole that is filled in the said oxide skin(coating) and the oxide in the groove in the said polysilicon layer;
Step S8: remove said oxide skin(coating) and keep structure and the through hole and the oxide in the groove in the said polysilicon layer that are filled in the former said oxide skin(coating); And be the said gate oxide of mask etching with said sample grid structure, form said sample grid structure and the gate oxide between said sample grid structure and said silicon substrate that has groove and keep structure.
3. preparation technology as claimed in claim 2 is characterized in that, in said step S3, removes said photoresist through ashing method.
4. preparation technology as claimed in claim 2 is characterized in that, in said step S3, adopts the said amorphous carbon layer of dry etching etching, said oxide skin(coating) and the said polysilicon layer of isotropic.
5. preparation technology as claimed in claim 2 is characterized in that, in said step S6, removes said amorphous carbon layer through ashing method.
CN201110222302.XA 2011-08-04 2011-08-04 Device structure beneficial to elimination of inverted U-shaped nickel silicide and preparation process thereof Active CN102437186B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201110222302.XA CN102437186B (en) 2011-08-04 2011-08-04 Device structure beneficial to elimination of inverted U-shaped nickel silicide and preparation process thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201110222302.XA CN102437186B (en) 2011-08-04 2011-08-04 Device structure beneficial to elimination of inverted U-shaped nickel silicide and preparation process thereof

Publications (2)

Publication Number Publication Date
CN102437186A true CN102437186A (en) 2012-05-02
CN102437186B CN102437186B (en) 2014-09-03

Family

ID=45985164

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201110222302.XA Active CN102437186B (en) 2011-08-04 2011-08-04 Device structure beneficial to elimination of inverted U-shaped nickel silicide and preparation process thereof

Country Status (1)

Country Link
CN (1) CN102437186B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102569052A (en) * 2011-11-11 2012-07-11 上海华力微电子有限公司 Device structure conducive to eliminating U-shaped nickel silicide and corresponding technology thereof

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1319881A (en) * 2000-03-09 2001-10-31 三星电子株式会社 Method for forming self-aligning contact welding disc in metal inlay grid technology
JP2005019892A (en) * 2003-06-27 2005-01-20 Semiconductor Leading Edge Technologies Inc Semiconductor device and manufacturing method therefor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1319881A (en) * 2000-03-09 2001-10-31 三星电子株式会社 Method for forming self-aligning contact welding disc in metal inlay grid technology
JP2005019892A (en) * 2003-06-27 2005-01-20 Semiconductor Leading Edge Technologies Inc Semiconductor device and manufacturing method therefor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102569052A (en) * 2011-11-11 2012-07-11 上海华力微电子有限公司 Device structure conducive to eliminating U-shaped nickel silicide and corresponding technology thereof
CN102569052B (en) * 2011-11-11 2015-06-17 上海华力微电子有限公司 Device structure conducive to eliminating U-shaped nickel silicide and corresponding technology thereof

Also Published As

Publication number Publication date
CN102437186B (en) 2014-09-03

Similar Documents

Publication Publication Date Title
TW201130131A (en) Compound semiconductor device and method of manufacturing the same
JP2013016785A5 (en)
CN105514022B (en) The method that portion surface forms field silica in the trench
CN103367157A (en) Preparation method of super junction MOSFET
CN102184868B (en) Improve the method for reliability of apex gate oxide of trench gate
CN103094087B (en) The method of etching groove polysilicon gate
CN108010847A (en) Shield grid groove MOSFET and its manufacture method
CN102655081B (en) A kind of shallow junction of amorphous carbon sacrificial gate electrode structure and the preparation method of side wall
CN102437186B (en) Device structure beneficial to elimination of inverted U-shaped nickel silicide and preparation process thereof
CN102543716B (en) The forming method of blocking layer of metal silicide
CN102468128A (en) Method for forming deep-trench polysilicon
WO2010093567A3 (en) Method for fabricating a semiconductor device having a lanthanum-family-based oxide layer
CN103855021A (en) Manufacturing method for FinFET device
CN107507766B (en) A kind of metal gates preparation method of 3D nand memory
CN103151270A (en) Manufacturing method for schottky barrier component of grooved metal-oxide semiconductor
WO2012083230A3 (en) High efficiency rectifier
MY162310A (en) Method for fabricating a bottom oxide layer in a trench
CN104425350A (en) Semiconductor device and preparation method thereof
CN103839868A (en) Manufacturing method for shallow-trench isolation structure
WO2012074228A3 (en) Nitride semiconductor device and method for manufacturing same
CN102916047B (en) SOI body contact structure and the formation method of oxygen corrosion technology are buried in a kind of utilization
CN102130004A (en) Preparation method of trench type MOS (metal oxide semiconductor) device
CN203325911U (en) Silicon controlled rectifier chip composition with gate-cathode PN junction protected by table board
CN205248281U (en) Ditch cell type FRD chip
CN104465349B (en) Manufacturing method of trench gate semiconductor device

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant