CN102402969B - Display device and display method thereof - Google Patents

Display device and display method thereof Download PDF

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CN102402969B
CN102402969B CN201010286329.0A CN201010286329A CN102402969B CN 102402969 B CN102402969 B CN 102402969B CN 201010286329 A CN201010286329 A CN 201010286329A CN 102402969 B CN102402969 B CN 102402969B
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signal
export
feedback
output enable
enable signal
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CN102402969A (en
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李欣忆
刘岳修
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Novatek Microelectronics Corp
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Novatek Microelectronics Corp
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Abstract

The invention relates to a display device and a display method thereof. The display device comprises a panel, an abnormal detection unit, a state identification unit, a scanning driver and a data driver. The abnormal detection unit is used for detection an abnormal state to output a state feedback signal. The state identification unit is used for changing a first output enabling signal into a second output enabling signal according to the state feedback signal. The scanning driver is used for outputting a scanning signal to drive the panel according to a clock signal and the second output enabling signal. At least one scanning signal is masked by the second output enabling signal. The data driver is used for outputting a signal data to the panel.

Description

Display device and display packing thereof
Technical field
The invention relates to a kind of display device and display packing thereof, and particularly about a kind of display device and display packing thereof that prevents from showing error picture.
Background technology
Referring to Fig. 1 and Fig. 2, it is the schematic diagram of conventional display device that Fig. 1 illustrates, and it is the signal timing diagram of conventional display device that Fig. 2 illustrates.Conventional display device 1 comprises panel 11, scanner driver 14, data driver 15 and time schedule controller 16.Scanner driver 14 further comprises several turntable driving integrated circuit 142, and data driver 15 further comprises several data-driven integrated circuits 152.Clock signal CLK exported by time schedule controller 16 and YCLK, the first output enable signal YOE1, data-signal DATA1 and data import signal LD, and gated sweep drive integrated circult 142 output scanning signal G (1) are to G (N), and control data-driven integrated circuit 152 outputting data signals DATA2.
But the abnormality such as static discharge (Electrostatic Discharge, ESD) and power supply noise (Power Noise) easily cause data driver 15 that the situation of error in data occurs.Moreover, aforementioned abnormality also likely causes the sweep signal of scanner driver 34 output errors.For instance, when the data-signal DATA2 of data driver 15 is in the time that abnormality 20 appears in data cycle T 4, data import signal LD and the data-signal DATA2 that affected by abnormality 20 are imported to the data line of panel 31 in importing cycle T 5 controlling data driver 15.Now, because corresponding sweep signal G (2) changes into activation level, therefore, panel 11 will show error picture.
Summary of the invention
The object of this invention is to provide a kind of display device and display packing thereof, can be in static discharge (ElectrostaticDischarge, ESD) and when the abnormality such as power supply noise (Power Noise) occurs, the sweep signal that shade is corresponding, to prevent from showing error picture.
According to an aspect of the present invention, a kind of display device is proposed.Display device comprises panel, abnormality detection unit, state recognition unit, scanner driver and data driver.Abnormality detection unit inspection abnormality is with output state feedback signal.State recognition unit is changed into the second output enable signal according to feedback of status signal by the first output enable signal.Scanner driver is according to clock signal and the second output enable signal output scanning signal driver panel, at least one of them sweep signal of the second output enable signal shade (Mask).Data driver outputting data signals is to panel.
According to a further aspect in the invention, a kind of display packing is proposed.Display packing comprises: detect abnormality with output state feedback signal; According to feedback of status signal, the first output enable signal is changed into the second output enable signal; And according to clock signal and the second output enable signal output scanning signal driver panel, at least one of them sweep signal of the second output enable signal shade (Mask), and outputting data signals is to panel.
Useful technique effect of the present invention is: can shade in the time that abnormality the occurs corresponding sweep signal of display device of the present invention is to prevent from showing error picture.
Accompanying drawing explanation
For foregoing of the present invention can be become apparent, below cooperation accompanying drawing is elaborated to preferred embodiment of the present invention, wherein:
Fig. 1 is the schematic diagram of conventional display device.
Fig. 2 is the signal timing diagram of conventional display device.
Fig. 3 is the schematic diagram according to a kind of display device of preferred embodiment of the present invention.
Fig. 4 is the process flow diagram according to a kind of display packing of preferred embodiment of the present invention.
Fig. 5 is a kind of signal timing diagram according to preferred embodiment of the present invention.
Fig. 6 is time schedule controller is exported the second output enable signal schematic diagram according to the feedback of status signal of data driver output.
Fig. 7 is time schedule controller is exported the second output enable signal schematic diagram according to the feedback of status signal of scanner driver output.
Fig. 8 is scanner driver produces the second output enable signal schematic diagram according to the feedback of status signal of data driver output.
Fig. 9 is the schematic diagram of the first abnormality detection unit.
Figure 10 is the signal timing diagram of the first abnormality detection unit.
Figure 11 is the schematic diagram of the second abnormality detection unit.
Figure 12 is the signal timing diagram of the second abnormality detection unit.
Figure 13 is the schematic diagram of state recognition unit.
Embodiment
Following embodiment is about a kind of display device and display packing thereof.Display device comprises panel, abnormality detection unit, state recognition unit, scanner driver and data driver.Abnormality detection unit inspection abnormality is with output state feedback signal.State recognition unit is changed into the second output enable signal according to feedback of status signal by the first output enable signal.Scanner driver is according to clock signal and the second output enable signal output scanning signal driver panel, at least one of them sweep signal of the second output enable signal shade (Mask).Data driver outputting data signals is to panel.
Display packing comprises: detect abnormality with output state feedback signal; According to feedback of status signal, the first output enable signal is changed into the second output enable signal; And according to clock signal and the second output enable signal output scanning signal driver panel, at least one of them sweep signal of the second output enable signal shade (Mask), and outputting data signals is to panel.
Referring to Fig. 3, Fig. 4 and Fig. 5, Fig. 3 is the schematic diagram according to a kind of display device of preferred embodiment of the present invention, it is the process flow diagram according to a kind of display packing of preferred embodiment of the present invention that Fig. 4 illustrates, and Fig. 5 is a kind of signal timing diagram according to preferred embodiment of the present invention.Display device 3 comprises panel 31, abnormality detection unit 32, state recognition unit 33, scanner driver 34 and data driver 35.First as shown in step 41, abnormality detection unit 32 is in order to detect abnormality 50 with output state feedback signal SF, abnormality 50 is for example static discharge (Electrostatic Discharge, and power supply noise (Power Noise) etc., and abnormality 50 easily causes data driver 35 that the situation of error in data occurs ESD).In addition, abnormality 50 also likely causes the sweep signal of scanner driver 34 output errors.
Then as shown in step 42, state recognition unit 33 is changed into the second output enable signal YOE2 according to feedback of status signal SF by the first output enable signal YOE1, and the pulse bandwidth of the second output enable signal YOE2 is to be for example greater than the first output enable signal YOE1.Then as shown in step 43, scanner driver 34 according to clock signal YCLK and the second output enable signal YOE2 output scanning signal G (1) to G (N) drive panel 31, the second output enable signal YOE2 shade sweep signal G (1) to G (N) at least one of them.In addition, data driver 35 outputting data signals DATA2 are to panel 31.After abnormality 50 generations, sweep signal corresponding to the second output enable signal YOE2 meeting shade (Mask), therefore can prevent that display device 3 from showing abnormal picture.
For instance, when the data-signal DATA2 of data driver 35 is in the time that abnormality 50 appears in data cycle T 1, data import signal LD and the data-signal DATA2 that affected by abnormality 50 are imported to the data line of panel 31 in importing cycle T 2 controlling data driver 35.The second output enable signal YOE2 can be in sweep signal G (2) corresponding to shade cycle T 3 shades, makes sweep signal G (2) show to prevent panel 31 the misdata signal DATA2 that affected by abnormality 50 in disable level.It should be noted that, the length of shade cycle T 3 can modulation, make the second output enable signal YOE2 can the several sweep signals of shade, several sweep signal or a whole image time (Frame Time).
Please refer to Fig. 6, Fig. 6 is time schedule controller is exported the second output enable signal schematic diagram according to the feedback of status signal of data driver output.Display device 3 also comprises time schedule controller 36.Scanner driver 34 further comprises several turntable driving integrated circuit 342, and data driver 35 further comprises several data-driven integrated circuits 352.Aforementioned abnormality detection unit 32 is to be for example arranged in data-driven integrated circuit 352, to detect abnormality.And state recognition unit 33 is to be for example arranged in time schedule controller 36, the first output enable signal YOE1 is changed into the second output enable signal YOE2 according to feedback of status signal SF.
Please refer to Fig. 7, Fig. 7 is time schedule controller is exported the second output enable signal schematic diagram according to the feedback of status signal of scanner driver output.Fig. 7 and Fig. 6 difference are: aforementioned abnormality detection unit 32 is for example to change in the turntable driving integrated circuit 342 that is arranged at scanner driver 34, to detect abnormality.And the state recognition unit 33 that is positioned at time schedule controller 36 is changed into the second output enable signal YOE2 according to feedback of status signal SF by the first output enable signal YOE1.
Please refer to Fig. 8, Fig. 8 is scanner driver produces the second output enable signal schematic diagram according to the feedback of status signal of data driver output.Fig. 8 and Fig. 6 difference are: aforesaid state recognition unit 33 is for example to change in the turntable driving integrated circuit 342 that is arranged at scanner driver 34, the first output enable signal YOE1 is changed into the second output enable signal YOE2 according to feedback of status signal SF.Turntable driving integrated circuit 342 is exported aforementioned sweep signal G (1) to G (N) according to clock signal YCLK and the second output enable signal YOE2.
Referring to Fig. 9 and Figure 10, Fig. 9 is the schematic diagram of the first abnormality detection unit, and Figure 10 is the signal timing diagram of the first abnormality detection unit.Aforementioned abnormality detection unit 32 is take abnormality detection unit 32 (1) as example explanation in Fig. 9.Abnormality detection unit 32 (1) comprises phase-locked loop 32a (Phase Locked Loop, PLL), comparer 32b and phase inverter 32c.Phase-locked loop 32a receives the first clock signal CLK1, and exports the second clock signal CLK2 according to the first clock signal CLK1 of input.
Comparer 32b is according to the first clock signal CLK1 and the second clock signal CLK2 output comparison signal C1.Furthermore, after abnormality 50 occurs, the frequency of the first clock signal CLK1 and the second clock signal CLK2 will be not identical, and make CLK2 output comparison signal C1.Phase inverter 32c is according to comparison signal C1 output state feedback signal SF.
Referring to Figure 11 and Figure 12, Figure 11 is the schematic diagram of the second abnormality detection unit, and Figure 12 is the signal timing diagram of the second abnormality detection unit.Aforementioned abnormality detection unit 32 is take abnormality detection unit 32 (2) as example explanation in Figure 11.Abnormality detection unit 32 (2) comprises capacitor C, the first diode D1, the second diode D2 and bias voltage testing circuit 322.The first diode D1 is in parallel with capacitor C, and the second diode D2 is coupled to capacitor C and the first diode D1.Bias voltage testing circuit 322 is the stored voltage V in capacitor C bbe greater than the first level V aor be less than second electrical level V ctime, output state feedback signal SF.
Furthermore, bias voltage testing circuit 322 comprises the first comparer 322a, the second comparer 322b and logical circuit 322c, and logical circuit 322c is for example and door (AND Gate).The first comparer 322a is according to stored voltage V band the first level V aexport the first comparison signal C2, and the second comparer 322b is according to stored voltage V band second electrical level V cexport the second comparison signal C3.Logical circuit 322c is according to the first comparison signal C2 and the second comparison signal C3 output state feedback signal SF.
For instance, upwards pull while causing the first diode D1 conducting when the voltage of power supply noise 60, capacitor C is discharged through the first diode D1, makes the stored voltage V of capacitor C bdecline.As the stored voltage V of capacitor C bdrop to second electrical level V ctime, the second comparer 322b exports the second comparison signal C3.On the contrary, pull downwards while causing the second diode D2 conducting when the voltage of power supply noise 70, capacitor C is charged through the second diode D2, makes the stored voltage V of capacitor C brise.As the stored voltage V of capacitor C brise to the first level V atime, the first comparer 322a exports the first comparison signal C2.Logical circuit 322c is according to the first comparison signal C2 and the second comparison signal C3 output state feedback signal SF.
Please refer to Figure 13, Figure 13 is the schematic diagram of state recognition unit.State recognition unit 33 comprises control module 332 and logical block 334.
Control module 332 is according to feedback of status signal SF and periodic signal P output control signal C4, and periodic signal P is for example for aforementioned data imports signal LD or clock signal YCLK.Control module 332 is for example to count a default value according to periodic signal P, exports control signal C4 to logical block 334 in the time that control module 332 counts up to default value.Logical block 334 is exported the second output enable signal YOE2 according to control signal C4 and the first output enable signal YOE1, and wherein logical block 334 is for example and door (AND Gate).
The disclosed display device of the above embodiment of the present invention is that shade is corresponding in the time that abnormality occurs sweep signal is to prevent from showing error picture.
In sum, although the present invention discloses as above with preferred embodiment, but it is not in order to limit the present invention.Persond having ordinary knowledge in the technical field of the present invention, without departing from the spirit and scope of the present invention, when doing the various changes that are equal to or replacement.Therefore, protection scope of the present invention is when being as the criterion of defining depending on accompanying the application's claim scope.

Claims (9)

1. a display device, is characterized in that, comprising:
One panel;
One abnormality detection unit, in order to detect an abnormality to export a feedback of status signal;
One state recognition unit, in order to change into one second output enable signal according to this feedback of status signal by one first output enable signal;
One scan driver, drives this panel in order to export multiple sweep signals according to a clock signal and this second output enable signal, these these sweep signals of the second output enable signal shade at least one of them; And
One data driver, in order to export multiple data-signals to this panel,
Wherein, this abnormality detection unit comprises: an electric capacity; And a bias voltage testing circuit, when a stored voltage that is used to this electric capacity is greater than one first level or is less than a second electrical level, export this feedback of status signal.
2. display device according to claim 1, is characterized in that, this abnormality detection unit comprises:
One phase-locked loop, in order to receive one first clock signal, and according to this first clock signal output one second clock signal;
One comparer, in order to export a comparison signal according to this first clock signal and this second clock signal; And
One phase inverter, in order to export this feedback of status signal according to this comparison signal.
3. display device according to claim 1, is characterized in that, this abnormality detection unit further comprises:
One first diode, itself and this Capacitance parallel connection; And
One second diode, it is coupled to this electric capacity and this first diode.
4. display device according to claim 3, is characterized in that, this bias voltage testing circuit comprises:
One first comparer, in order to export one first comparison signal according to this stored voltage and this first level;
One second comparer, in order to export one second comparison signal according to this stored voltage and this second electrical level; And
One logical circuit, in order to export this feedback of status signal according to this first comparison signal and this second comparison signal.
5. display device according to claim 1, is characterized in that, this state recognition unit comprises:
One control module, in order to export a control signal according to this feedback of status signal and a periodic signal; And
One logical block, in order to export this second output enable signal according to this control signal and this first output enable signal.
6. a display packing, is characterized in that comprising:
Detect an abnormality to export a feedback of status signal;
According to this feedback of status signal, one first output enable signal is changed into one second output enable signal; And
Export multiple sweep signals according to a clock signal and this second output enable signal and drive a panel, these these sweep signals of the second output enable signal shade at least one of them, and export multiple data-signals to this panel,
Wherein, this abnormality of this detection comprises with the step of exporting this feedback of status signal: detect a stored voltage of an electric capacity, in the time that this stored voltage is greater than one first level or is less than a second electrical level, export this feedback of status signal.
7. display packing according to claim 6, is characterized in that, this abnormality of this detection comprises with the step of exporting this feedback of status signal:
Input one first clock signal to phase-locked loop to export one second clock signal;
Export a comparison signal according to this first clock signal and this second clock signal; And
Export this feedback of status signal according to this comparison signal.
8. display packing according to claim 6, is characterized in that, this step of this feedback of status signal of this output comprises:
According to this stored voltage and this first level output one first comparison signal;
According to this stored voltage and this second electrical level output one second comparison signal; And
Export this feedback of status signal according to this first comparison signal and this second comparison signal.
9. display packing according to claim 6, is characterized in that, this step of this first output enable signal being changed into this second output enable signal according to this feedback of status signal comprises:
Export a control signal according to this feedback of status signal and a periodic signal; And
Export this second output enable signal according to this control signal and this first output enable signal.
CN201010286329.0A 2010-09-07 2010-09-07 Display device and display method thereof Active CN102402969B (en)

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TWI579820B (en) * 2015-06-11 2017-04-21 友達光電股份有限公司 Display and driving method thereof

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KR102383287B1 (en) * 2015-06-29 2022-04-05 주식회사 엘엑스세미콘 Source driver including a detecting circuit and display device
TWI630591B (en) 2017-05-11 2018-07-21 友達光電股份有限公司 Displaying device and protecting circuit thereof
CN108053789B (en) * 2018-02-12 2021-02-05 合肥鑫晟光电科技有限公司 Display device, gate driver and control method thereof
CN110299110B (en) * 2019-06-28 2020-10-02 上海天马有机发光显示技术有限公司 Driving method of grid driving circuit, grid driving circuit and display device

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Publication number Priority date Publication date Assignee Title
TWI579820B (en) * 2015-06-11 2017-04-21 友達光電股份有限公司 Display and driving method thereof

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