CN102402475B - CPU (Central Processing Unit) single event effect testing method for space navigation - Google Patents
CPU (Central Processing Unit) single event effect testing method for space navigation Download PDFInfo
- Publication number
- CN102402475B CN102402475B CN201010283528.6A CN201010283528A CN102402475B CN 102402475 B CN102402475 B CN 102402475B CN 201010283528 A CN201010283528 A CN 201010283528A CN 102402475 B CN102402475 B CN 102402475B
- Authority
- CN
- China
- Prior art keywords
- register
- cpu
- test
- single particle
- particle effect
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
The invention discloses a CPU (Central Processing Unit) single event effect testing method for space navigation, which comprises the step of: carrying out a single event effect test on regions, such as a register in a CPU, an internal Cache and an operation logic unit, which are more sensitive to a single event phenomenon, wherein the single event test to the register comprises a semi-static test and a semi-dynamic test. In the invention, through systemically monitoring the single event occurring rate of each module inside a microprocessor, the sensitivity degree of each part of a modern microprocessor to the single event effect can be objectively evaluated, reference basis is further provided for completely evaluating the radiation-resisting capacity of the microprocessor, an evaluation method is provided for selecting the microprocessor in the space navigation engineering, and the defect that the traditional testing method is not practical due to extremely complex interface requirements, large design difficulty of an operation system, and high development cost of common hardware is overcome.
Description
Technical field
The present invention relates to single particle effect technical field of measurement and test, particularly CPU single particle effect test method for a kind of aerospace.
Background technology
Conventional microprocessor single particle effect test method has:
A) unit self-test method: tested device is a part for system is carried out self-test simultaneously in the course of work, error logging is got off;
B) the auxiliary control method of unit: peripheral control unit detects and is saved in external memory storage by the output of test device and by result;
C) the auxiliary gold plaque method of controlling: two identical microprocessors are worked in succession, one by irradiation, another conductively-closed.With outside controller relatively and the output of recording two microprocessors;
D) unit control method: controller provides input to device, monitors its output continuously, and compared with desired value;
E) unit control gold plaque method: controller provides identical input signal to two identical devices, and by irradiation, another conductively-closed.
Relatively seeing the following form of several typical method of testings:
Table 1 is in the past for the comparison of the Lung biopsy of microprocessor radiation test
In recent years, because the work efficiency ratio of the commercial microprocessor without radiation hardened processing is higher through the processor of radiation hardened processing, and have more superior electric property, the application without the commercial microprocessor of radiation hardened processing in space is just causing the increasing interest of people.Classic method also can be used on modern processors in principle.But because interface requirement is extremely complicated, and the difficult design of operating system is large, conventional hardware development cost is very high, so traditional detection method seems impracticable to current microprocessor.In all classic methods, except first method, in message exchange, travelling speed is subject to the restriction of the travelling speed of controller.Controller is generally a miniature or small-size computer, and the time of its collection and storage data needs tens microseconds.Therefore,, in the time that controller is collected roll data, the clock frequency of the microprocessor in test must be interrupted.Import " average clock frequency " and carry out the average clock rate of regulation test period.At present, complex microprocessors method of testing generally adopts the method for testing based on " development board ".
Summary of the invention
(1) technical matters that will solve
The technical problem to be solved in the present invention is how to overcome in the past method of testing because interface requirement is extremely complicated, the difficult design of operating system is large, the very high shortcoming of conventional hardware development cost, design the method for testing of system, effectively solved the problem that in microprocessor (CPU), single event is difficult to monitoring.
(2) technical scheme
CPU single particle effect test method for a kind of aerospace, comprises register, inner Cache and arithmetic and logical unit in CPU is carried out to single particle effect test, and the single particle effect test of described register, for semi-static test, comprises the steps:
Initial configuration register before irradiation test writes initial value in register;
In irradiation process, cyclically read and detected register in value, if detect that upset mistake, misregistration daily record, and reconfigure described register occur numerical value;
Repeat back, stop test until count when N upset mistake or irradiation reach the fluence of accumulative total regulation, described N is positive integer.
Wherein, described register is order register, in described semi-static test process, programmable counter and order register is called continuously, and other register is static.
Wherein, described N is more than or equal to 100.
Wherein, when the single particle effect test of described register is half dynamic test, comprise the following steps:
In register A, write initial value;
In the time of irradiation, the initial value in described register A is transferred to register B and special register, then return to register A using described initial value as rreturn value;
Described rreturn value and initial value are made comparisons, if rreturn value is different from initial value, add up single event, continue test otherwise write new value in register A.
Wherein, in described CPU, inner Cache single particle effect test comprises the following steps:
Reading external memory data cyclically when irradiation, and described data are write to Cache;
Read data and described external memory storage data in Cache and compare, if having not identically, record inner Cache single-particle inversion has occurred.
Wherein, described external memory storage is identical with Cache capacity.
Wherein, in described CPU, the test of arithmetic and logical unit single particle effect comprises the following steps:
One section of algorithm routine of design in advance, when irradiation, CPU moves described algorithm routine;
Operation result and described algorithm routine correct result are compared, if result is not identical, record arithmetic and logical unit or single event has occurred other control section, and stop test;
Described algorithm routine heavy duty is entered to CPU operation, until there is new mistake.
(3) beneficial effect
By systematically monitoring the single event incidence of the each module of microprocessor internal, can the sensitivity of objective evaluation Modern microprocessor various piece to single particle effect, further for complete assessment microprocessor capability of resistance to radiation provides foundation, also for how selecting microprocessor that reference is provided in space technology; Overcome in the past method of testing because interface requirement is extremely complicated, the difficult design of operating system is large simultaneously, the very high so that unpractical shortcoming of conventional hardware development cost.
Brief description of the drawings
Fig. 1 is the minimal configuration system requiring in aerospace CPU single particle effect test method according to the present invention;
Fig. 2 is the semi-static test flow chart of single particle effect of register in aerospace CPU single particle effect test method according to the present invention;
Fig. 3 is the single particle effect half dynamic test process flow diagram of register in aerospace CPU single particle effect test method according to the present invention.
Embodiment
CPU single particle effect test method for the aerospace that the present invention proposes, is described as follows in conjunction with the accompanying drawings and embodiments.
CPU single particle effect test method for a kind of aerospace, comprises register, inner Cache and arithmetic and logical unit in CPU is carried out to single particle effect test, and register, inner Cache and arithmetic and logical unit are the comparatively responsive region of single particle phenomenon.As shown in Figure 1, CPU single particle effect test minimal configuration system.Single particle effect test to register comprises semi-static test and half dynamic test.
As shown in Figure 2, the single particle effect test of register, for semi-static test, comprises the steps: initial configuration register before irradiation test, the value of writing in register; Then start irradiation, detected register state dynamically in irradiation process, cyclically read and detected register in value, if detect that upset mistake occurs numerical value, misregistration daily record, and reconfigure described register, if there is no the wrong value in detected register under irradiation behaviour that continues; Repeat back, until count the mistake of overturning above for 100 times, or the fluence of accumulative total regulation, or test stops test during by accidental interruption.In above-mentioned test process, register is order register, and programmable counter and order register are called continuously, and other register is static.
The single particle effect test of register is half dynamic test, as shown in Figure 3, comprises the following steps: in register A, write initial value; In the time of irradiation, the initial value in described register A is transferred to register B and special register, then return to register A using described initial value as rreturn value; Described rreturn value and initial value are made comparisons, if value difference records single event one time, otherwise in register, read in new initial value, start the operation of a new round.
For example, step below the method execution capable of circulation detects general-purpose register (GPRs):
1, load general-purpose register with operand 0x55555555 (multiplicand).
2, load next general-purpose register with operand 0x2 (multiplier).
3, register is multiplied each other, and result is write to first register.
4, increase register pointer (present second becomes multiplicand, and the 3rd register is multiplier), repeat 1 to 3 step, until all registers all record the result of multiplication.
5, read whole general-purpose register, and check whether all results are all consistent with the value 0xAAAAAAAA of expection.
If 6 is inconsistent, by outcome record in external storage (for off-line analysis).
This test has three kinds of possible results:
1, this test is passed through, and there is no the record of upset.
2, result and desired value do not match, but it is wrong only having one or two, so this calculates as register upset.
3, result and desired value do not match, and are all wrong but there are a lot of positions, calculate into processing element upset, because it occurs in arithmetic logical unti or register addressing logic.
In the method, register is continued read and write, and arithmetic logical unti is always in busy state.
For example Pentium Ⅲ register detection method:
Whether five central processing unit registers (ebx, ecx, edx, ebp, and edi), then continuing detection has the value of any register to change if being filled to original value 0xAAAAAAAA.If any value changes, be reporting errors, and the value of register is reset to baseline value.Again read register and form new baseline value.Error reporting comprises the register that changed, baseline value before occurring of the value, the mistake that change and the baseline value after wrong generation.Then proceed to detect.In the detection continuing each time, baseline will reset to 0xAAAAAAAA.
In CPU, the test of inner Cache single particle effect comprises step: reading external memory data cyclically when irradiation, and described data are write to Cache; Read in Cache data compared with described external memory storage data, if having not identically, record the single-particle inversion that inner Cache occurs.Wherein, preferably external memory storage is identical with Cache capacity.
In CPU, the test of arithmetic and logical unit single particle effect comprises step: design in advance one section of algorithm routine, when irradiation, CPU moves described algorithm routine; Operation result and described algorithm routine correct result are compared, if erroneous results records arithmetic and logical unit or single event has occurred other control section, and stop test; Described algorithm routine heavy duty is entered to CPU operation, until there is new mistake.This test can draw total single-particle cross section, but the method can only obtain the judgement of " passing through " or " not passing through ", can not assess straight from the shoulder tested device single-particle sensitivity characteristic.
Above embodiment is only for illustrating the present invention; and be not limitation of the present invention; the those of ordinary skill in relevant technologies field; without departing from the spirit and scope of the present invention; can also make a variety of changes and modification; therefore all technical schemes that are equal to also belong to category of the present invention, and scope of patent protection of the present invention should be defined by the claims.
Claims (4)
1. a CPU single particle effect test method for aerospace, is characterized in that, comprises register, inner Cache and arithmetic and logical unit in CPU are carried out to single particle effect test, and the single particle effect test of described register, for semi-static test, comprises the steps:
Initial configuration register before irradiation test, the value of writing in register;
In irradiation process, cyclically read and detected register in value, if detect that upset mistake, misregistration daily record, and reconfigure described register occur numerical value;
Repeat back, stop test until count when N upset mistake or irradiation reach the fluence of accumulative total regulation, described N is positive integer;
In described CPU, inner Cache single particle effect test comprises step:
Reading external memory data cyclically when irradiation, and described data are write to Cache;
Read data and described external memory storage data in Cache and compare, if having not identically, record inner Cache single-particle inversion has occurred;
In described CPU, the test of arithmetic and logical unit single particle effect comprises step:
One section of algorithm routine of design in advance, when irradiation, CPU moves described algorithm routine;
Operation result and described algorithm routine correct result are compared, if result is inconsistent, record arithmetic and logical unit or single event has occurred other control section, and stop test;
Described algorithm routine heavy duty is entered to CPU operation, until there is new mistake.
2. CPU single particle effect test method for aerospace as claimed in claim 1, is characterized in that, described register is order register, in described semi-static test process, programmable counter and order register is called continuously, and other register is static.
3. CPU single particle effect test method for aerospace as claimed in claim 1 or 2, is characterized in that, described N is more than or equal to 100.
4. CPU single particle effect test method for aerospace as claimed in claim 1, is characterized in that, described external memory storage is identical with Cache capacity.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010283528.6A CN102402475B (en) | 2010-09-15 | 2010-09-15 | CPU (Central Processing Unit) single event effect testing method for space navigation |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010283528.6A CN102402475B (en) | 2010-09-15 | 2010-09-15 | CPU (Central Processing Unit) single event effect testing method for space navigation |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102402475A CN102402475A (en) | 2012-04-04 |
| CN102402475B true CN102402475B (en) | 2014-12-03 |
Family
ID=45884702
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201010283528.6A Active CN102402475B (en) | 2010-09-15 | 2010-09-15 | CPU (Central Processing Unit) single event effect testing method for space navigation |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102402475B (en) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103076557B (en) * | 2012-11-30 | 2015-03-25 | 北京时代民芯科技有限公司 | Testing method of single event functional interruption of Spacewire circuit |
| CN103033524B (en) * | 2012-12-31 | 2015-03-04 | 中国科学院微电子研究所 | Detection method for single-particle radiation effect |
| CN105589780A (en) * | 2014-10-22 | 2016-05-18 | 北京圣涛平试验工程技术研究院有限责任公司 | Neutron single event effect testing method of CPU |
| CN105590651A (en) * | 2014-10-22 | 2016-05-18 | 北京圣涛平试验工程技术研究院有限责任公司 | DRAM (dynamic random access memory) neutron single event effect test method |
| CN105590653A (en) * | 2014-10-22 | 2016-05-18 | 北京圣涛平试验工程技术研究院有限责任公司 | Neutron single event effect testing method of a SRAM type FPGA |
| CN105676720B (en) * | 2014-11-21 | 2018-06-08 | 北京圣涛平试验工程技术研究院有限责任公司 | CPU neutron single-particle effect test control methods and device |
| CN104793080A (en) * | 2015-04-16 | 2015-07-22 | 西安交通大学 | Method for testing single event effect of on-chip system |
| CN106199392B (en) * | 2016-06-27 | 2019-02-12 | 中国科学院深圳先进技术研究院 | Chip single particle effect detection method and device |
| CN114189397B (en) * | 2021-12-10 | 2024-03-19 | 重庆两江卫星移动通信有限公司 | Device and method for detecting and correcting single event effect of Ethernet interface circuit |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1183564A (en) * | 1996-11-22 | 1998-06-03 | 中国科学院近代物理研究所 | Method and apparatus for testing CPU register bit reverse caused by single particle effect |
| CN101158705A (en) * | 2007-11-22 | 2008-04-09 | 北京圣涛平试验工程技术研究院有限责任公司 | Method for acquiring single particle phenomenon intersecting surface and heavy ion linear energy transfer relationship |
| CN101196837A (en) * | 2007-12-26 | 2008-06-11 | 北京时代民芯科技有限公司 | Device for detecting 80C31 single particle effect |
| CN101286126A (en) * | 2008-06-13 | 2008-10-15 | 北京时代民芯科技有限公司 | Spatial processor single particle experiment automatized test system and method |
-
2010
- 2010-09-15 CN CN201010283528.6A patent/CN102402475B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1183564A (en) * | 1996-11-22 | 1998-06-03 | 中国科学院近代物理研究所 | Method and apparatus for testing CPU register bit reverse caused by single particle effect |
| CN101158705A (en) * | 2007-11-22 | 2008-04-09 | 北京圣涛平试验工程技术研究院有限责任公司 | Method for acquiring single particle phenomenon intersecting surface and heavy ion linear energy transfer relationship |
| CN101196837A (en) * | 2007-12-26 | 2008-06-11 | 北京时代民芯科技有限公司 | Device for detecting 80C31 single particle effect |
| CN101286126A (en) * | 2008-06-13 | 2008-10-15 | 北京时代民芯科技有限公司 | Spatial processor single particle experiment automatized test system and method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102402475A (en) | 2012-04-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102402475B (en) | CPU (Central Processing Unit) single event effect testing method for space navigation | |
| Kaliorakis et al. | Differential fault injection on microarchitectural simulators | |
| CN108226748B (en) | Single event effect test method for SoC system on chip | |
| Hangal et al. | Iodine: a tool to automatically infer dynamic invariants for hardware designs | |
| George et al. | Transient fault models and AVF estimation revisited | |
| CN109117327A (en) | A kind of hard disk detection method and device | |
| CN104793080A (en) | Method for testing single event effect of on-chip system | |
| CN103440185A (en) | Digital signal processing (DSP) device single particle turning effect testing method | |
| CN106250709A (en) | Gas turbine abnormality detection based on sensors association network and fault diagnosis algorithm | |
| CN103700407A (en) | Aviation application-based verification method for domestic storages | |
| DeOrio et al. | Post-silicon bug diagnosis with inconsistent executions | |
| Grbac et al. | Stability of software defect prediction in relation to levels of data imbalance | |
| CN105243023B (en) | Parallel Runtime error checking method | |
| CN100565469C (en) | A kind of method and apparatus of detecting temperature of CPU | |
| CN109445365A (en) | A kind of screening test method of the embedded multiplier of FPGA | |
| Chuah et al. | Towards comprehensive dependability-driven resource use and message log-analysis for HPC systems diagnosis | |
| CN101155172B (en) | Device and method for checking and recording performance event in data processing system | |
| CN101594133A (en) | Semiconductor integrated circuit, control method and information processor | |
| US7617428B2 (en) | Circuits and associated methods for improved debug and test of an application integrated circuit | |
| CN106024078A (en) | Failure diagnosis method for neutron detectors of reactors | |
| CN104575612A (en) | Memory testing method and system | |
| US20140136900A1 (en) | Method for Ranking Fault-Test Pairs Based on Waveform Statistics in a Mutation-Based Test Program Evaluation System | |
| JP2014134842A (en) | Verification device and verification method | |
| Goncalves et al. | Investigating floating-point implementations in a softcore gpu under radiation-induced faults | |
| Ejlali et al. | Error propagation analysis using FPGA-based SEU-fault injection |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |