CN102377702B - Channel estimation processing system in digital wireless communication and method - Google Patents
Channel estimation processing system in digital wireless communication and method Download PDFInfo
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- CN102377702B CN102377702B CN201010264151.XA CN201010264151A CN102377702B CN 102377702 B CN102377702 B CN 102377702B CN 201010264151 A CN201010264151 A CN 201010264151A CN 102377702 B CN102377702 B CN 102377702B
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Abstract
The invention provides a channel estimation processing microsystem in digital wireless communication and a realization method. The processing microsystem composed of an FFT (Fast Fourier Transform) module, a descrambling module and a channel estimation module is newly designed; and transmission data processed by FFT are not subjected to reverse data operation and data descrambling processing and directly enter the channel estimation module. In the channel estimation module, the data are subjected to interpolation estimation on one hand and are subjected to reverse processing on the other hand. While the reverse processing operation is finished, the data are delayed. After the completion of reverse processing, the data are subjected to descrambling operation. The channel estimation processing microsystem and the method can ensure that storage units are reduced under the situation that the performance of the whole system is not changed and effectively solve the delay problem of data processing in the system.
Description
Technical field
The present invention relates to digital wireless communication field, relate in particular to channel estimation process system and implementation method in digital wireless communication.
Background technology
CMMB (China Mobile Multimedia Broadcasting, Chinese Digital multimedia broadcasting) be the China Mobile multimedia broadcasting industry standard that China national General Bureau of Radio, Film and Television promulgated in October, 2006, this standard is formal enforcement in 1 day November in 2006.It is a kind of based on multi-carrier OFDM (Orthogonal Frequency Division Multiplexing, orthogonal frequency division multiplexi) wireless broadcast system of technology, adopt advanced channel error correction coding and multi-carrier OFDM modulation technique, improve antijamming capability and to ambulant support, adopted time slot radiation pattern to reduce the power consumption of terminal.
CMMB signal adopts OFDM modulation technique, transmitting terminal signal carries out IFFT (fast fourier transform) and operates the quadrature modulation of carrying out subcarrier, and receiving terminal response will be carried out FFT (fast fourier transform) operation to signal and carry out quadrature demodulation.The terrestrial wireless transmit stage of signal, because wireless transmission environment is more severe, can produce to signal transmission the signal distortion of a property taken advantage of, at receiving terminal in order to eliminate this channel disturbance, can adopt channel estimation technique carry out channel response estimation, and and then eliminate and be superimposed upon channel multiplier interference on signal.At the receiving terminal of CMMB, FFT and channel estimating are two indispensable signal processing modules.
Traditional FFT module adopts carries out signal processing based on butterfly computation.Before signal output, because butterfly computation makes the data sequence entanglement of a FFT processed frame, need to carry out after the processing of data inverted order, could recover correct data sequence and export.Inverted order processing need to be used the RAM of frame sign to realize, and in CMMB system, the RAM that completing the processing of data inverted order needs is 4096* word length (Wordlength).Secondly,, in CMMB receiver, the pilot tone that uses frequency domain to insert is carried out the estimation of channel response.First according to the channel response of local pilot tone and reception signal acquisition pilot frequency locations, then carry out successively time domain interpolation and Frequency domain interpolation according to the channel response result of pilot frequency locations, obtain the channel response result of all carrier positions of whole signal frame.While carrying out time domain interpolation, the signal frame of current operation need to use its adjacent signal frame in front and back to carry out channel response estimation, so in the time of time domain interpolation, signal is according to the number of the front and back signal frame using, need to carry out corresponding time delay, for example time domain interpolation is used an adjacent signal frame of front and back, and 4096 clocks of signal lag, need the FIFO of 4096*Wordlength to realize.So the two total needs the memory cell of 2*4096* word length (Wordlength).
The signal of CMMB receiver is processed whole process and be please refer to shown in accompanying drawing 1.Wherein the structure chart of the channel estimation process micro-system of traditional design please refer to shown in accompanying drawing 2, is made up of FFT module, descrambling module and channel estimation module.This kind of implementation adopts multiple memory cell to carry out data inverted order and data delay processing, designs more complicatedly, and in implementation procedure, extended the time of data processing.
Summary of the invention
The object of the invention provides channel estimation process system and implementation method new in a kind of wireless communication field.Adopt the treatment system that FFT module, descrambling module and channel estimation module are formed to redesign, under the constant situation of the performance of guaranteeing whole system, reduce memory cell, and can effectively reduce the time delay of system data processing.
Channel estimation process system in a kind of digital wireless communication, is made up of FFT module and channel estimation module.
FFT module is for carrying out Fourier transform to transmission data, and signal becomes frequency domain from time domain.
Channel estimation module is by interpolation estimation unit, data inverted order memory cell, descrambling unit and delay process cell formation.
Interpolation estimation unit carries out interpolation estimation to the out of order data of FFT output;
Data inverted order memory cell, carries out inverted order processing to the out of order data of FFT output;
Descrambling unit, carries out descrambling computing to inverted order data after treatment;
Delay process unit, for to data delay process.
In interpolation estimation unit, comprise pre-inverted order pilot frequency locations matrix, pre-scrambling pilot frequency sequence, pilot frequency locations channel response computing module, pilot tone inverted order module, time domain interpolation processing module and the each part of Frequency domain interpolation processing module.
In the present invention, transmission data, after FFT processes, are not carried out the operation of data inverted order and data de-scrambling processing, directly enter channel estimation module.In channel estimation module, data are carried out interpolation estimation on the one hand, and data are carried out inverted order processing on the other hand.The inverted order operation of data is the operations based on data block, processes operation and data has been carried out to time delay simultaneously completing inverted order.After inverted order is finished dealing with, data are carried out descrambling computing.For ensure and interpolation estimation unit output synchronously, the data after descrambling computing need to be carried out a short delay process.
The present invention also proposes the method for channel estimation process in a kind of digital wireless communication, comprises following content:
(1) transmission data, after FFT processes, directly enter channel estimation module;
(2) according to the number sequence of the out of order data of FFT output, the in advance position of the pre-inverted order pilot tone of calculated off-line;
(3) off-line carries out pre-scrambling processing by pilot data according to the scrambling mode of transmitting terminal data;
(4) channel response in out of order pilot frequency locations is estimated to calculate;
(5) the channel response result of pilot tone is carried out inverted order, time domain interpolation and Frequency domain interpolation processing;
(6) entering descrambling unit through the data of inverted order and delay process processes;
(7) data and the channel response result of calculation after output descrambling is imported rear class module into.
The signal frame body relating in the present invention program is the multi-carrier signal frame symbol that meets CMMB standard, adopts the signal modulation system of multicarrier.
By technical scheme provided by the present invention, in the data communication of wireless communication field, can ensure under the constant situation of whole system performance, reduce the memory cell in the inverted order operation of FFT module in existing design, can effectively reduce the time delay of system data processing simultaneously.
Brief description of the drawings
The overall architecture schematic diagram of Fig. 1 CMMB receiver system
The structural representation of the channel estimation process system in Fig. 2 traditional design
The structural representation of Fig. 3 channel estimation process system provided by the present invention
Interpolation estimation unit structural representation in Fig. 4 channel estimation process system provided by the present invention
Channel estimation process method basic flow sheet in Fig. 5 digital wireless communication provided by the present invention
Embodiment
Below in conjunction with each accompanying drawing, the channel estimation process system and method in a kind of digital wireless communication provided by the present invention is described in detail.
Fig. 1 is the integrated stand composition of CMMB receiver, and the operation principle of its whole system is that radiofrequency signal enters receiver through antenna, first carries out demodulating unit 100 and carries out demodulation process, changes radio frequency analog signal into baseband digital signal.Baseband digital signal carries out signal through lock unit 200 synchronously to be processed, and comprises that sampling clock is synchronous, frame synchronization and Frequency Synchronization.Data after synchronous enter FFT fast fourier transform module 300 signal are become to frequency domain from time domain.Frequency domain data enters descrambling module 400 and carries out data de-scrambling processing.Data after descrambling enter channel estimation module 500, channel corresponding with data together with the enter channel-decoding unit 600 of estimated signal in the time of transmission, decoding output.
Fig. 2 is the structural representation of channel estimation process system in traditional design.This micro-system is made up of FFT module 300, descrambling module 400 and channel estimation module 500.Taking the transmission mode of 4K as example, due in the FFT module of employing pipeline organization, first pile line operation unit 310 carries out butterfly computation, the result obtaining after pipeline operation will be used the memory cell 320 of 4096 degree of depth to complete the operation of data inverted order, enter descrambling module 400 and carry out descrambling computing with the pseudo random sequence producing in real time through inverted order data after treatment, enter afterwards channel estimation module 500.In channel estimation module, carry out channel response estimation by the interpolation estimation unit 510 of pilot tone on the one hand, due to when the pilot tone time domain interpolation, need the time delay of 1 OFDM symbol just can obtain result according to the present embodiment, so need to use the memory cell 520 of 4096 degree of depth to carry out caching process to data, to keep the synchronous of data and channel response result.This traditional design framework, due to the demand of FFT inverted order and channel estimating time delay, take that memory cell is more and data processing time delay is larger.In addition, owing to there being data de-scrambling operation between the two, be difficult for the two combination.
Fig. 3 is the structural representation of channel estimation process system provided by the present invention.This micro-system adopts the pretreated thought of data, walks around the restriction of descrambling module, and eliminates the impact of out of order data on data processing, can in design, save memory cell.Micro-system is made up of FFT module 300 and channel estimation module 500.In FFT module 300, after finishing dealing with in pile line operation unit 310, out of order data, without inverted order processing, are directly sent.The out of order data of sending do not need to process and directly enter channel estimation module 500 through descrambling module 400.In channel estimation module 500 provided by the present invention, data are carried out interpolation estimation through interpolation estimation unit 510 on the one hand, data are carried out inverted order processing through data inverted order memory cell 320 on the other hand, owing to being the operation based on data block in the time that data inverted order operates, therefore inverted order is processed and is completed data inverted order function simultaneously, also data have been carried out to 4096 time delay, so can reach data inverted order and time delay two aspect effects simultaneously, after inverted order is processed, data are carried out descrambling computing through descrambling unit 400, data after descrambling just and the data that in conventional method, channel estimation module is exported be identical.The new channel estimation system framework that the present invention proposes has saved the memory cell of 4096 degree of depth, has only increased the delay process unit 520 (this is for synchronous with interpolation estimation unit 510) of " 512 degree of depth ".So in the new channel estimating structure proposing, the memory cell that contrast conventional method can be saved is: 4096-512-512=3072.In the present embodiment, the data bit width of FFT output adopts 12bit, and total bit number of saving is: 3072*12bit ≈ 37kbit.For the interpolation estimation module 510 of the channel response in channel estimation module 500, the channel response interpolation that needs corresponding change just can meet out of order data is estimated.The structural representation of interpolation estimation module 510 as shown in Figure 4.
Out of order and do not have the data of descrambling to enter after interpolation estimation unit 510, the 511st, according to the rule of the inverted order pre-inverted order pilot frequency locations matrix that off-line obtains in advance, the 512nd, according to pseudo random sequence in the time of pilot frequency locations, original pilots is carried out to the pre-scrambling pilot frequency sequence after pre-scrambling, 512 marks that provide when the pilot frequency locations by 511 drive, and send corresponding pre-scrambling pilot value.511 pre-inverted order pilot frequency locations and 512 pre-scrambling pilot value are all sent into pilot frequency locations channel response computing module 513 in the time of work, calculate the channel response result of out of order pilot frequency locations, then send into pilot tone inverted order module 514, because pilot tone number in CMMB standard is 1/8 of subcarrier number, so pilot tone inverted order module is completed by the memory cell of " 512 degree of depth ", then estimate to carry out equally time domain interpolation and Frequency domain interpolation processing with traditional interpolation, obtain the channel response result of all sub-carrier positions.
Claims (4)
1. channel estimation process system in a digital wireless communication, formed by FFT module and channel estimation module, it is characterized in that: described channel estimation module is by interpolation estimation unit, data inverted order memory cell, descrambling unit and delay process cell formation, in FFT module, do not carry out data inverted order operational processes, interpolation estimation unit carries out interpolation estimation to the out of order data of FFT module output, out of order data are carried out interpolation estimation through interpolation estimation unit on the one hand, carry out inverted order processing through data inverted order memory cell on the other hand, carry out descrambling computing through descrambling unit again, export through delay process unit, it is characterized in that, described interpolation estimation unit comprises pre-inverted order pilot frequency locations matrix, pre-scrambling pilot frequency sequence, pilot frequency locations channel response computing module, pilot tone inverted order module, time domain interpolation processing module and Frequency domain interpolation processing module, the corresponding pre-scrambling pilot value of mark driver output that pre-scrambling pilot frequency sequence provides in the time of pilot frequency locations according to pre-inverted order pilot frequency locations matrix is to pilot frequency locations channel response computing module, the channel response result that calculates out of order pilot frequency locations is sent into pilot tone inverted order module, carry out interpolation processing through time domain interpolation processing module and Frequency domain interpolation processing module again.
2. a channel estimation process method in digital wireless communication, is characterized in that: comprise following steps:
(1) transmission data, after FFT processes, directly enter channel estimation module;
(2) according to the number sequence of the out of order data of FFT output, the in advance position of the pre-inverted order pilot tone of calculated off-line;
(3) off-line carries out pre-scrambling processing by pilot data according to the scrambling mode of transmitting terminal data;
(4) channel response in out of order pilot frequency locations is estimated to calculate;
(5) the channel response result of pilot tone is carried out inverted order, time domain interpolation and Frequency domain interpolation processing;
(6) entering descrambling unit through the data of inverted order and delay process processes;
(7) data and the channel response result of calculation after output descrambling is imported rear class module into.
3. channel estimation process method in a kind of digital wireless communication as claimed in claim 2, is characterized in that: the frame position of described transmission data meets the multi-carrier signal frame symbol of CMMB standard.
4. a kind of channel estimation process method in digital wireless communication as claimed in claim 2 or claim 3, is characterized in that: the frame of described transmission data adopts multi-carrier modulation.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1984109A (en) * | 2006-04-24 | 2007-06-20 | 华为技术有限公司 | Channel estimater and channel estimating method in telecommunication system |
| CN101345730A (en) * | 2007-07-23 | 2009-01-14 | 清华大学 | Method and device for frequency decision feedback equalizer in TDS-OFDM receiver |
| CN101645733A (en) * | 2008-08-07 | 2010-02-10 | 中兴通讯股份有限公司 | Rake receiving device of hardware and receiving method thereof |
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| US7231184B2 (en) * | 2003-12-05 | 2007-06-12 | Texas Instruments Incorporated | Low overhead transmit channel estimation |
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| CN1984109A (en) * | 2006-04-24 | 2007-06-20 | 华为技术有限公司 | Channel estimater and channel estimating method in telecommunication system |
| CN101345730A (en) * | 2007-07-23 | 2009-01-14 | 清华大学 | Method and device for frequency decision feedback equalizer in TDS-OFDM receiver |
| CN101645733A (en) * | 2008-08-07 | 2010-02-10 | 中兴通讯股份有限公司 | Rake receiving device of hardware and receiving method thereof |
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