CN102361399B - Power supply device of thin film transistor liquid crystal display - Google Patents
Power supply device of thin film transistor liquid crystal display Download PDFInfo
- Publication number
- CN102361399B CN102361399B CN201110296452.5A CN201110296452A CN102361399B CN 102361399 B CN102361399 B CN 102361399B CN 201110296452 A CN201110296452 A CN 201110296452A CN 102361399 B CN102361399 B CN 102361399B
- Authority
- CN
- China
- Prior art keywords
- voltage
- coupled
- film transistor
- thin
- order
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Landscapes
- Liquid Crystal Display Device Control (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The invention relates to a power supply device of a thin film transistor liquid crystal display. The power supply device comprises a printed circuit board, a first voltage generating circuit, a glass panel, a positive charge pump and a negative charge pump. The first voltage generating circuit is formed on the printed circuit board and is used for generating a first voltage and a pulse width modulation signal; the positive charge pump is formed on the glass panel and is used for receiving the first voltage and the pulse width modulation signal and outputting at least one doubled voltage of the first voltage; and the negative charge pump is formed on the glass panel and is used for receiving the pulse width modulation signal and outputting a negative voltage according to the pulse width modulation signal.
Description
Technical field
The invention relates to a kind of supply unit, espespecially a kind of positive charge of integrating helps Pu and negative electrical charge to help Pu to the supply unit of the film liquid crystal display of face glass.
Background technology
When operation film liquid crystal display, the supply unit of film liquid crystal display need provide different voltage to film liquid crystal display.Therefore, supply unit must utilize power drives unit, produces pulse width modulation and controls signal.Then, the first voltage generation circuit is controlled signal according to input voltage and pulse width modulation, produces the first voltage (VDDA).
After the first voltage (VDDA) produces, supply unit recycling positive charge side Pu and negative electrical charge are helped Pu, produce and export multiplication of voltage (VDDG) and the negative voltage (VEEG) of the first voltage, to control the open and close of thin film transistor switch.Yet in the prior art, supply unit is comprised of many external modules, and supply unit is to be formed on printed circuit board (PCB).Therefore, the cost of supply unit is high and need larger area printed circuit board (PCB).
Summary of the invention
Present invention is directed to a kind of supply unit of film liquid crystal display.This supply unit comprises a printed circuit board (PCB), one first voltage generation circuit, a face glass, a positive charge side Pu and negative electrical charge side Pu.This first voltage generation circuit, is formed on this printed circuit board (PCB), in order to produce one first voltage and a pulse width modulation signal; This positive charge side Pu, is formed on this face glass, in order to receive this first voltage and this pulse width modulation signal, and exports according to this multiplication of voltage of at least one this first voltage; This negative electrical charge side Pu, is formed on this face glass, in order to receive this pulse width modulation signal, and exports according to this negative voltage.
The invention provides a kind of supply unit of film liquid crystal display.This supply unit is to utilize one first voltage generation circuit, produces one first voltage and a pulse width modulation signal.Then, a positive charge side Pu can produce the multiplication of voltage of at least one this first voltage according to this first voltage and this pulse width modulation signal, and negative electrical charge side Pu can, according to this pulse width modulation signal, produce a negative voltage.In addition, this positive charge side Pu and this negative electrical charge side Pu are to be integrated on a face glass.So, the present invention not only can reduce the external module quantity of this supply unit, and because this positive charge side Pu and this negative electrical charge side Pu are to be integrated on this face glass, so the cost of this supply unit is lower and need one compared with the printed circuit board (PCB) of small size.
Accompanying drawing explanation
Fig. 1 illustrates a kind of schematic diagram of supply unit of film liquid crystal display for one embodiment of the invention.
Fig. 2 is for the schematic diagram of two voltage-multiplying circuits is described.
Fig. 3 produces the schematic diagram of the sequential of two multiplication of voltages for explanation.
Fig. 4 is the schematic diagram for explanation voltage tripler.
Fig. 5 produces the schematic diagram of the sequential of three multiplication of voltages for explanation.
Fig. 6 is the schematic diagram for explanation negative electrical charge side Pu.
Fig. 7 produces the schematic diagram of the sequential of negative voltage for explanation.
[primary clustering symbol description]
100 supply units
102 printed circuit board (PCB)s
104 first voltage generation circuits
106 face glasss
108 positive charge side Pus
110 negative electrical charge side Pus
1082 two voltage-multiplying circuits
1084 voltage triplers
1042 power drives unit
1044 transistors
1046 inductance
1048 diodes
1050 electric capacity
1052 loads
1102 the 4th charging capacitors
1104 the 7th thin-film transistors
1106 the 8th thin-film transistors
1108 the 4th electric capacity of voltage regulation
10822 first charging capacitors
10824 the first film transistors
10826 second thin-film transistors
10828 first electric capacity of voltage regulation
10842 second charging capacitors
10844 the 3rd thin-film transistors
10846 the 4th thin-film transistors
10848 second electric capacity of voltage regulation
10850 the 3rd charging capacitors
10852 the 5th thin-film transistors
10854 the 6th thin-film transistors
10856 the 3rd electric capacity of voltage regulation
GND ground end
PS pulse width modulation is controlled signal
PWM pulse width modulation signal
VDDA the first voltage
VDDG2X bis-multiplication of voltages
VDDG3X tri-multiplication of voltages
VEEG negative voltage
VIN input voltage
Embodiment
For making object of the present invention, technical scheme and advantage clearer, below will, by specific embodiment and relevant drawings, the present invention be described in further detail.
Please refer to Fig. 1, Fig. 1 illustrates a kind of schematic diagram of supply unit 100 of film liquid crystal display for one embodiment of the invention.Supply unit 100 comprises a printed circuit board (PCB) 102, one first voltage generation circuit 104, a face glass 106, a positive charge side Pu 108 and negative electrical charge side Pu 110.The first voltage generation circuit 104 is to be formed on printed circuit board (PCB) 102, in order to produce one first voltage VDDA and a pulse width modulation signal PWM; Positive charge side Pu 108 is to be formed on face glass 106, in order to receive the first voltage VDDA and pulse width modulation signal PWM, and according to the first voltage VDDA and pulse width modulation signal PWM, exports two multiplication of voltage VDDG2X and three multiplication of voltage VDDG3X.Positive charge side Pu 108 comprises two voltage-multiplying circuits 1082 and voltage triplers 1084, and wherein two voltage-multiplying circuits 1082 are to export two multiplication of voltage VDDG2X and voltage tripler 1084 is to export three multiplication of voltage VDDG3X.But the present invention is not limited to positive charge side Pu 108 and only exports two multiplication of voltage VDDG2X and three multiplication of voltage VDDG3X.That is positive charge side Pu 108 is multiplication of voltages of exporting at least one the first voltage VDDA.Negative electrical charge side Pu 110 is to be formed on face glass 106, in order to received pulse width modulation signal PWM, and according to pulse width modulation signal PWM, exports a negative voltage VEEG.
As shown in Figure 1, the first voltage generation circuit 104 comprises a power drives unit 1042, a transistor 1044, an inductance 1046, diode 1048, an electric capacity 1050 and a load 1052.Power drives unit 1042 is to provide a pulse width modulation to control signal PS; Transistor 1044 has a first end, and one second end is controlled signal PS in order to received pulse width modulation, and one the 3rd end, is coupled to a ground end GND; Inductance 1046 has a first end, in order to receive an input voltage VIN, and one second end, is coupled to the first end of transistor 1044, in order to output pulse width modulation signal PWM; Diode 1048 has a first end, is coupled to the first end of transistor 1044, and one second end, in order to output-input voltage VIN; Electric capacity 1050 has a first end, is coupled to the second end of diode 1048, and one second end, is coupled to and holds GND; Load 1052 has a first end, is coupled to the second end of diode 1048, and one second end, is coupled to and holds GND.As shown in Figure 1, the first voltage VDDA is for according to pulse width modulation signal PWM and input voltage VIN, sees through under inductance 1046 energy storage and diode 1048 clamps resulting stable state direct voltage.In addition, the work period of pulse width modulation signal PWM is by pulse width modulation, to control signal PS to be controlled.
Please refer to Fig. 2 and Fig. 3, Fig. 2 is for the schematic diagram of two voltage-multiplying circuits 1082 is described, and Fig. 3 produces the schematic diagram of the sequential of two multiplication of voltage VDDG2X for explanation.As shown in Figure 2, two voltage-multiplying circuits 1082 are to receive the first voltage VDDA and pulse width modulation signal PWM, and export according to this two multiplication of voltage VDDG2X.Two voltage-multiplying circuits 1082 comprise one first charging capacitor 10822, a first film transistor 10824, one second thin-film transistor 10826 and one first electric capacity of voltage regulation 10828, and wherein the first charging capacitor 10822 and the first electric capacity of voltage regulation 10828 are the coupling capacitances for face glass 106.The first charging capacitor 10822 has a first end, in order to received pulse width modulation signal PWM, and one second end; The first film transistor 10824 has a first end, and in order to receive the first voltage VDDA, one second end, is coupled to the first end of the first film transistor 10824, and one the 3rd end, is coupled to the second end of the first charging capacitor 10822; The second thin-film transistor 10826 has a first end, is coupled to the second end of the first charging capacitor 10822, and one second end is coupled to the first end of the second thin-film transistor 10826, and one the 3rd end, in order to export two multiplication of voltage VDDG2X; The first electric capacity of voltage regulation 10828 has a first end, is coupled to the 3rd end of the second thin-film transistor 10826, and one second end, is coupled to and holds GND.
As shown in Figures 2 and 3, when pulse width modulation signal PWM is during for an electronegative potential (0V), the first film transistor 10824 opens and the second thin-film transistor 10826 cuts out.Now, the first voltage VDDA is to the first charging capacitor 10822 chargings, so the current potential of node A (the second end of the first charging capacitor 10822) is promoted to the first voltage VDDA.When pulse width modulation signal PWM is during for a high potential (VDDA), the first film transistor 10824 is closed and the second thin-film transistor 10826 is opened.Now, pulse width modulation signal PWM is to the first charging capacitor 10822 charging, so the current potential of node A is promoted to two multiplication of voltage VDDG2X again by the first voltage VDDA, and continues to maintain two multiplication of voltage VDDG2X.Because the second thin-film transistor 10826 is opened, so just exportable two multiplication of voltage VDDG2X of the 3rd end of the second thin-film transistor 10826.In addition, the first electric capacity of voltage regulation 10828 is the current potentials in order to stable node A.
Please refer to Fig. 4 and Fig. 5, Fig. 4 is the schematic diagram for explanation voltage tripler 1084, and Fig. 5 produces the schematic diagram of the sequential of three multiplication of voltage VDDG3X for explanation.As shown in Figure 2, voltage tripler 1084 is to receive the first voltage VDDA and pulse width modulation signal PWM, and exports according to this three multiplication of voltage VDDG3X.Voltage tripler 1084 comprises one second charging capacitor 10842, one the 3rd thin-film transistor 10844, one the 4th thin-film transistor 10846, one second electric capacity of voltage regulation 10848, one the 3rd charging capacitor 10850, one the 5th thin-film transistor 10852, one the 6th thin-film transistor 10854 and one the 3rd electric capacity of voltage regulation 10856, and wherein the second charging capacitor 10842, the second electric capacity of voltage regulation 10848, the 3rd charging capacitor 10850 and the 3rd electric capacity of voltage regulation 10856 are the coupling capacitances for face glass 106.The second charging capacitor 10842 has a first end, in order to received pulse width modulation signal PWM, and one second end; The 3rd thin-film transistor 10844 has a first end, and in order to receive the first voltage VDDA, one second end, is coupled to the first end of the 3rd thin-film transistor 10844, and one the 3rd end, is coupled to the second end of the second charging capacitor 10842; The 4th thin-film transistor 10846 has a first end 48 and has a first end, is coupled to the 3rd end of the 4th thin-film transistor 10846, and one second end, is coupled to and holds GND; The 3rd charging capacitor 10850 has a first end, in order to received pulse width modulation signal PWM, and one second end; The 5th thin-film transistor 10852 has a first end, and in order to receive two multiplication of voltage VDDG2X, one second end, is coupled to the first end of the 5th thin-film transistor 10852, and one the 3rd end, is coupled to the second end of the 3rd charging capacitor 10850; The 6th thin-film transistor 10854 has a first end, is coupled to the second end of the 3rd charging capacitor 10850, and one second end is coupled to the first end of the 6th thin-film transistor 10854, and one the 3rd end, in order to export three multiplication of voltage VDDG3X; The 3rd electric capacity of voltage regulation 10856 has a first end, is coupled to the 3rd end of the 6th thin-film transistor 10854, and one second end, is coupled to and holds GND.
As shown in Figure 4 and Figure 5, when pulse width modulation signal PWM is during for electronegative potential (0V), the 3rd thin-film transistor 10844 and the 5th thin-film transistor 10852 are opened, and the 4th thin-film transistor 10846 and the 6th thin-film transistor 10854 are closed.Now, the first voltage VDDA is to the second charging capacitor 10842 chargings, so the current potential of Node B (the second end of the second charging capacitor 10842) is promoted to the first voltage VDDA.In addition, because the 4th thin-film transistor 10846 cuts out, so the current potential of the 3rd end of the 4th thin-film transistor 10846 is not yet raised.Therefore, although the 5th thin-film transistor 10852 unlatchings, because the current potential of the 3rd end of the 4th thin-film transistor 10846 is not yet raised, so the current potential of node C (the second end of the 3rd charging capacitor 10850) is not also raised.When pulse width modulation signal PWM is during for high potential (VDDA), the 4th thin-film transistor 10846 and the 6th thin-film transistor 10854 are opened, and the 3rd thin-film transistor 10844 and the 5th thin-film transistor 10852 are closed.Now, pulse width modulation signal PWM is to the second charging capacitor 10842 chargings, so the current potential of Node B is promoted to two multiplication of voltage VDDG2X again by the first voltage VDDA.Because the 4th thin-film transistor 10846 is opened, so the current potential of the 3rd end of the 4th thin-film transistor 10846 can be promoted to two multiplication of voltage VDDG2X.In addition, because the second electric capacity of voltage regulation 10848 is current potentials of stablizing the 3rd end of the 4th thin-film transistor 10846, so the sustainable two multiplication of voltage VDDG2X that maintain of the current potential of the 3rd end of the 4th thin-film transistor 10846.
As shown in Figure 4 and Figure 5, when pulse width modulation signal PWM is electronegative potential (0V) again, the 3rd thin-film transistor 10844 and the 5th thin-film transistor 10852 are opened, and the 4th thin-film transistor 10846 and the 6th thin-film transistor 10854 are closed.Now, two multiplication of voltage VDDG2X see through 10852 pairs of the 3rd charging capacitor 10850 chargings of the 5th thin-film transistor of opening, so the current potential of node C is promoted to two multiplication of voltage VDDG2X.When pulse width modulation signal PWM is high potential again, the 4th thin-film transistor 10846 and the 6th thin-film transistor 10854 are opened, and the 3rd thin-film transistor 10844 and the 5th thin-film transistor 10852 are closed.Now, pulse width modulation signal PWM is to the 3rd charging capacitor 10850 chargings, so the current potential of node C can be promoted to three multiplication of voltage VDDG3X again by two multiplication of voltage VDDG2X.Because the 6th thin-film transistor 10854 is opened, so the current potential of the 3rd end of the 6th thin-film transistor 10854 can be promoted to three multiplication of voltage VDDG3X, and export three multiplication of voltage VDDG3X.In addition, because the 3rd electric capacity of voltage regulation 10856 is current potentials of stablizing the 3rd end of the 6th thin-film transistor 10854, so the sustainable three multiplication of voltage VDDG3X that maintain of the current potential of the 3rd end of the 6th thin-film transistor 10854.
Please refer to Fig. 6 and Fig. 7, Fig. 6 is the schematic diagram for explanation negative electrical charge side Pu 110, and Fig. 7 produces the schematic diagram of the sequential of negative voltage VEEG for explanation.As shown in Figure 6, negative electrical charge side Pu comprises one the 4th charging capacitor 1102, one the 7th thin-film transistor 1104, one the 8th thin-film transistor 1106 and one the 4th electric capacity of voltage regulation 1108, and wherein the 4th charging capacitor 1102 and the 4th electric capacity of voltage regulation 1108 are the coupling capacitances for face glass 106.The 4th charging capacitor 1102 has a first end, in order to received pulse width modulation signal PWM, and one second end; The 7th thin-film transistor 1104 has a first end, is coupled to the second end of the 4th charging capacitor 1102, and one second end is coupled to the first end of the 7th thin-film transistor 1104, and one the 3rd end, is coupled to and holds GND; The 8th thin-film transistor 1106 has a first end, and in order to export negative voltage VEEG, one second end, is coupled to the first end of the 8th thin-film transistor 1106, and one the 3rd end, is coupled to the second end of the 4th charging capacitor 1102; The 4th electric capacity of voltage regulation 1108 has a first end, is coupled to the first end of the 8th thin-film transistor 1106, and one second end, is coupled to and holds GND.
As shown in Figure 6 and Figure 7, when pulse width modulation signal PWM is during for electronegative potential (0V), the 7th thin-film transistor 1104 cuts out and the 8th thin-film transistor 1106 is opened.Now, the current potential of the 4th charging capacitor 1102 is 0, and the current potential of node D (the second end of the 4th charging capacitor 1102) is also 0.When pulse width modulation signal PWM is during for high potential (VDDA), the 7th thin-film transistor 1104 opens and the 8th thin-film transistor 1106 cuts out.Now, pulse width modulation signal PWM is to the 4th charging capacitor 1102 chargings, and therefore, the voltage difference at the 4th charging capacitor 1102 two ends is the high potentials (VDDA) for pulse width modulation signal PWM, and the current potential of node D is still 0.When pulse width modulation signal PWM is during for electronegative potential (0V), the 7th thin-film transistor 1104 cuts out and the 8th thin-film transistor 1106 is opened.Now, the current potential of the first end of the 4th charging capacitor 1102 is to be 0V, but because will maintain the voltage difference (VDDA) at the 4th charging capacitor 1102 two ends, so the current potential of node D (the second end of the 4th charging capacitor 1102) can be by clamp down to negative voltage VEEG.Because the 8th thin-film transistor 1106 is opened, so the exportable negative voltage VEEG of the first end of the 8th thin-film transistor 1106.In addition, because the 4th electric capacity of voltage regulation 1108 is current potentials of stablizing the first end of the 8th thin-film transistor 1106, so the sustainable negative voltage VEEG that maintains of the current potential of the first end of the 8th thin-film transistor 1106.
In sum, the supply unit of film liquid crystal display provided by the present invention is to utilize the first voltage generation circuit, produces the first voltage and pulse width modulation signal.Then, positive charge side Pu can produce the multiplication of voltage of at least one the first voltage according to the first voltage and pulse width modulation signal, and negative electrical charge side Pu can, according to pulse width modulation signal, produce negative voltage.In addition, positive charge side Pu and negative electrical charge side Pu are to be integrated on face glass.So, the present invention not only can reduce the external module quantity of supply unit, and because positive charge side Pu and negative electrical charge side Pu are to be integrated on face glass, so the cost of supply unit is lower and need to be compared with the printed circuit board (PCB) of small size.
The foregoing is only preferred embodiment of the present invention, all equalizations of doing according to the present patent application the scope of the claims change and modify, and all should belong to covering scope of the present invention.
Claims (7)
1. a supply unit for film liquid crystal display, is characterized in that, comprises:
One printed circuit board (PCB);
One first voltage generation circuit, is formed on this printed circuit board (PCB), in order to produce one first voltage and a pulse width modulation signal;
One face glass;
One positive charge side Pu, is formed on this face glass, in order to receive this first voltage and this pulse width modulation signal, and exports according to this multiplication of voltage of at least one this first voltage; And
One negative electrical charge side Pu, is formed on this face glass, in order to receive this pulse width modulation signal, and exports according to this negative voltage;
Wherein this positive charge side Pu comprises:
One or two voltage-multiplying circuits, in order to receive this first voltage and this pulse width modulation signal, and export one or two multiplication of voltages of this first voltage according to this, and this two voltage-multiplying circuit comprises:
One first charging capacitor, has a first end, in order to receive this pulse width modulation signal, and one second end;
One the first film transistor, has a first end, and in order to receive this first voltage, one second end, is coupled to this first end, and one the 3rd end, is coupled to the second end of this first charging capacitor;
One second thin-film transistor, has a first end, is coupled to the second end of this first charging capacitor, and one second end, is coupled to this first end, and one the 3rd end, in order to export this two multiplication of voltage; And
One first electric capacity of voltage regulation, has a first end, is coupled to the 3rd end of this second thin-film transistor, and one second end, is coupled to a ground end.
2. supply unit according to claim 1, is characterized in that, wherein this first charging capacitor and this first electric capacity of voltage regulation are the coupling capacitances for this face glass.
3. supply unit according to claim 1, is characterized in that, wherein this positive charge side Pu separately comprises:
One voltage tripler, in order to receive this first voltage and this pulse width modulation signal, and exports one or three multiplication of voltages of this first voltage according to this, and this voltage tripler comprises:
One second charging capacitor, has a first end, in order to receive this pulse width modulation signal, and one second end;
One the 3rd thin-film transistor, has a first end, and in order to receive this first voltage, one second end, is coupled to this first end, and one the 3rd end, is coupled to the second end of this second charging capacitor;
One the 4th thin-film transistor, has a first end, is coupled to the second end of this second charging capacitor, and one second end, is coupled to this first end, and one the 3rd end, in order to export this two multiplication of voltage;
One second electric capacity of voltage regulation, has a first end, is coupled to the 3rd end of the 4th thin-film transistor, and one second end, is coupled to this ground end;
One the 3rd charging capacitor, has a first end, in order to receive this pulse width modulation signal, and one second end;
One the 5th thin-film transistor, has a first end, and in order to receive this two multiplication of voltage, one second end, is coupled to this first end, and one the 3rd end, is coupled to the second end of the 3rd charging capacitor;
One the 6th thin-film transistor, has a first end, is coupled to the second end of the 3rd charging capacitor, and one second end, is coupled to this first end, and one the 3rd end, in order to export this three multiplication of voltage; And
One the 3rd electric capacity of voltage regulation, has a first end, is coupled to the 3rd end of the 6th thin-film transistor, and one second end, is coupled to this ground end.
4. supply unit as claimed in claim 3, is characterized in that, wherein this second charging capacitor, this second electric capacity of voltage regulation, the 3rd charging capacitor and the 3rd electric capacity of voltage regulation are the coupling capacitances for this face glass.
5. supply unit as claimed in claim 1, is characterized in that, wherein this negative electrical charge side Pu comprises:
One the 4th charging capacitor, has a first end, in order to receive this pulse width modulation signal, and one second end;
One the 7th thin-film transistor, has a first end, is coupled to the second end of the 4th charging capacitor, and one second end, is coupled to this first end, and one the 3rd end, is coupled to a ground end;
One the 8th thin-film transistor, has a first end, and in order to export this negative voltage, one second end, is coupled to this first end, and one the 3rd end, is coupled to the second end of the 4th charging capacitor; And
One the 4th electric capacity of voltage regulation, has a first end, is coupled to the first end of the 8th thin-film transistor, and one second end, is coupled to this ground end.
6. supply unit as claimed in claim 5, is characterized in that, wherein the 4th charging capacitor and the 4th electric capacity of voltage regulation are the coupling capacitances for this face glass.
7. supply unit as claimed in claim 1, is characterized in that, wherein this first voltage generation circuit comprises:
One power drives unit, in order to provide a pulse width modulation to control signal;
One transistor, has a first end, and one second end is controlled signal in order to receive this pulse width modulation, and one the 3rd end, is coupled to a ground end;
One inductance, has a first end, in order to receive an input voltage, and one second end, be coupled to this transistorized first end, in order to export this pulse width modulation signal; One diode, has a first end, is coupled to this transistorized first end, and one second end, in order to export this first voltage;
One electric capacity, has a first end, is coupled to the second end of this diode, and one second end, is coupled to this ground end; And
One load, has a first end, is coupled to the second end of this diode, and one second end, is coupled to this ground end.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110296452.5A CN102361399B (en) | 2011-09-28 | 2011-09-28 | Power supply device of thin film transistor liquid crystal display |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110296452.5A CN102361399B (en) | 2011-09-28 | 2011-09-28 | Power supply device of thin film transistor liquid crystal display |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102361399A CN102361399A (en) | 2012-02-22 |
| CN102361399B true CN102361399B (en) | 2014-02-26 |
Family
ID=45586661
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201110296452.5A Expired - Fee Related CN102361399B (en) | 2011-09-28 | 2011-09-28 | Power supply device of thin film transistor liquid crystal display |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102361399B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI547922B (en) * | 2015-06-05 | 2016-09-01 | 矽創電子股份有限公司 | Power supply system and display apparatus |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6411531B1 (en) * | 2000-11-21 | 2002-06-25 | Linear Technology Corporation | Charge pump DC/DC converters with reduced input noise |
| TWM285718U (en) * | 2005-10-07 | 2006-01-11 | Cheng Uei Prec Ind Co Ltd | Sliding track structure of liquid crystal filling tool |
| CN101127483A (en) * | 2006-08-18 | 2008-02-20 | 盛群半导体股份有限公司 | Power supplier for field emission display |
| CN101471601A (en) * | 2007-12-24 | 2009-07-01 | 矽创电子股份有限公司 | Electric charge assist pump for adding power efficiency and output voltage |
| CN101938212A (en) * | 2009-07-01 | 2011-01-05 | 瑞萨电子(中国)有限公司 | Low-voltage start-up circuit and boost converter |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4336489B2 (en) * | 2002-11-18 | 2009-09-30 | 株式会社ルネサステクノロジ | Semiconductor integrated circuit |
| US8143939B2 (en) * | 2010-01-22 | 2012-03-27 | Himax Analogic, Inc. | Charge pump driving circuit and charge pump system |
| CN102158082B (en) * | 2011-04-12 | 2013-09-18 | 矽力杰半导体技术(杭州)有限公司 | Power supply management system with multipath output |
-
2011
- 2011-09-28 CN CN201110296452.5A patent/CN102361399B/en not_active Expired - Fee Related
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6411531B1 (en) * | 2000-11-21 | 2002-06-25 | Linear Technology Corporation | Charge pump DC/DC converters with reduced input noise |
| TWM285718U (en) * | 2005-10-07 | 2006-01-11 | Cheng Uei Prec Ind Co Ltd | Sliding track structure of liquid crystal filling tool |
| CN101127483A (en) * | 2006-08-18 | 2008-02-20 | 盛群半导体股份有限公司 | Power supplier for field emission display |
| CN101471601A (en) * | 2007-12-24 | 2009-07-01 | 矽创电子股份有限公司 | Electric charge assist pump for adding power efficiency and output voltage |
| CN101938212A (en) * | 2009-07-01 | 2011-01-05 | 瑞萨电子(中国)有限公司 | Low-voltage start-up circuit and boost converter |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102361399A (en) | 2012-02-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104200790A (en) | Voltage switching circuit, liquid crystal panel drive circuit and liquid crystal display | |
| CN101572485A (en) | Intelligent driving control method and device for secondary synchronous rectifier | |
| CN102082507B (en) | Capacitor charge pump | |
| CN201041734Y (en) | LCD power supply circuit and LCD | |
| CN103219893A (en) | Switch power supply controller and switch power supply circuit | |
| CN110264971A (en) | Anti- splashette circuit and method, driving circuit, display device | |
| CN209070958U (en) | Public electrode voltages generation circuit and display device | |
| CN102446480A (en) | Voltage conversion circuit | |
| CN102361399B (en) | Power supply device of thin film transistor liquid crystal display | |
| CN204103759U (en) | Be applicable to power supply circuits and the bridge circuit of upper switching tube driving in bridge circuit | |
| CN104518662A (en) | Half-voltage ratio charge-pump circuit | |
| CN201904721U (en) | Voltage-boosting charge pump | |
| CN204334523U (en) | Power-up time delay circuit, switch | |
| CN203590028U (en) | Charge pump device and power management circuit using same | |
| CN103354083B (en) | Backlight drive circuit and display device | |
| CN201298810Y (en) | Electrification sequence control circuit of chip voltages | |
| CN207588827U (en) | A kind of self-locking power switch device | |
| CN109412436A (en) | A kind of synchronous rectification control chip and circuit | |
| CN201430578Y (en) | Bias voltage circuit and electronic equipment | |
| CN104835474A (en) | Voltage output device, gate drive circuit and display device | |
| CN209072364U (en) | A kind of synchronous rectification control chip and circuit | |
| CN202889190U (en) | Positive-negative voltage generating circuit | |
| CN205986618U (en) | Power supply circuit | |
| CN103532377A (en) | Charge pump device and power management circuit using same | |
| CN104300783A (en) | Voltage regulator circuit and array substrate |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20170807 Address after: 1#, building third, fourth, 6 West Road, Mawei West Road, Mawei District, Fujian, Fuzhou Co-patentee after: Chunghwa Picture Tubes Ltd. Patentee after: CPT DISPLAY TECHNOLOGY (SHENZHEN)CO., LTD. Address before: 350015, Xingye Road, Mawei Science Park, Fujian, Fuzhou 1, China Co-patentee before: Chunghwa Picture Tubes Ltd. Patentee before: Fujian Huaying Display Technology Co., Ltd. |
|
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140226 Termination date: 20200928 |