CN102339876B - Solar wafer and preparation method thereof - Google Patents

Solar wafer and preparation method thereof Download PDF

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CN102339876B
CN102339876B CN201010234538.0A CN201010234538A CN102339876B CN 102339876 B CN102339876 B CN 102339876B CN 201010234538 A CN201010234538 A CN 201010234538A CN 102339876 B CN102339876 B CN 102339876B
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doped layer
type doped
metal electrode
coating
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CN102339876A (en
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陈炯
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Kingstone Semiconductor Co Ltd
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SHANGHAI KAISHITONG SEMICONDUCTOR CO Ltd
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Abstract

The invention discloses a solar wafer, which comprises an N-type substrate, a P-type doped layer which is arranged on the N-type substrate, a coating layer which is arranged on the P-type doped layer and comprises a passivation layer and an anti-reflection film; and a metal electrode which is arranged on the coating layer, wherein the P-type doped layer comprises a part which is covered by the metal electrode and a part which is not covered by the metal electrode, the P-type doped layer at the part which is covered by the metal electrode is a P-type doped layer without implanted N-type ions, the P-type doped layer at the part which is not covered by the metal electrode is a P-type doped layer with implanted N-type ions, and the metal electrode and the P-type doped layer without the implanted N-type ions form an eutectic composite material. The invention additionally discloses a preparation method for the solar wafer. By using an ion implantation method, the concentration of doped ions can be enabled to be even and can be accurately controlled to be ideal and the conversion efficiency of a solar cell is enabled to be closer to a theoretic design value.

Description

Solar wafer and preparation method thereof
Technical field
The present invention relates to a kind of solar wafer and preparation method thereof, particularly relate to solar wafer of a kind of solar cell with selective emitter and preparation method thereof.
Background technology
New forms of energy are one of five large technical fields that in 21st century development of world economy, tool determines power.Solar energy is a kind of clean, new forms of energy of exhaustion efficiently and never.In the new century, national governments are the important content using solar energy resources utilization as National Sustainable Development Strategies all.And that photovoltaic generation has is safe and reliable, noiseless, pollution-free, restriction less, the advantage such as failure rate is low, easy maintenance.In recent years, photovoltaic generation industry fast development in the world, supply falls short of demand for solar wafer, so the raising electricity conversion of solar wafer and the production capacity of solar wafer become important problem.
In general solar cell preparation technology mainly passes through following process, the explanation as an example of silicon chip example:
1, the surface treatment of silicon chip: prepare on the surface of silicon chip is the first step main technique of manufacturing silicon solar cell, it comprises chemical cleaning and the surface corrosion of silicon chip.When the silicon ingot having adulterated being cut on request after the silicon chip that meets production requirement, first will be to its surface treatment, because silicon chip surface may have dust after cutting, the organic substances such as metal ion and other inorganic matters and grease also can produce certain mechanical damage layer when cutting.Through sour corrosion and alkaline corrosion, can get rid of these pollutions and damage, make silicon chip surface light.Afterwards, sodium hydroxide solution or other acid solution of silicon chip being put into 1.2%-1.5% do pyramid matte, make incident light in surperficial multiple reflections and refraction, have increased the absorption of light, have improved the efficiency of battery.
2, diffusion system knot: knot process processed is to generate the different diffusion layer of conduction type on a block matrix material, it and the surface treatment of making before knot are all the critical processes in battery manufacture process.Diffusion is a kind of phenomenon of material molecule or atomic motion.The method of thermal diffusion P-N knot processed is to make V family impurity infiltrate P type silicon or III family impurity infiltration N-type silicon by high temperature.The most frequently used V family impurity of silicon solar cell is phosphorus, and what III family impurity was the most frequently used is boron.To the requirement of diffusion, be to obtain the junction depth and the diffusion layer square resistance that are suitable for solar cell P-N knot needs.Shallow junction dead layer is little, and battery shortwave effect is good, and shallow junction causes that series resistance increases, and is only improved the density of gate electrode, could effectively improve the fill factor, curve factor of battery.So just increased technology difficulty.Junction depth is too dark, and dead layer is obvious.If diffusion concentration is too large, cause heavy doping effect, the open circuit voltage of battery and short circuit current are declined.In actual battery is made, considered the factor of many aspects, therefore the junction depth general control of solar cell is at 0.3～0.5 micron, 20～70 ohm of square resistance average out to.At present, silicon solar cell main thermal diffusion method used is liquid source diffusion, this technique be the method for carrying by gas by impurity band as realized in diffusion furnace.
3, trimming: in diffusion process, also formed diffusion layer at the periphery surface of silicon chip, periphery diffusion layer can make the upper/lower electrode of battery form short-circuited conducting sleeve, it must be removed.On periphery, existing any small partial short-circuit all can make cell parallel resistance decline, is fatal on the impact of battery.The main method of trimming has etch, extrusion and ion dry etching etc.Now industrial the longest use is plasma method, passes into and under nitrogen, oxygen and carbon tetrafluoride high pressure, produces aura, by oxonium ion and fluorine ion, alternately to silicon effect, removes leading with layer of diffusion layer periphery.Because generated P, P in diffusion 2o 5, S io 2and phosphorosilicate glass, with 10% HF solution, clean 2 minutes now, reach the object of decontamination glass.
4, make antireflective coating: illumination is mapped on the silicon chip of plane, and wherein some is reflected, even if the silicon face of matte also approximately has 11% reflection loss, at silicon face, cover one deck antireflective coating, can greatly reduce reflection of light.The spraying process adopting now, it is to utilize high temperature to generate titanium dioxide film at silicon face; Also having a kind of method of spraying, is that it is by computer control by PECVD (plasma chemistry gaseous phase deposition) system, and under vacuum, high-voltage radio-frequency source condition, the ammonia making and silane gas ionization, form silicon nitride film at silicon face.
5, electrode fabrication: electrode is exactly the electric conducting material that forms tight ohmic contact with P-N knot two ends.Such material should meet: can form and firmly contact and contact resistance is little, excellent conductivity, shielded area are little, the high requirement of collection efficiency with silicon.In commercialization battery production, a large amount of adopted technique is silver slurry or the printing of silver/aluminium paste at present, and this technique moves to maturity, the ratio of width to height of grid line reduces greatly, the principle of this and battery electrode design---allow the output maximum of battery, the series resistance of battery illumination active area as far as possible little and battery is as far as possible greatly on all four.
6, electrode fabrication is complete, the next operation-sintering of having arrived.Sintering is last one production process of solar energy monolithic battery, and in this step, good temperature curve is crucial, and sintering time will be got hold of, and first wants low temperature by material eliminatings such as the mixing agent in slurries, heats or is sintered to the above sintered alloy of aluminium-silicon eutectic point.After alloying, along with cooling, silicon in liquid phase will solidify again, the recrystallized layer that formation contains a certain amount of aluminium, it is actually a process to silicon doping, it has compensated the donor impurity in the N+ layer of the back side, obtain the P type layer with aluminium doping, along with the rising of alloy temperature, the increasing proportion of the aluminium in liquid phase, under enough aluminium amount alloy temperatures, the back side even can form the electric field identical with front, become back of the body electric field, this technique has been used in large batch of industrial production at present, thereby open circuit voltage and short circuit current have been improved, and reduced Electrodes.Can back of the body knot burn with the factor such as the temperature of the doping content of the resistivity of stock, reverse diffusion layer and thickness, back side thickness or printing aluminum layer thickness, sintering and time and temperature relation.Excess Temperature can burn the two poles of the earth of battery, badly damaged battery, and the not high enough ohmic contact formedness that can not guarantee electrode of temperature, so must there be a suitable temperature to remove sintering.The solar battery sheet of monolithic has just completed like this, finally arrives test, is then welding and packaging technology.
Because the concentration of the ion that adulterates in thermal diffusion process cannot be precisely controlled, cause the conversion efficiency of solar cell to be limited to, cannot carry out efficiently opto-electronic conversion.And adopting thermal diffusion process to prepare solar wafer, its processing step is more, causes the reduction of production efficiency and the raising of cost.
Summary of the invention
The defect that the technical problem to be solved in the present invention is that prior art conversion efficiency of solar cell is low in order to overcome, the concentration of the ion that adulterates in thermal diffusion process cannot be precisely controlled and processing step is complicated, cost is higher, provides a kind of solar wafer and preparation method thereof.
The present invention solves above-mentioned technical problem by following technical proposals:
A kind of solar wafer, its feature is, it comprises:
One N-type substrate;
One is positioned at the suprabasil P type of this N-type doped layer;
One is positioned at the coating on this P type doped layer, and this coating comprises passivation layer and anti-reflection film;
Be positioned at the metal electrode in this coating,
Wherein, this P type doped layer comprises the part being covered by this metal electrode and the part not covered by this metal electrode, the P type doped layer of the described part being covered by this metal electrode is the P type doped layer that there is no N-type Implantation, the P type doped layer of the described part not covered by this metal electrode is the P type doped layer that has N-type Implantation
Wherein, this metal electrode with described in do not have the P type doped layer eutectic of N-type Implantation compound,
Wherein, when described N-type replaces with P type, P type replaces with N-type simultaneously.
Preferably, wherein, the thickness of this coating is 60-150nm.
Preferably, described in, there is no the square resistance of the P type doped layer of N-type Implantation is 20-50 Ω/m 2, described in to have the square resistance of the P type doped layer of N-type Implantation be 60-150 Ω/m 2, and the degree of depth of N-type Implantation is 0.2-0.5 μ m.
The present invention also provides a kind of preparation method who makes solar wafer as above, and its feature is, it comprises the following steps:
S 1, on the surface of the wafer of N-type substrate, form P type doped layer;
S 2, on this P type doped layer, form a coating, this coating comprises passivation layer and anti-reflection film;
S 3, in this coating, be pressure-plated with metal electrode;
S 4, accelerate N-type ion this this coating of N-type ion penetration is injected in this P type doped layer by the mode of Implantation;
S 5, by the wafer of this N-type substrate sintering at the temperature of 850-1000 ℃, and in sintering annealing,
Wherein, when described N-type replaces with P type, P type replaces with N-type simultaneously.
Preferably, step S 1in mode by Implantation/annealing or diffusion growth at the surface of the wafer of N-type substrate formation P type doped layer, now the square resistance of this P type doped layer is 20-50 Ω/m 2.
Preferably, step S 2in by the mode of PECVD, form coating, the passivation layer of this coating is SiOx, SiCx, SiNx or Al 2o 3film.
Preferably, step S 3in by the mode of printed circuit, be pressure-plated with metal electrode.
Preferably, step S 4in this N-type ion be accelerated to 10-100keV.
Preferably, step S 4in the injection degree of depth of this N-type ion be 0.2-0.5 μ m, described in to have the square resistance of the P type doped layer of N-type Implantation be 60-150 Ω/m 2.
Positive progressive effect of the present invention is: use ion implantation, the concentration of ion of can making to adulterate is even, and accurately the concentration of controlled doping ion is ideal value, so just can make the more close Theoretical Design value of transformation efficiency of solar cell, in addition, by by wafer 900--1000 ℃ of sintering several seconds to a few minutes, after making semiconductor eutectic in metal electrode element and wafer compound, make electrode reach good contacting with substrate (as silicon), reduced the resistance in this region.Thus, by the concentration of accurate controlled doping ion, make square resistance in the preferred range, and improve thus the conversion efficiency of solar cell.And for existing thermal diffusion process, ion implantation provides a kind of means of most economical manufacture selective emitter solar battery.
Accompanying drawing explanation
Fig. 1-5 are the decomposition step schematic diagram of preparation solar wafer of the present invention.
Embodiment
Below in conjunction with accompanying drawing, provide preferred embodiment of the present invention, take the solar wafer of N-type substrate 1 as example, describe technical scheme of the present invention in detail.
The preparation method of solar wafer, it comprises the following steps:
With reference to figure 1, step S 1on the surface of the wafer of N-type substrate, form P type doped layer 2, for example can on the surface of the wafer of N-type substrate, form P type doped layer 2 by the mode of Implantation/annealing or diffusion growth, those skilled in the art can select the concentration of suitable doping ion to obtain desirable square resistance according to actual needs, for example 20-50 Ω/m 2;
With reference to figure 2, step S 2, on this P type doped layer 2, forming a coating 3, this coating comprises passivation layer and anti-reflection film, the effect of coating is that passivation layer can adopt SiOx, SiCx, SiNx, Al to the passivation of silicon face and formation anti-reflective film 2o 3deng film, anti-reflection film, for reducing the light reflectance of solar cell surface, adopts above-mentioned coating can improve the conversion efficiency of solar cell.In addition, can adopt the method for PECVD (plasma chemistry gaseous phase deposition) to form coating, those skilled in the art can select other known approaches according to actual needs certainly;
With reference to figure 3, step S 3in this coating 3, be pressure-plated with metal electrode 4, for example adopt the mode of printed circuit to be pressure-plated with metal electrode, for example, adopt silver slurry or silver/aluminium paste to carry out the making of metal electrode, those skilled in the art can select other known approaches and well known materials to make electrode according to actual needs;
With reference to figure 4, step S 4accelerate N-type ion and by the mode of Implantation, this coating 3 of this N-type ion penetration be injected in this P type doped layer 2, wherein, this N-type ion is accelerated to 10-100keV and passes coating by Implantation mode, is doped in P type doped layer 2 and goes, and neutralizes the electrical of a part of P type, make metal electrode not have the P type carrier concentration in chlamydate region to reduce, it is large that resistance becomes, preferably, described in to have the square resistance of the P type doped layer of N-type Implantation be 60-150 Ω/m 2, and the degree of depth of N-type Implantation is 0.2-0.5 μ m;
With reference to figure 5, step S 5, to a few minutes, after making silicon eutectic in metal electrode element and wafer compound, make metal electrode and substrate reach good contacting the wafer of this N-type substrate sintering several seconds at the temperature of 850-1000 ℃, reach the object of the resistance that reduces this region; The temperature of sintering can make the impurity activation of the doped layer forming by the mode of Implantation or diffusion growth simultaneously, reaches the object of annealing.
Only need to be in said process, the impurity material that the mode of exchange base material and Implantation or diffusion growth is adulterated, the method is equally applicable to the making of P type solar wafer, and when described N-type replaces with P type, P type replaces with N-type simultaneously.In method of the present invention, successively inject opposite polarity ion (if first inject the N-type ion P type ion that reinjects after making metal electrode; If it is contrary first to inject P type ion), can reduce for the first time the concentration of the charge carrier after doping, at the hole, region and the free electronic concentration that are having doping for the second time, reduced.
By the method, make the selective emitter for solar cell, not only can be applicable to the solar wafer of P type and N-type simultaneously, and method is simple, step is less, can be in the photovoltaic efficiency that improves solar cell, and reduced technique intermediate link, improved the production efficiency of production line.
With reference to figure 4 and Fig. 5, the present invention also provides a kind of solar wafer, and it comprises:
One N-type substrate 1;
One is positioned at the P type doped layer 2 in this N-type substrate 1;
One is positioned at the coating 3 on this P type doped layer 2, and this coating comprises passivation layer and anti-reflection film;
Be positioned at the metal electrode 4 in this coating 3,
Wherein, this P type doped layer 2 comprises the part being covered by this metal electrode and the part not covered by this metal electrode, the P type doped layer of the described part being covered by this metal electrode is the P type doped layer that there is no N-type Implantation, the P type doped layer of the described part not covered by this metal electrode is the P type doped layer that has N-type Implantation
Wherein, this metal electrode 4 with described in do not have the P type doped layer eutectic of N-type Implantation compound.
Wherein, the thickness of this coating is 60-150nm, and the effect of coating is to the passivation of silicon face and forms anti-reflective film.
Wherein, described in, there is no the square resistance of the P type doped layer of N-type Implantation is 20-50 Ω/m 2, described in to have the square resistance of the P type doped layer of N-type Implantation be 60-150 Ω/m 2, and the degree of depth of N-type Implantation is 0.2-0.5 μ m.
Wherein, above-mentioned structure is also applicable to the solar wafer of P type substrate, and when described N-type replaces with P type, P type replaces with N-type simultaneously.
Although more than described the specific embodiment of the present invention, it will be understood by those of skill in the art that these only illustrate, protection scope of the present invention is limited by appended claims.Those skilled in the art is not deviating under the prerequisite of principle of the present invention and essence, can make various changes or modifications to these execution modes, but these changes and modification all fall into protection scope of the present invention.

Claims (6)

1. a preparation method for solar wafer, is characterized in that, it comprises the following steps:
S 1, on the surface of the wafer of N-type substrate, form P type doped layer;
S 2, on this P type doped layer, form a coating, this coating comprises passivation layer and anti-reflection film;
S 3, in this coating, be pressure-plated with metal electrode;
S 4, accelerate N-type ion this this coating of N-type ion penetration is injected in this P type doped layer by the mode of Implantation, this P type doped layer comprises the part being covered by this metal electrode and the part not covered by this metal electrode, the P type doped layer of the described part being covered by this metal electrode is the P type doped layer that there is no N-type Implantation, and the P type doped layer of the described part not covered by this metal electrode is the P type doped layer that has N-type Implantation;
S 5, by the wafer of this N-type substrate sintering at the temperature of 850-1000 ℃, and in sintering annealing,
Wherein, when described N-type replaces with P type, P type replaces with N-type simultaneously.
2. the preparation method of solar wafer as claimed in claim 1, is characterized in that, step S 1in by the mode of implantation annealing or diffusion growth, on the surface of the wafer of N-type substrate, form P type doped layer, now the square resistance of this P type doped layer is 20-50 Ω/.
3. the preparation method of solar wafer as claimed in claim 1, is characterized in that, step S 2in by the mode of PECVD, form coating, the passivation layer of this coating is SiOx, SiCx, SiNx or Al 2o 3film.
4. the preparation method of solar wafer as claimed in claim 1, is characterized in that, step S 3in by the mode of printed circuit, be pressure-plated with metal electrode.
5. the preparation method of solar wafer as claimed in claim 1, is characterized in that, step S 4in this N-type ion be accelerated to 10-100keV.
6. the preparation method of solar wafer as claimed in claim 1, is characterized in that, step S 4in the injection degree of depth of this N-type ion be 0.2-0.5 μ m, described in to have the square resistance of the P type doped layer of N-type Implantation be 60-150 Ω/.
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Address after: 201203 Shanghai City Newton Road, Zhangjiang High Tech Park of Pudong New Area No. 200 Building No. 7, No. 1

Patentee after: KINGSTONE SEMICONDUCTOR COMPANY LTD.

Address before: 201203 Shanghai City Newton Road, Zhangjiang High Tech Park of Pudong New Area No. 200 Building No. 7, No. 1

Patentee before: Shanghai Kaishitong Semiconductor Co., Ltd.