CN102292280B - 与金属锗硅材料接合的衬底 - Google Patents

与金属锗硅材料接合的衬底 Download PDF

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Publication number
CN102292280B
CN102292280B CN201080005182.1A CN201080005182A CN102292280B CN 102292280 B CN102292280 B CN 102292280B CN 201080005182 A CN201080005182 A CN 201080005182A CN 102292280 B CN102292280 B CN 102292280B
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layer
substrate
metal
germanium
semiconductor devices
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CN102292280A (zh
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鲁本·B·蒙特兹
亚历克斯·P·帕马塔特
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NXP USA Inc
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Freescale Semiconductor Inc
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Abstract

在一个实施例中，一种用于将第一衬底(103)接合至第二衬底(303)的方法包括在第一衬底之上形成包括金属的层。在一个实施例中，包括金属的层包围半导体器件，其可为微电子机械***(MEMS)器件。在第二衬底(303)上，形成包括硅(401)的第一层。在第一层上形成包括锗和硅的第二层(403)。在第二层上形成包括锗的第三层(405)。使得第三层与包括金属的层接触。向第三层和包括金属的层施加热量(一些实施例中还有压力)，以在第一衬底和第二衬底之间形成机械接合材料，其中，机械接合材料是导电性的。在机械接合物包围诸如MEMS的半导体器件的情况下，机械接合物用作保护MEMS的气密性密封是特别有利的。

Description

与金属锗硅材料接合的衬底
技术领域
本发明大体上涉及一种半导体器件，并且更具体地涉及一种用于接合半导体器件封装的技术。
背景技术
对于诸如微电子机械***(MEMS)器件等的某些类型的半导体器件，期望将器件(例如气密地)密封，以使得器件能够随着时间适当地操作。例如，对于某些类型的MEMS加速计，希望在腔中密封MEMS加速计，以防止在随后工艺期间对MEMS加速计的移动部分的污染。
密封MEMS器件的一种方法是将帽盖晶片接合到包括MEMS器件的第二晶片。该帽盖晶片和第二晶片形成用于MEMS器件的空腔。帽盖晶片可包括在压力和温度下接合到第二晶片的、位于空腔附近的引线玻璃料(lead glass frit)。
需要一种改进的技术，用于将两个晶片接合到一起，以密封诸如MEMS器件的半导体器件。
附图说明
通过参考附图，可更容易理解本发明，且其多个目的、特征和优势对本领域技术人员是显而易见的。
图1是根据本发明一个实施例的一个制造阶段中的器件晶片的部分剖面侧视图。
图2是根据本发明一个实施例的一个制造阶段中的器件晶片的部分顶视图。
图3是根据本发明一个实施例的一个制造阶段中的帽盖晶片的部分剖面侧视图。
图4是根据本发明一个实施例的另一制造阶段中的帽盖晶片的部分剖面侧视图。
图5是根据本发明一个实施例的一个制造阶段中被设置成与器件晶片相对的帽盖晶片的部分剖面侧视图。
图6是根据本发明一个实施例的另一制造阶段中的被压向器件晶片的帽盖晶片的部分剖面侧视图。
除非另外说明，在不同图中使用相同参考标记来指示相同项目。附图不必按比例画出。
具体实施方式
下文列出用于实施本发明的模式的具体描述。该描述意在说明本发明而并非对其进行限制。
通过金属多晶硅锗材料，将帽盖晶片接合到器件晶片，以在半导体器件周围形成密封腔。在一个晶片上，形成硅(Si)、多晶硅锗(SiGe)和多晶锗(Ge)的叠层。金属结构形成在第二晶片上。通过将金属结构和锗结构设置成相互接触，并施加热量(在一些实施例中还施加压力)，从而形成金属硅锗材料。
图1是包括将与帽盖晶片(例如，图3中的301)密封的半导体器件105的器件晶片101的侧视图。在一个实施例中，器件105是MEMS器件，诸如加速计或者开关。在MEMS器件的一个实例中，器件105包括由多晶硅制成的校验质量(proof mass)(未示出)，其由弹簧支撑且可相对于衬底103移动。在这种实施例中，器件105包括电容结构，其电容可被测量以检测校验质量的移动。但是，在其他实施例中，器件105可是其他类型的半导体器件。例如，在一个实施例中，器件105可以是转换器(transducer)。
晶片101包括衬底103，在一个实施例中，该衬底由体单晶硅制成。绝缘层107(例如SiO2)形成在衬底103上。在所示实施例中，层107由硅的局部氧化(LOCOS)工艺形成，但是在其他实施例中可通过其他方法形成。在一个实施例中，可研磨和抛光晶片101的背面侧(未示出)。层107形成有在随后形成的半导体器件105的位置附近的开口111。在其他实施例中，开口111可由图形化层107形成。在一个实施例中，层107厚度为25K埃，但是在其他实施例中可以是其他厚度。
在形成层107之后，多晶硅层113和120(硅的多晶层)和金属层122形成在层107之上。在一个实施例中，分离地形成层113、120和122且之后，在形成下一层之前将其图形化，以形成这些层的所需结构。在一些实施例中，在形成多晶硅层113和120之后或之前形成电介质层，诸如层118，以用于隔离由这些层形成的各个结构。而且，可使用牺牲层(未示出)，用于形成在随后工艺中稍后去除的所需结构。在一个实施例中，层118可以是富硅的氮化物材料。
在所示实施例中，器件105包括层113、118、120、122。在这种器件中，可图形化这些器件，以在器件中各位置处，去除层的一部分。但是，为了简化，示出器件105具有这些层，所述层位于一直跨越器件105的虚线中。在其他实施例中，包括器件105的晶片101可包括其他半导体层和金属层。
晶片101包括围绕器件105的密封环117。环117位于开口111之上，其中，层113的多晶硅材料与开口111处衬底103的硅材料接触。
电接触也形成在具有图1中所示的接触器(contact)121和123的晶片101上。在所示实施例中，接触器121和123包括多晶硅层113、多晶硅层120、和金属层122，但是不包括电介质层118。每个接触器都通过由层113形成的多晶硅通道(例如，图2的211)而电耦合到器件105的结构。
在一个实施例中，多晶硅层113是3500埃厚，但是在其他实施例中可为其他厚度。在一个实施例中，层113掺杂有杂质，例如磷，以通过离子注入增加导电性，但是在其他实施例中可掺杂其他杂质，并且可以通过其他方法来进行掺杂。
在一个实施例中，多晶硅层120是32K埃厚，但是在其他实施例中可为其他厚度。在一个实施例中，通过掺杂的氧化物扩散工艺，例如用磷来掺杂层120，但是在其他实施例中可掺杂其他杂质以改善导电性，并且可通过其他方法来进行掺杂。
金属层122形成在图形化的层120之上。在一个实施例中，层122由铝形成。在一个实施例中，层122由99.5％的铝(原子重量)和0.5％的铜(原子重量)来形成。但是，在其他实施例中，层122可由其他金属制成或包括其他金属，诸如金、铂、钨、钛、钴、镍、锡和钽制成。在一些实施例中，层122可包括一些非金属材料，诸如锗或硅。在一个实施例中，层122包括98％原子重量或者更大的主要金属材料(例如，在一些实施例中为铝)。在一个实施例中，层122厚度范围为3-4微米，但是在其他实施例中可为其他厚度。
在一个实施例中，器件105包括一部分金属层122。在一个实施例中，一部分的层122用于将重量添加到器件105的校验质量。
在一些实施例中，层122通过物理气相沉积、溅射、蒸镀、或电镀形成。随后对层122进行图形化，以形成包括在密封环117和接触器121和123上的所需结构。
图2示出了晶片101的顶视图。示出环117具有位于器件105周围的矩形形状。晶片101包括多个接触器201、203、121、123、205和207，其分别通过多晶硅通道211、213、215、221、219和217电耦合到器件105的结构。通道由来自层113的多晶硅制成。
在所示实施例中，通道213、215、221和219穿过环117。在这些位置中，环117的层113通过在通道的横向位置处的氮化物层118和其他电介质材料与该通道电隔离。在所示实施例中，环117包括两部分的层113。部分212呈现出“C”结构，其始于侧壁218，并且其延伸经过器件105周围的三个整个侧面，而延伸到侧壁220。第二部分216位于第一组通道211、213和215与第二组通道221、219和217之间。部分216与侧壁218分开，以从通道213和215形成开口，并且部分216与侧壁220分开，以形成用于通道221和219的开口。
通道211和217与环117的层113的部分是连续的。由此，对于从外部上的通道部分向环内部上的通道部分而穿过环117的这些通道没有示出虚线。因此，环117电耦合至接触器205和201。在一个实施例中，接触器205和201用作接地焊垫，且通过通道并经由开口111中的导电材料电耦合至衬底103。
开口111位于环117的层113与通道211和217的这些部分之下，以提供与衬底103的欧姆接触。开口111不在通道213、215、221和219之下，以将这些结构与衬底103隔离。
在其他实施例中，至衬底103的开口可在不同位置，可为不同尺寸，和/或可为不同形状。例如，在一个实施例中，开口111仅位于通道211和217延伸通过环117的位置处的环117之下。在其他实施例中，衬底开口可位于环117外部位置处的通道211和217之下。在一个实施例中，衬底开口可位于接触器201和205之下。
在形成氮化物电介质层118之后，将电介质层，例如二氧化硅(未示出)沉积在晶片101之上。此时将开口形成在环117的这些部分处的氮化物层118中。随后，将层120形成在晶片101之上。环117的层120的部分经由氮化物层118的开口与环117的层113的部分接触。
图3是帽盖晶片301的部分侧视图。在所示实施例中，帽盖晶片301包括体硅衬底303和形成在其上的氧化物层305。在一个实施例中，热生长层305，但是在其他实施例中，也可以对其进行沉积。层305为4950埃厚，但是在其他实施例中可为其他厚度。
在形成层305之后，在沟槽311和307的位置处，在层305中形成开口。然后，对晶片301进行蚀刻工艺(湿法或者干法)以在衬底303中形成沟槽311和307。之后，在层305中形成开口309，以露出衬底303。
参考图4，将多晶硅层401形成在晶片301之上。在一个实施例中，层401厚度在750-2500埃的范围内，但是在其他实施例中，可为其他厚度。在一个实施例中，可通过化学气相沉积工艺(CVD)来形成层401，但是在其他实施例中可通过其他工艺形成。在一个实施例中，可通过以高于550摄氏度的温度的工艺形成层401。
在一些实施例中，层401用作籽晶层，用于随后形成的层403。层403由硅锗制成。在一个实施例中，层403包括在20-40原子百分比范围内的锗，其余的是硅。但是其他实施例可具有不同原子百分比的锗。在一个实施例中，相对于图4中所示的图，层403的锗浓度可发生变化，其中，在层403底部处有较低锗浓度并且在层403顶部处有较高锗浓度。在一个实施例中，通过CVD工艺形成层403，但是在其他实施例中可通过其他工艺形成。在一个实施例中，硅锗层403厚度在500-2000埃的范围内，但是在其他实施例中可为其他厚度。
层405形成在层403之上。层405由多晶锗制成。在一个实施例中，层405厚度在2000-4000埃的范围内，但是在其他实施例中可为其他厚度。在一个实施例中，层405由CVD工艺形成，但是在其他实施例中可通过其他工艺形成。
在一些实施例中，可研磨并抛光晶片301的背面侧。而且在一些实施例中，可在晶片301背面侧中形成沟槽(未示出)。
在一个实施例中，多晶层401、403和405不掺杂导电性杂质(例如硼、磷和砷)。在其他实施例中，其掺杂有导电性或其他类型杂质。
图5是示出晶片301与晶片101接触的部分剖面侧视图，这里，环117与开口309对准，沟槽311位于接触器121和123之上，且沟槽307位于器件105之上。图5示出了在施加热量(一些实施例中还施加压力)以用于将两个晶片接合到一起之前的两个晶片。
图6是在通过施加热量至两个晶片而将晶片101和301接合到一起之后的部分剖面侧视图。在接合工艺期间，环117的层122的金属材料与层401的多晶硅、层403的多晶硅锗、以及层405的多晶锗反应，以形成铝、硅、和锗的接合材料601。在一个实施例中，该材料601是铝(或其他实施例中为其他金属)、硅、和锗的三元系材料。在一个实施例中，铝(或其他实施例中的层122的其他材料)是最大体积成分，之后是锗，再之后是硅。材料601是导电的。在一个实施例中，将材料601描述为Al-Ge-Si共晶化合物。在一个实施例中，可将材料601描述为化合物膜。在一个实施例中，材料601中硅的原子百分比大于5％。
在环117完全包围器件105的实施例中，材料601在晶片101和301之间提供用于器件105的气密性密封。此外，由于材料601是导电性的，在一些实施例中，其在两个晶片之间提供导电路径(例如，接地路径)。
在425-500摄氏度(C)范围内的温度下，和更优选在450-475摄氏度范围内的温度下接合晶片。但是，在其他实施例中可使用其他温度。使用铝用于层122是优选的，这是由于其允许使用500摄氏度以下的接合温度。在一些实施例中，在接合工艺期间，在衬底303和衬底103之间的间隙可自图5中示出的位置减小。
在一些实施例中，除了施加热量之外在压力下将晶片接合到一起。在一个实施例中，施加范围在5000-10,000毫巴内的工具压力，在一些实施例中，优选压力为6500毫巴。但是在其他实施例中，可使用其他的施加接合压力。
在一些实施例中，通过CVD工艺(包括等离子体增强CVD工艺)形成多晶锗的层405提供了一种用于通过产生较少颗粒的工艺而形成这种层的方法，这会导致较小的缺陷密度。
而且，在一些实施例中，利用CVD沉积，多晶锗层为该层提供允许与层122的材料较好接合的粗糙度。
在一些实施例中，在硅锗的多晶层(例如，层403)上形成锗的多晶层(例如，层405)可避免在籽晶层401所处的位置处的材料601中形成孔隙。相信，在接合工艺期间使用中间硅锗层403可以抑制硅从籽晶的多晶硅层401迁移到层405中。因此，利用中间硅锗层403导致材料601变成更强且更均匀的材料。
在图6中所示阶段之后进一步处理获得的晶片(图6中接合到一起的晶片101和晶片301)。例如，去除衬底303的部分以露出接触器121和123，用于这些接合焊垫的外部连接。之后，将获得的晶片单分成多个管芯，其中，每个管芯都包括与器件105相似的器件，其通过与材料601相似的材料而被密封。封装这些管芯以将其合并到电子***中。
在一些实施例中，帽盖晶片301可包括形成于其上的集成电路的半导体器件。例如，在沟槽307中形成集成电路(例如，微处理器)。集成电路可电耦合至器件105。
在所示实施例中，环117的金属层122形成在器件晶片101上，且多晶层401、403和405形成在晶片301上。在其他实施例中，层401、403、和405形成在器件晶片上，且被接合到形成在帽盖晶片301上的金属环。
在一个实施例中，方法包括：在第一衬底之上形成包括金属的层，提供第二衬底，以及形成由第二衬底支撑的包括硅的第一层。该方法还包括：在第一层上形成包括锗和硅的第二层，在第二层上形成包括锗的第三层，以及使得第三层和包括金属的层接触。该方法还包括：在使得第三层和包括金属的层接触之后，在第一衬底和第二衬底之间形成机械接合材料。形成机械接合材料包括向第三层和包括金属的层施加热量。接合材料包括包括金属的层的金属和第三层的材料。
在另一实施例中，提供在第一衬底和第二衬底之间的密封的方法包括使得第一衬底和第二衬底经由接合叠层接触。接合叠层包括包括硅的第一层、具有锗和硅的与第一层接触的第二层、包括锗的与第二层接触的第三层、和包括金属的与第三层接触的层。该方法包括向接合叠层施加热量和压力，以使接合叠层成为第一和第二衬底之间的接合物。
在另一实施例中，半导体结构包括第一衬底、在第一衬底上的半导体器件、第二衬底、和在第一衬底和第二衬底之间的包围半导体器件以密封第一衬底和第二衬底之间的半导体器件的导电接合物。导电接合物包括金属、硅和锗。导电接合物中硅的原子百分比大于5％。
虽然已经示出和描述了本发明的具体实施例，但是本领域技术人员将认识到，基于本文的教导，在不脱离本发明及其更宽方面的情况下可作出进一步的变化和改进，且由此，权利要求在其范围内包含所有这种变化和改进，如落在本发明实际的精神和范围内的那些。

Claims (19)

1.一种接合半导体器件封装方法，包括：
在第一衬底之上形成包括金属的层；
提供第二衬底；
其特征在于所述方法进一步包括：
形成由所述第二衬底支撑的包括硅的第一层；
在所述第一层上形成包括锗和硅的第二层；
在所述第二层上形成包括锗的第三层；
使得所述第三层和所述包括金属的层接触；
在使得所述第三层和所述包括金属的层接触之后，在所述第一衬底和所述第二衬底之间形成机械接合材料，其中，形成机械接合材料包括向所述第三层和所述包括金属的层施加热量，其中，所述接合材料包括所述包括金属的层的金属和所述第三层的材料；以及
在所述接触之前在所述第一衬底或所述第二衬底中的一个之上形成半导体器件，其中所述接合材料包围所述半导体器件。
2.如权利要求1所述的方法，其中，所述包括金属的层的金属是铝。
3.如权利要求2所述的方法，其中，所述机械接合材料包括是包括铝、硅和锗的三元系的材料。
4.如权利要求1所述的方法，其中，形成所述机械接合材料包括向所述第一衬底和所述第二衬底施加接合压力。
5.如权利要求4所述的方法，其中，所述接合压力大于5000毫巴。
6.如权利要求1所述的方法，其中，施加热量包括以500摄氏度或以下的温度施加热量。
7.如权利要求1所述的方法，其中，形成所述第一层、所述第二层和所述第三层的步骤特征还在于所述第一层、所述第二层和所述第三层是多晶的。
8.如权利要求1所述的方法，还包括：
在形成所述包括金属的层之前在所述第一衬底之上形成多晶硅层，其中，形成所述包括金属的层的步骤特征还在于所述包括金属的层被形成在所述多晶硅层上。
9.如权利要求1所述的方法，其中：
形成所述第一层的步骤特征还在于将所述第一层形成为厚度小于所述第三层的厚度；
形成所述第二层的步骤特征还在于将所述第二层形成为厚度小于所述第三层的厚度。
10.如权利要求1所述的方法，还包括：
在所述第一衬底之上形成被包括所述包括金属的层的环包围的半导体器件；和
在所述第二衬底中形成空腔，其中，接触的步骤特征还在于使得所述空腔对准所述半导体器件。
11.如权利要求10所述的方法，其中，形成所述半导体器件的步骤特征还在于所述半导体器件是微电子机械***(MEMS)器件。
12.如权利要求1所述的方法，其中，所述包括金属的层的铝的原子重量百分比是98％或者更大。
13.一种用于提供在第一衬底和第二衬底之间的密封的方法，包括：
使得所述第一衬底和所述第二衬底接触，
其特征在于所述方法进一步包括：其中，所述第一衬底经由接合叠层与所述第二衬底接触，其中，所述接合叠层包括：
包括硅的第一层；
包括锗和硅的与所述第一层接触的第二层；
包括锗的与所述第二层接触的第三层；以及
包括金属的与所述第三层接触的层；
向所述接合叠层施加热量和压力，以使所述接合叠层成为所述第一和所述第二衬底之间的接合物；
在所述第一衬底上形成半导体器件，其中所述接合叠层包围所述半导体器件。
14.如权利要求13的方法，其中接触的步骤特征还在于所述包括金属的层被形成在所述第一衬底之上并且所述第一层形成在所述第二衬底之上。
15.如权利要求13所述的方法，其中，接触的步骤特征还在于所述第一、第二和第三层是多晶的。
16.如权利要求13所述的方法，其中，接触的步骤特征还在于所述包括金属的层包括铝。
17.如权利要求13所述的方法，其中，接触的步骤特征还在于所述第一和第二层的厚度比所述第三层小。
18.如权利要求13所述的方法，其中，施加热量包括以500摄氏度或以下的温度施加热量。
19.一种半导体结构，包括：
第一衬底；
在所述第一衬底上的半导体器件；
第二衬底；
其特征在于所述半导体结构进一步包括：
在所述第一衬底和所述第二衬底之间的导电接合物，所述导电接合物包围所述半导体器件以密封在所述第一衬底和所述第二衬底之间的所述半导体器件，其中：
所述导电接合物包括金属、硅和锗；
多层叠层，所述多层叠层位于所述第一衬底和所述第二衬底之间并且被形成在所述第一衬底和所述第二衬底中的一个上，所述多层叠层包括：包括硅的第一层；包括多晶硅锗的第二层；以及包括多晶锗的第三层，其中，所述第一层被定位为最接近所述第一衬底和所述第二衬底中的所述一个，所述第三层被定位为最远离所述第一衬底和所述第二衬底中的所述一个，以及所述第二层位于所述第一层和所述第三层之间；
其中，所述多层叠层延伸到所述导电接合物。
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Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE537499C2 (sv) * 2009-04-30 2015-05-26 Silex Microsystems Ab Bondningsmaterialstruktur och process med bondningsmaterialstruktur
DE102009026628A1 (de) * 2009-06-02 2010-12-09 Robert Bosch Gmbh Mikromechanisches Bauelement und Verfahren zum Herstellen eines mikromechanischen Bauelements
US8378490B2 (en) * 2011-03-15 2013-02-19 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor apparatus including a metal alloy between a first contact and a second contact
US8652865B2 (en) * 2011-08-16 2014-02-18 Freescale Semiconductor, Inc. Attaching a MEMS to a bonding wafer
ITTO20110995A1 (it) * 2011-10-31 2013-05-01 St Microelectronics Srl Dispositivo micro-elettro-meccanico dotato di regioni conduttive sepolte e relativo procedimento di fabbricazione
US8633088B2 (en) 2012-04-30 2014-01-21 Freescale Semiconductor, Inc. Glass frit wafer bond protective structure
US8749036B2 (en) 2012-11-09 2014-06-10 Analog Devices, Inc. Microchip with blocking apparatus and method of fabricating microchip
US10160638B2 (en) 2013-01-04 2018-12-25 Taiwan Semiconductor Manufacturing Company, Ltd. Method and apparatus for a semiconductor structure
DE102014210852B4 (de) 2014-06-06 2022-10-06 Robert Bosch Gmbh Bauteil mit zwei Halbleiter-Bauelementen, die über eine strukturierte Bond-Verbindungsschicht miteinander verbunden sind, und Verfahren zum Herstellen eines solchen Bauteils
US9418830B2 (en) 2014-06-27 2016-08-16 Freescale Semiconductor, Inc. Methods for bonding semiconductor wafers
US20170081178A1 (en) * 2015-09-22 2017-03-23 Freescale Semiconductor, Inc. Semiconductor device package with seal structure
GB2546830B (en) 2016-01-29 2018-11-14 Cirrus Logic Int Semiconductor Ltd Integrated MEMS transducers
US10002844B1 (en) * 2016-12-21 2018-06-19 Invensas Bonding Technologies, Inc. Bonded structures
US10793427B2 (en) * 2017-04-04 2020-10-06 Kionix, Inc. Eutectic bonding with AlGe
US10167191B2 (en) 2017-04-04 2019-01-01 Kionix, Inc. Method for manufacturing a micro electro-mechanical system
CN109422234B (zh) * 2017-09-01 2021-04-09 中芯国际集成电路制造(上海)有限公司 测试结构及其制造方法
IT201700103511A1 (it) * 2017-09-15 2019-03-15 St Microelectronics Srl Dispositivo microelettronico dotato di connessioni protette e relativo processo di fabbricazione
US11380597B2 (en) 2017-12-22 2022-07-05 Invensas Bonding Technologies, Inc. Bonded structures
CN108203076B (zh) * 2018-01-03 2020-04-14 上海华虹宏力半导体制造有限公司 晶圆键合方法
US11004757B2 (en) 2018-05-14 2021-05-11 Invensas Bonding Technologies, Inc. Bonded structures
US11313877B2 (en) 2018-06-19 2022-04-26 Kionix, Inc. Near-zero power wakeup electro-mechanical system
CN114552378B (zh) 2020-11-20 2023-03-31 中国科学院苏州纳米技术与纳米仿生研究所 窄线宽激光器

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4348802A (en) * 1979-04-18 1982-09-14 Fijitsu Limited Process for producing a semiconductor device
US6713326B2 (en) * 2000-08-16 2004-03-30 Masachusetts Institute Of Technology Process for producing semiconductor article using graded epitaxial growth
US6890835B1 (en) * 2000-10-19 2005-05-10 International Business Machines Corporation Layer transfer of low defect SiGe using an etch-back process
CN101171665A (zh) * 2005-03-18 2008-04-30 因文森斯公司 晶片封装环境中制作ai/ge键合的方法及由其生产的产品

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5693574A (en) * 1991-02-22 1997-12-02 Deutsche Aerospace Ag Process for the laminar joining of silicon semiconductor slices
JP3230638B2 (ja) * 1993-02-10 2001-11-19 シャープ株式会社 発光ダイオードの製造方法
US6090687A (en) * 1998-07-29 2000-07-18 Agilent Technolgies, Inc. System and method for bonding and sealing microfabricated wafers to form a single structure having a vacuum chamber therein
JP2002050764A (ja) * 2000-08-02 2002-02-15 Matsushita Electric Ind Co Ltd 薄膜トランジスタ、アレイ基板、液晶表示装置、有機ｅｌ表示装置およびその製造方法
US6818938B1 (en) * 2002-12-10 2004-11-16 National Semiconductor Corporation MOS transistor and method of forming the transistor with a channel region in a layer of composite material
US6936491B2 (en) * 2003-06-04 2005-08-30 Robert Bosch Gmbh Method of fabricating microelectromechanical systems and devices having trench isolated contacts
FR2859312B1 (fr) * 2003-09-02 2006-02-17 Soitec Silicon On Insulator Scellement metallique multifonction
US7034393B2 (en) * 2003-12-15 2006-04-25 Analog Devices, Inc. Semiconductor assembly with conductive rim and method of producing the same
US6936918B2 (en) * 2003-12-15 2005-08-30 Analog Devices, Inc. MEMS device with conductive path through substrate
US7538401B2 (en) * 2005-05-03 2009-05-26 Rosemount Aerospace Inc. Transducer for use in harsh environments
US7245009B2 (en) * 2005-06-29 2007-07-17 Motorola, Inc. Hermetic cavity package
US7358194B2 (en) * 2005-08-18 2008-04-15 Tokyo Electron Limited Sequential deposition process for forming Si-containing films
US20070045795A1 (en) * 2005-08-31 2007-03-01 Mcbean Ronald V MEMS package and method of forming the same
US7553687B2 (en) * 2006-06-28 2009-06-30 Intel Corporation Dual seed semiconductor photodetectors
JP4997913B2 (ja) * 2006-10-17 2012-08-15 日産自動車株式会社 半導体装置および半導体装置の製造方法
US8119431B2 (en) * 2009-12-08 2012-02-21 Freescale Semiconductor, Inc. Method of forming a micro-electromechanical system (MEMS) having a gap stop

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4348802A (en) * 1979-04-18 1982-09-14 Fijitsu Limited Process for producing a semiconductor device
US6713326B2 (en) * 2000-08-16 2004-03-30 Masachusetts Institute Of Technology Process for producing semiconductor article using graded epitaxial growth
US6890835B1 (en) * 2000-10-19 2005-05-10 International Business Machines Corporation Layer transfer of low defect SiGe using an etch-back process
CN101171665A (zh) * 2005-03-18 2008-04-30 因文森斯公司 晶片封装环境中制作ai/ge键合的方法及由其生产的产品

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