CN102288890B - Method and device for detecting failures of chip - Google Patents
Method and device for detecting failures of chip Download PDFInfo
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- CN102288890B CN102288890B CN 201110231957 CN201110231957A CN102288890B CN 102288890 B CN102288890 B CN 102288890B CN 201110231957 CN201110231957 CN 201110231957 CN 201110231957 A CN201110231957 A CN 201110231957A CN 102288890 B CN102288890 B CN 102288890B
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Abstract
The invention discloses a method and device for detecting failures of a chip. The method and device disclosed by the invention are used for detecting whether the chip of an electronic product or electronic equipment is in a failure state or not under the premise that the electronic product or the electronic equipment is normally operated, wherein the method for detecting the failures of the chip comprises the following steps: when the actual power supply voltage value of the chip to be detected reaches the preset power supply voltage value, determining the moment as a detection point in the course of starting the chip to be detected; detecting whether the actual absorption current value of the chip to be detected at the moment is in the specified value range or not; if not, determining the detection point as a detection point which does not meet the conditions; and when at least one detection point which does not meet the conditions exists, judging that the chip to be detected is in the failure state.
Description
Technical field
The present invention relates to technical field of semiconductors, relate in particular to a kind of failure of chip detection method and device.
Background technology
At present, all include a large amount of chips in electronic product or the electronic equipment, the normal operation of electronic product or electronic equipment need to depend on these chips.If in operational process, a certain chip is in malfunction, will affect the normal operation of electronic product or electronic equipment.In the prior art, the detection mode whether detection chip is in malfunction is: stop first the work of electronic product or electronic equipment, chip to be detected is taken out, detect by special chip detection instrument.Whether be in the judgement of malfunction for chip, mainly be take the starting current of chip as foundation, this is because chip when normal operation, electric current in its start-up course, meet a specific I (electric current) V (voltage) curvilinear motion, if its starting current curve deviation surpasses certain limit, judge that then this chip is in malfunction.For single isolated chip, the most frequently used checkout equipment is graphic instrument, it detects principle: provide a voltage that changes from low to high by giving chip to be detected, when measuring its corresponding different power voltage value, the size of the Absorption Current value of chip to be detected, and show with curve form, the IV curve that the shows IV curve with the normal operation chip is compared, judge whether chip to be detected is in malfunction.
Based on this, in the prior art, mainly contain following three kinds of detection schemes: 1, radioscopy: adopt the x-ray fluoroscopy chip internal, check whether the chip internal circuit occurs unusually; 2, graphic instrument is measured IV (voltage): utilize special detecting instrument, the voltage that produces a variation is supplied with chip, and the variation of corresponding voltage, measure the variation of chip current, show with the IV curve form, and compare with the IV curve of normal chip, judge with this whether chip is in malfunction; 3, diced chip: by disassembling the chip internal result, at microscopically, the chip internal circuit after disassembling is checked, to determine whether chip is in malfunction.
Because in above-mentioned three kinds of schemes, all need to detect chip by the special detection instrument, its precondition is that the electronic product or the electronic equipment that comprise chip to be detected need to quit work, and like this, has just affected relevant electronic product or the normal operation of electronic equipment.
Summary of the invention
The embodiment of the invention provides a kind of failure of chip detection method and device, in order under the prerequisite of the normal operation of electronic product or electronic equipment, detects the chip that this electronic product or electronic equipment comprise and whether is in malfunction.
The embodiment of the invention provides a kind of chip detecting method, comprising:
In chip enable process to be detected, when the actual power magnitude of voltage of chip to be detected reaches default supply voltage value, determine that be a check point this moment;
Detect chip to be detected actual absorption current value at this moment and whether be within the span of regulation, if be not in, this check point is defined as a check point that does not satisfy condition;
When the check point that exists at least one not satisfy condition, judge that described chip to be detected is in malfunction.
The embodiment of the invention provides a kind of chip-detecting apparatus, comprises the electric current conversion unit, and identifying unit and at least one detecting unit adopt parallel way to connect between each detecting unit, wherein:
Described electric current conversion unit is used for the actual power magnitude of voltage of chip to be detected is converted into the output of actual absorption current value;
Each detecting unit is used in chip enable process to be detected, when the actual power magnitude of voltage of chip to be detected reaches default supply voltage value, determines that be a check point this moment; And detect chip to be detected actual absorption current value at this moment and whether be within the span of regulation, if be not in, this check point is defined as a check point that does not satisfy condition;
Described identifying unit when being used at least one does not satisfy condition when existence check point, judges that described chip to be detected is in malfunction.
Failure of chip detection method and device that the embodiment of the invention provides, in chip enable process to be detected, when the actual power magnitude of voltage of this chip to be detected reaches supply voltage value corresponding to this check point place, be a check point definite this moment, if when detecting within the span that this chip to be detected actual absorption current value at this moment is not in regulation, with this check point as a monitoring point that does not satisfy condition, if when having the check point that at least one does not satisfy condition, judge that then this chip to be detected is in malfunction.Like this, the electronic product or the electronic equipment that need not to comprise this chip to be detected quit work, and can detect chip to be detected and whether be in malfunction in chip enable process to be detected.
Other features and advantages of the present invention will be set forth in the following description, and, partly from instructions, become apparent, perhaps understand by implementing the present invention.Purpose of the present invention and other advantages can realize and obtain by specifically noted structure in the instructions of writing, claims and accompanying drawing.
Description of drawings
Fig. 1 is in the prior art, and the supply voltage value changes schematic diagram in the chip enable process to be detected;
Fig. 2 is in the prior art, is in normal operating conditions and the IV curve comparison schematic diagram that is in the chip of malfunction;
Fig. 3 is in the embodiment of the invention, failure of chip detection method implementing procedure schematic diagram;
Fig. 4 is in the embodiment of the invention, at the check point place that determines, and when chip to be detected is in respectively normal condition and malfunction, the Output rusults schematic diagram of the second comparer, the 3rd comparer and the first trigger and the second trigger;
Fig. 5 is in the embodiment of the invention, the structural representation of chip failure detection device;
Fig. 6 is in the embodiment of the invention, the structural representation of detecting unit;
Fig. 7 a is in the embodiment of the invention, and the electric current conversion unit comprises the structural representation of the pick-up unit of fixed resistance and subtracter;
Fig. 7 b is in the embodiment of the invention, and the electric current conversion unit is the structural representation of the pick-up unit of current sensor;
Fig. 8 is in the embodiment of the invention, comprises the structural representation of the pick-up unit of three detecting units.
Embodiment
For when electronic product or electronic equipment normally move, detect its chip that comprises and whether be in malfunction, the embodiment of the invention provides a kind of failure of chip detection method and device.
Below in conjunction with Figure of description the preferred embodiments of the present invention are described, be to be understood that, preferred embodiment described herein only is used for description and interpretation the present invention, be not intended to limit the present invention, and in the situation that do not conflict, embodiment and the feature among the embodiment among the present invention can make up mutually.
For chip, allow its normal operation, must provide an operating voltage Vcc, and when the chip normal operation, its Absorption Current value is Icc.But the supply voltage value of chip is not directly just to reach its operating voltage Vcc, but from 0 to the Vcc process of rising in time, this process is called the start-up course of chip.
As shown in Figure 1, in chip enable process to be detected, the supply voltage value changes schematic diagram, and horizontal ordinate represents time T, and ordinate represents the supply voltage value V of chip, and the supply voltage value of chip is at t
0Constantly reach V
b, at t
1Constantly reach V
a, at t
2Constantly reach operating voltage Vcc.
For chip, when the supply voltage value not simultaneously, corresponding Absorption Current value is also different, and the corresponding relation between the Absorption Current value of the supply voltage value of chip and chip meets a specific IV curve.For the chip of same model, because its internal hardware framework all is identical, so its IV curve also is the same, when chip was in malfunction, its current characteristics must change, and being reflected on the IV curve is exactly that the IV curve occurs unusually.
As shown in Figure 2, for being in normal operating conditions and the IV curve comparison schematic diagram that is in the chip of malfunction.Horizontal ordinate represents the supply voltage value of chip, ordinate represents the Absorption Current value of chip, wherein, solid line represents to be in the IV curve of the actual absorption current value of the supply voltage value of chip of normal operating conditions and chip, and dotted line represents to be in the IV curve of the actual absorption current value of the supply voltage value of chip of malfunction and chip.As shown in Figure 2, along with the rising of the supply voltage value of chip, its Absorption Current value also increases, because for chip, the supply voltage value is lower, and its Absorption Current value is less than running current, and at this moment chip can't be worked.When the supply voltage value of chip reached its operating voltage Vcc gradually, the Absorption Current value of chip also increased to its working current Icc gradually, and chip begins normal operation, so the IV curve of chip can represent with the curve of ascendant trend.
Can find out in two IV curves from comparison diagram 2, when the operating voltage of chip was Vcc, no matter whether chip was in malfunction, its Absorption Current value all is Icc, therefore, insecure when the Absorption Current value of the chip during from work judges whether chip is in malfunction, because, even many times chip is in malfunction, also can continuous firing, just under certain specific trigger condition, high temperature for example, perhaps low temperature etc. just can show and break down.Based on above-mentioned analysis, it is a kind of in the chip enable process that the embodiment of the invention provides, and whether detection chip is in detection method and the device of malfunction, in order to the actual absorption current value according to chip, judges whether chip is in malfunction.Illustrate, when chip is in normal operating conditions, when the supply voltage value of chip is Va, the actual absorption electric current of chip is Ia, consider actual needs, can allow the actual absorption current value of chip certain error rate to occur, take the actual absorption electric current that allows chip 10% error rate appears as example, the span of the actual absorption current value of chip is [0.9Ia, 1.1Ia], in the start-up course of chip, if detect the actual absorption electric current of chip at [0.9Ia, 1.1Ia] between, illustrate that then chip is in normal operating conditions, otherwise the explanation chip is in malfunction.
Embodiment one
As shown in Figure 3, the implementing procedure schematic diagram of the failure of chip detection method that provides for the embodiment of the invention comprises the steps:
S301, in chip enable process to be detected, when the actual power magnitude of voltage of chip to be detected reaches default supply voltage value, determine that be a check point this moment;
Whether S302, detection chip to be detected actual absorption current value at this moment are within the span of regulation, if be not in, this check point are defined as a check point that does not satisfy condition;
S303, when the check point that exists at least one not satisfy condition, judge that this chip to be detected is in malfunction.
During implementation, the accuracy in order to guarantee that failure of chip detects can in the process that chip enable powers on, extract a plurality of check points and detect.To extract three check points as example, suppose the check point place in extraction, the supply voltage value that chip is corresponding is respectively Va, Vb and Vc, judge that whether chip is within the span of regulation at the actual absorption current value of each check point, if so, illustrates that then chip is in normal operating conditions, if not, illustrate that then chip is in malfunction.
During implementation, in step 302, can whether be within the span of regulation according to the actual absorption current value that following process detects chip to be detected:
The negative input of step 1, the first comparer is received in supply voltage value corresponding to check point place of determining, and electrode input end receives the actual power magnitude of voltage of described chip to be detected;
The negative input of step 2, the second comparer receives the actual absorption current value of chip to be detected, electrode input end is received in the check point place that determines, stipulate the higher limit of the actual absorption current value of this chip to be detected, and export the D input end of the first comparative result to the first trigger by output terminal;
The negative input of step 3, the 3rd comparer is received in this check point place, stipulate the lower limit of the actual absorption current value of this chip to be detected, electrode input end receives the actual absorption current value of this chip to be detected, and exports the D input end of the second comparative result to the second trigger by output terminal;
Step 4, when the actual power magnitude of voltage of chip to be detected reaches the supply voltage value corresponding at this check point place, the Q output terminal that the first comparer triggers the first trigger is exported the first comparative result that the D input end of the first trigger receives, and the Q output terminal that triggers the second trigger is exported the second comparative result that the D input end of the second trigger receives;
If the second comparative result of the Q output terminal output of the first comparative result of the Q output terminal of step 5 the first trigger output and the second trigger is at 1 o'clock, determine that the actual absorption current value of chip to be detected is within the span of regulation; If in the second comparative result of the Q output terminal output of the first comparative result of the Q output terminal of the first trigger output and the second trigger, at least one is not 1 o'clock, determines that the actual absorption current value of chip to be detected is not within the span of regulation.
Concrete, can stipulate according to following formula the span of the actual absorption current value of chip to be detected: I
Max=I* (1+r
1); I
Min=I* (1-r
2), wherein: I is illustrated in the check point place that determines, chip to be detected corresponding actual absorption current value when being in normal operating conditions; r
1Expression the first error rate default, that allow the actual absorption current value to occur, r
2Expression the second error rate default, that allow the actual absorption current value to occur; I
MaxBe illustrated in the check point place that determines, stipulate the higher limit of the actual absorption current value of chip to be detected; I
MinBe illustrated in the check point place that determines, stipulate the lower limit of the actual absorption current value of chip to be detected.Especially, during implementation, the first error rate default, that allow the actual absorption current value to occur can be identical with the second error rate, i.e. r
1=r
2For convenience of description, below with r
1=r
2=r is that example describes.
As shown in Figure 4, at the check point place that determines, when chip to be detected is in respectively normal condition and malfunction, the Output rusults schematic diagram of the second comparer and the 3rd comparer and the first trigger and the second trigger.With at this check point place, when chip was in normal operating conditions, corresponding magnitude of voltage and current value be (V, I), and allowing the first error rate that the actual absorption electric current occurs and the second error rate to be 10% is example.Wherein, V1 is chip to be detected when being in normal operating conditions, when electric current is 1.1I, and corresponding magnitude of voltage, V2 are chip to be detected when being in normal operating conditions, when electric current is 0.9I, corresponding magnitude of voltage.If chip to be detected is in malfunction, if the supply voltage value is V, its actual Absorption Current may be much larger than 1.1I or much smaller than 0.9I.Among Fig. 4, in the supply voltage value during as V, the actual absorption current value of this chip to be detected is that example describes much larger than 1.1I take chip to be detected.Because when the supply voltage value of chip to be detected does not also reach V, the actual absorption current value of this chip to be detected just is far longer than 1.1I, therefore, saltus step occurs in the second comparer and the 3rd comparer in advance, so that when the supply voltage value of chip to be detected rises to V, because the input value of the second comparer negative input is greater than the input value of electrode input end, the input value of the electrode input end of the 3rd comparer is greater than the input value of negative input, thereby so that the Q output terminal of the first trigger is output as 0, the Q output terminal of the second trigger is output as 1, this explanation is when the supply voltage value of chip to be detected reaches V, the actual absorption current value of this chip to be detected can judge then that greater than 1.1I chip is in malfunction.
Based on same inventive concept, a kind of chip failure detection device also is provided in the embodiment of the invention, because the principle of this device solves problem is similar to the said chip fault detection method, therefore the enforcement of this device can referring to the enforcement of said chip fault detection method, repeat part and repeat no more.
Embodiment two
In the embodiment of the invention, chip failure detection device is described.
As shown in Figure 5, the structural representation of the chip failure detection device that provides for the invention process comprises electric current conversion unit 501, and identifying unit 502 and at least one detecting unit 503 adopt parallel way to connect between each detecting unit 503, wherein:
Electric current conversion unit 501 is used for the actual power magnitude of voltage of chip to be detected is converted into the output of actual absorption current value;
Each detecting unit 503 is used in chip enable process to be detected, when the actual power magnitude of voltage of chip to be detected reaches default supply voltage value, determines that be a check point this moment; And detect chip to be detected actual absorption current value at this moment and whether be within the span of regulation, if be not in, this check point is defined as a check point that does not satisfy condition;
Identifying unit 502 when being used at least one does not satisfy condition when existence check point, judges that described chip to be detected is in malfunction.
In the implementation, a detecting unit is for detection of a check point place, and whether the actual absorption current value of chip to be detected is within the span of regulation.That is to say, carry out the failure of chip detection if extract n check point, corresponding needs have n detecting unit, connect with parallel way between each detecting unit.
Embodiment three
In the embodiment of the invention, the concrete structure of detecting unit 503 is described.
As shown in Figure 6, the structural representation for detecting unit 503 comprises: the first comparer 5031, the second comparers 5032, the three comparers 5033, the first triggers 5034, the second trigger 5035 and determination module 5036, wherein:
The negative input of the first comparer 5031 links to each other with constant pressure source, is received in supply voltage value corresponding to check point place of determining; The electrode input end of the first comparer 5031 links to each other with the supply voltage value of chip to be detected, is used for receiving the actual power magnitude of voltage of chip to be detected; The output terminal of the first comparer 5031 links to each other with the CLK pin of the first trigger 5034 with the second trigger 5035 respectively, when being used for actual power magnitude of voltage at chip to be detected and reaching the supply voltage value corresponding at this check point place, the Q output terminal that triggers the first trigger 5034 is exported the first comparative result that the D input end of the first trigger 5034 receives, and the Q output terminal that triggers the second trigger 5035 is exported the second comparative result that the D input end of the second trigger 5034 receives;
The negative input of the second comparer 5032 links to each other with the output terminal of electric current conversion unit 501, is used for received current conversion unit 501 actual absorption current values output, chip to be detected; The electrode input end of the second comparer 5032 links to each other with the first constant current source, be used for being received in the check point place that determines, the higher limit of the Absorption Current value of the chip to be detected of regulation, the output terminal of the second comparer 5032 links to each other with the D input end of the first trigger 5034, is used for the first comparative result is exported to the D input end of the first trigger 5034;
The negative input of the 3rd comparer 5033 links to each other with the second constant current source, is used for being received in the check point place that determines, the lower limit of the Absorption Current value of the chip to be detected of regulation; The electrode input end of the 3rd comparer 5033 links to each other with the output terminal of electric current conversion unit 501, is used for electric current conversion unit 501 actual absorption current values output, chip to be detected; The output terminal of the 3rd comparer 5033 links to each other with the D input end of the second trigger 5035, is used for the second comparative result is exported to the D input end of the second trigger 5035;
In the implementation, detecting unit 503 can be used for the span according to following formula regulation actual absorption current value: I
Max=I* (1+r
1); I
Min=I* (1-r
2), wherein: I is illustrated in the check point place that determines, chip to be detected corresponding Absorption Current value when being in normal operating conditions; r
1Expression the first error rate default, that allow the actual absorption current value to occur, r
2Expression the second error rate default, that allow the actual absorption current value to occur; I
MaxBe illustrated in the check point place that determines, stipulate the higher limit of the actual absorption current value of chip to be detected; I
MinBe illustrated in the check point place that chooses, stipulate the lower limit of the actual absorption current value of chip to be detected.Especially, during implementation, the first error rate default, that allow the actual absorption current value to occur can be identical with the second error rate, i.e. r
1=r
2
Need to prove, in the embodiment of the invention, the input value that the negative input of the first comparer 5031 receives is the stable voltage that sets, the input value that the negative input of the electrode input end of the second comparer 5032 and the 3rd comparer 5033 receives is the constant current value that sets in advance, can directly use the modes such as constant pressure source or stabilivolt to produce for the generation of burning voltage or steady current.
In the implementation, electric current conversion unit 501, can comprise that resistance is 1 ohm fixed resistance 5011 and subtracter 5012, shown in Fig. 7 a, when comprising fixed resistance and subtracter for electric current conversion unit 501, the structural representation of pick-up unit comprises that take pick-up unit a detecting unit is as example among Fig. 7 a.Wherein, fixed resistance 5011 is connected with chip to be detected; One input end of subtracter 5012 links to each other with an end of fixed resistance 5011, and another input end of subtracter 5012 links to each other with the other end of fixed resistance 5011; The output terminal of subtracter 5012 links to each other with the negative input of the second comparer 5032 and the electrode input end of the 3rd comparer 5033 respectively.
In the implementation, electric current conversion unit 501 can be current sensor 5013, and shown in Fig. 7 b, when being current sensor 5013 for electric current conversion unit 501, the structural representation of pick-up unit comprises that take pick-up unit a detecting unit is as example among Fig. 7 b.Wherein, current sensor 5,013 one input ends link to each other with the supply voltage value of chip to be detected, and another input end of current sensor 5013 links to each other with chip to be detected; The output terminal of current sensor 5013 links to each other with the negative input of the second comparer 5032 and the electrode input end of the 3rd comparer 5033 respectively.
Detect principle for the ease of the failure of chip of understanding the embodiment of the invention, below introduce respectively the principle of work of each electron device that relates in the embodiment of the invention.Subtracter, the output valve of the output terminal of subtracter is equivalent to the difference of the input value of two input ends; Comparer, when the input value of comparer positive pole during greater than the input value of negative pole, the output terminal of comparer is output as high level, when the input value of comparer positive pole during less than or equal to the input value of negative pole, the output terminal of comparer is output as low level, and (in digital circuit, high level can represent with 1, low level can represent with 0, for convenience of description, with 1 expression high level, represent low level with 0 in the embodiment of the invention); Trigger when one of the CLK of trigger pin reception has 0 to 1 rising edge, locks the Q output terminal that triggers trigger the input value of the D input end of trigger, and output; Current sensor can be converted into the electric current in the circuit current value output.
The detection principle of the pick-up unit that the embodiment of the invention provides is as follows: what the negative input of the first comparer 5031 received is the check point place that is determining, supply voltage value during chip normal operation to be detected, be assumed to be Va, namely the negative input of the first comparer 5031 receives the constant voltage values that magnitude of voltage is Va, the electrode input end of the first comparer 5031 receives the actual power magnitude of voltage of chip to be detected, in the start-up course of chip, the supply voltage value of chip to be detected will rise to Va gradually, before the supply voltage value of chip to be detected reaches Va, for the first comparer 5031, the input value of negative input is greater than the input value of electrode input end, therefore, the output valve of the first comparer 5031 output terminals is 0, moment after the supply voltage value of chip to be detected reaches Va, the input value of the negative input of the first comparer 5031 is less than the input value of electrode input end, therefore, the output valve of the output terminal of the first comparer 5031 is 1 with saltus step, thereby so that the CLK pin of the first trigger 5034 and the second trigger 5035 receives one 0 to 1 rising edge, so that the Q output terminal of the first trigger 5034 and the second trigger 5035 will lock the input value of D input end separately.For the D input end of the first trigger 5034 and the second trigger 5035, the input value of its reception is respectively from the output valve of the output terminal of the second comparer 5032 and the 3rd comparer 5033.For the second comparer 5032, the input value that its negative input receives is the output valve of electric current conversion unit 501, comprise that take electric current conversion unit 501 fixed resistance 5011 and subtracter 5012 are as example, principle according to subtracter, the output valve of subtracter 5012 is the difference of the input value of two input end, because two input ends of subtracter 5012 link to each other with the two ends of fixed resistance 5011 respectively, so that the difference of two input ends of subtracter 5012 is the voltage difference at fixed resistance two ends, and the resistance of fixed resistance is 1 ohm, therefore, the voltage difference at fixed resistance two ends is the current value by fixed resistance, because fixed resistance 5011 is connected with chip to be detected, thereby, electric current by fixed resistance 5011 is identical with the actual absorption current value of chip to be detected, that is to say, the output valve of the output terminal of subtracter 5012 is the actual absorption current value of chip to be detected, is assumed to be I.Thereby, the input value that the negative input of the second comparer 5032 receives is the actual absorption current value I of chip to be detected, the check point place that the input value that the electrode input end of the second comparer 5032 receives is being determined, stipulate the higher limit of the actual absorption current value of chip to be detected, the first error rate and the second error rate that occur take the actual absorption current value that allows chip to be detected are 10% as example, the input value that the electrode input end of the second comparer receives can be set to 1.1Ia, Ia is that chip is in the situation of normal operating conditions, when the supply voltage value of chip to be detected is Va, the actual absorption current value that chip to be detected is corresponding.If chip is in normal operating conditions, the electric current that chip absorbs should be at [0.9Ia, 1.1Ia] between, thereby the input value of the negative input of the second comparer 5032 is less than the input value of electrode input end, therefore, the output valve of the output terminal of the second comparer 5032 is 1, namely the input value of the D input end of the first trigger 5034 is 1, and when the Q output terminal of the first trigger 5034 locked the input value of D input end of the first trigger 5034, the Q output terminal of the first trigger 5034 also was 1; For the 3rd comparer 5033, the check point place of the input value of its negative input for determining, stipulate the lower limit of the actual absorption current value of chip to be detected, input value take the 3rd comparer 5033 negative poles is set to 0.9Ia as example, the input value of the 3rd comparer 5033 electrode input ends is the output valve of the output terminal of subtracter 5012, it is the actual absorption current value I of chip to be detected, if chip to be detected is in normal operating conditions, I is in [0.9Ia, 1.1Ia] between, therefore, the input value of the negative input of the 3rd comparer 5033 is less than the input value of electrode input end, thereby, the output valve of the output terminal of the 3rd comparer 5033 also is 1, namely the input value that receives of the D input end of the second trigger 5035 is 1, and when the Q output terminal of the second trigger 5035 locked the input value of D input end of the second trigger, the output valve of Q output terminal also was 1.Thereby if chip to be detected is in normal operating conditions, the output valve of the Q output terminal of the first trigger 5034 and the second trigger 5035 is 1, that is to say that the output valve of the Q output terminal of the first trigger 5034 and the second trigger 5035 is (1,1).
When chip to be detected is in malfunction, when the supply voltage value reaches Va, the actual absorption current value I of chip to be detected or greater than 1.1Ia, or less than 0.9Ia.Take the actual absorption current value of chip to be detected greater than 1.1Ia as example, for the second comparer 5032, the input value of its negative input is greater than the input value of electrode input end, therefore, the output valve of the output terminal of the second comparer 5032 is 0, and corresponding, the input value of the D input end of the first trigger 5034 is 0, when the Q output terminal of the first trigger 5034 locks the input value of D input end, so that the output valve of the Q output terminal of the first trigger 5034 is 0; For the 3rd comparer 5033, the input value of its negative input is less than the input value of electrode input end, therefore, the output valve of the output terminal of the 3rd comparer 5033 is 1, accordingly, the input value of the D input end of the second trigger 5035 is 1, when the Q output terminal of the second trigger 5035 locks the input value of D input end, so that the output valve of the Q output terminal of the second trigger 5035 is 1.The output valve that is to say the Q output terminal of the first trigger 5034 and the second trigger 5035 is (0,1).In like manner, when the actual absorption current value of chip to be detected during less than 0.9Ia, the output valve of the Q output terminal of the first trigger 5034 and the second trigger 5035 is (1,0).Thereby, can judge according to the output valve of the Q output terminal of the first trigger 5034 and the second trigger 5035 whether chip to be detected is in malfunction.
In the implementation, whether each detecting unit is within the span of regulation at actual absorption current value corresponding to a check point of choosing in advance for detection of chip.As shown in Figure 8, structural representation for the pick-up unit that comprises three detecting units, comprise that take the electric current conversion unit fixed resistance and subtracter are as example among Fig. 8, accordingly, in the start-up course of chip to be detected, extracting three check points detects respectively, with at each check point place, supply voltage value and the Absorption Current value of chip to be detected are respectively (Va, Ia), (Vb, Ib) and (Vc, Ic) be example, the testing process the when testing process of each detecting unit only comprises a detecting unit with above-mentioned detection device is identical, repeats no more here.When detecting within the span that exists at least one check point place, the actual absorption current value of chip to be detected not to be in regulation, can judge that then this chip to be detected is in malfunction.
Because the failure of chip detection method that the embodiment of the invention provides and device can be in chip enable processes to be detected, whether treat detection chip is in malfunction and detects, thereby, the electronic product or the electronic equipment that need not to comprise this chip to be detected quit work, realized whether detection chip is in the purpose of malfunction under the prerequisite of electronic product or electronic equipment normal operation.
Failure of chip detection method and device that the embodiment of the invention provides, in chip enable process to be detected, when the actual power magnitude of voltage of this chip to be detected reaches supply voltage value corresponding to this check point place, be a check point definite this moment, if when detecting within the span that this chip to be detected actual absorption current value at this moment is not in regulation, with this check point as a monitoring point that does not satisfy condition, if when having the check point that at least one does not satisfy condition, judge that then this chip to be detected is in malfunction.Like this, the electronic product or the electronic equipment that need not to comprise this chip to be detected quit work, and can detect chip to be detected and whether be in malfunction in chip enable process to be detected.
Obviously, those skilled in the art can carry out various changes and modification to the present invention and not break away from the spirit and scope of the present invention.Like this, if of the present invention these are revised and modification belongs within the scope of claim of the present invention and equivalent technologies thereof, then the present invention also is intended to comprise these changes and modification interior.
Claims (6)
1. a failure of chip detection method is characterized in that, comprising:
In chip enable process to be detected, when the actual power magnitude of voltage of chip to be detected reaches default supply voltage value, determine that be a check point this moment;
Detect chip to be detected actual absorption current value at this moment and whether be within the span of regulation, if be not in, this check point is defined as a check point that does not satisfy condition;
When the check point that exists at least one not satisfy condition, judge that described chip to be detected is in malfunction;
Wherein, detect chip to be detected actual absorption current value at this moment and whether be within the span of regulation, specifically comprise:
The negative input of the first comparer is received in supply voltage value corresponding to this check point place of determining, and electrode input end receives the actual power magnitude of voltage of described chip to be detected;
The negative input of the second comparer receives the actual absorption current value of described chip to be detected, electrode input end is received in the check point place that determines, stipulate the higher limit of the actual absorption current value of described chip to be detected, and export the D input end of the first comparative result to the first trigger by output terminal;
The negative input of the 3rd comparer is received in this check point place, stipulate the lower limit of the actual absorption current value of described chip to be detected, electrode input end receives the actual absorption current value of described chip to be detected, and exports the D input end of the second comparative result to the second trigger by output terminal;
When the actual power magnitude of voltage of chip to be detected reaches the supply voltage value corresponding at the check point place that determines, the Q output terminal that the first comparer triggers the first trigger is exported the first comparative result that the D input end of the first trigger receives, and the Q output terminal that triggers the second trigger is exported the second comparative result that the D input end of the second trigger receives;
If described the first comparative result and the second comparative result are 1, determine that chip to be detected actual absorption current value at this moment is within the span of regulation; If in described the first comparative result and the second comparative result, at least one is not 1 o'clock, determines that chip to be detected actual absorption current value at this moment is not within the span of regulation.
2. the method for claim 1 is characterized in that, stipulates the span of the actual absorption current value of described chip to be detected according to following formula:
I
Max=I* (1+r
1); I
Min=I* (1-r
2), wherein:
I is illustrated in the check point place that determines, the actual absorption current value when described chip to be detected is in normal operating conditions;
r
1Expression the first error rate default, that allow the actual absorption current value to occur, r
2Expression the second error rate default, that allow the actual absorption current value to occur;
I
MaxBe illustrated in the check point place that determines, stipulate the higher limit of the actual absorption current value of described chip to be detected;
I
MinBe illustrated in the check point place that determines, stipulate the lower limit of the actual absorption current value of described chip to be detected.
3. a chip failure detection device is characterized in that, comprises the electric current conversion unit, and identifying unit and at least one detecting unit adopt parallel way to connect between each detecting unit, wherein:
Described electric current conversion unit is used for the actual power magnitude of voltage of chip to be detected is converted into the output of actual absorption current value;
Each detecting unit is used in chip enable process to be detected, when the actual power magnitude of voltage of chip to be detected reaches default supply voltage value, determines that be a check point this moment; And detect chip to be detected actual absorption current value at this moment and whether be within the span of regulation, if be not in, this check point is defined as a check point that does not satisfy condition;
Described identifying unit when being used at least one does not satisfy condition when existence check point, judges that described chip to be detected is in malfunction;
Wherein, described each detecting unit comprises the first comparer, the second comparer, and the 3rd comparer, the first trigger, the second trigger and determination module:
The negative input of described the first comparer is used for being received in supply voltage value corresponding to check point place of determining, electrode input end is used for receiving the actual power magnitude of voltage of described chip to be detected, when output terminal is used for actual power magnitude of voltage at chip to be detected and reaches the supply voltage value corresponding at this check point place, the Q output terminal that triggers the first trigger is exported the first comparative result that the D input end of the first trigger receives, and the Q output terminal that triggers the second trigger is exported the second comparative result that the D input end of the second trigger receives;
The negative input of described the second comparer is used for receiving described electric current conversion unit actual absorption current value output, described chip to be detected, electrode input end is used for being received in the check point place that determines, stipulate the higher limit of the actual absorption current value of described chip to be detected, output terminal is used for the first comparative result is exported to the D input end of described the first trigger;
The negative input of described the 3rd comparer is used for being received in this check point place, stipulate the lower limit of the actual absorption current value of described chip to be detected, electrode input end is used for receiving described electric current conversion unit actual absorption current value output, described chip to be detected, and output terminal is used for the second comparative result is exported to the D input end of described the second trigger;
Determination module is used for being at 1 o'clock at described the first comparative result and the second comparative result, determines that chip to be detected actual absorption current value at this moment is within the span of regulation; In described the first comparative result and the second comparative result, at least one is not 1 o'clock, determines that chip to be detected actual absorption current value at this moment is not within the span of regulation.
4. pick-up unit as claimed in claim 3 is characterized in that,
Described detecting unit, the concrete span that is used for according to following formula regulation actual absorption current value:
I
Max=I* (1+r
1); I
Min=I* (1-r
2), wherein:
I is illustrated in the check point place that determines, described chip to be detected corresponding actual absorption current value when being in normal operating conditions;
R represents the first error rate that preset, the appearance of permission actual absorption current value, r
2Expression the second error rate default, that allow the actual absorption current value to occur;
I
MaxBe illustrated in the check point place that determines, stipulate the higher limit of the Absorption Current value of described chip to be detected;
I
MinBe illustrated in the check point place that determines, stipulate the lower limit of the Absorption Current value of described chip to be detected.
5. pick-up unit as claimed in claim 3 is characterized in that, described electric current conversion unit comprises that resistance is 1 ohm fixed resistance and subtracter, wherein:
Described fixed resistance is connected with described chip to be detected, and two input ends of described subtracter link to each other with described fixed resistance respectively.
6. pick-up unit as claimed in claim 3 is characterized in that, described electric current conversion unit is current sensor.
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| CN103809111B (en) * | 2014-03-05 | 2016-04-06 | 上海华虹宏力半导体制造有限公司 | The test circuit of chip and method of testing thereof |
| WO2018006309A1 (en) * | 2016-07-07 | 2018-01-11 | 张升泽 | Electrical current information sending method and system for electronic chip |
| CN106199135A (en) * | 2016-07-07 | 2016-12-07 | 张升泽 | The current information sending method of electronic chip and system |
| CN107817403A (en) * | 2017-10-31 | 2018-03-20 | 惠州鼎宝金属制品有限公司 | A kind of fault detection system for oven |
| CN109143113B (en) * | 2018-07-24 | 2021-11-09 | 郑州云海信息技术有限公司 | Method, device and system for monitoring power supply of PCIE external plug-in card |
| CN110441667B (en) * | 2019-07-08 | 2021-10-08 | 中国科学院微电子研究所 | Chip testing method and device and electronic equipment |
| CN110658440A (en) * | 2019-09-19 | 2020-01-07 | 芜湖德锐电子技术有限公司 | Chip detection circuit and detection method |
| CN112317558B (en) * | 2020-09-04 | 2023-01-17 | 中国第一汽车股份有限公司 | Rapid electrical detection system and method for sheet number of stamping automatic line |
| CN115128438A (en) * | 2022-09-02 | 2022-09-30 | 中诚华隆计算机技术有限公司 | Chip internal fault monitoring method and device |
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| JP2008286658A (en) * | 2007-05-18 | 2008-11-27 | Toshiba Microelectronics Corp | Semiconductor inspection device, and semiconductor inspection method using the same |
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Address after: 350002 19 Building, Citrus Industrial Park, 618 Jinshan Road, Cangshan District, Fuzhou, Fujian. Patentee after: RUIJIE NETWORKS Co.,Ltd. Address before: 350002 19 Building, Citrus Industrial Park, 618 Jinshan Road, Cangshan District, Fuzhou, Fujian. Patentee before: Fujian Star Network Ruijie Networks Co.,Ltd. |