CN102288298A - Detector simulator device - Google Patents
Detector simulator device Download PDFInfo
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- CN102288298A CN102288298A CN2011101088406A CN201110108840A CN102288298A CN 102288298 A CN102288298 A CN 102288298A CN 2011101088406 A CN2011101088406 A CN 2011101088406A CN 201110108840 A CN201110108840 A CN 201110108840A CN 102288298 A CN102288298 A CN 102288298A
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Abstract
The invention relates to a detector simulator device, which comprises a simulator host used for being in control connection with an upper computer, the simulator host comprises a switch and indication module and a main control circuit, the signal input end of the main control circuit is used for being in bidirectional connection with a detector interface circuit through an interface adapter, the control output end of the switch and indication module is in bidirectional connection with the control input end of the main control circuit, and the output end of the main control circuit is provided with a test interface used for connecting the input end of a simulator measurement interface. The detector simulator device adopts a main control circuit of an advanced RISC machine (ARM) and field-programmable gate array (FPGA) as a core and can replace an expensive infrared detector, the development cost of a processing circuit of the infrared detector is reduced, a development platform is provided for an infrared imaging circuit, the integration degree is high, the size is small, the power consumption is low, the use is convenient, and simultaneously, the detector simulator device also has good updating and expansion capability.
Description
Technical field
The invention belongs to the infrared eye analogue technique, relate in particular to a kind of detector simulation apparatus.
Background technology
The input-output characteristic of the true detector of the strict simulation of infrared eye simulator apparatus, the external interface of simulator is identical with true prober interface, can be directly connected on the detector input interface of signal acquisition circuit.The output of simulator is subjected to the integrated signal that signal acquisition circuit sends and the control of master clock signal, under the effect of integrated signal and master clock signal, according to the output characteristic of the true detector analog level by analog interface output.The groundwork process of infrared eye is: interface circuit provides simulating signals such as integrated signal, master clock signal and bias voltage to detector, detector output contains the simulating signal of Infrared Scene information, and the simulating signal output holding time of each pixel is identical with the cycle of master clock signal.
The Infrared Scene (as uncorrected infrared image, certain Infrared Scene (target) image of gathering in advance etc.) that the infrared eye simulator apparatus is can emulation different also can be exported dynamic video.Infrared Scene image and infrared dynamic video are pre-stored in by USB interface in the FLASH device of system, can select the output different images by menu.Simulator not only can obtain the data of host computer by USB interface, also can directly read the peripheral hardwares such as flash disk on the USB interface.
For true infrared eye, the output signal of each pixel all is certain waveform clocklike, so simulator will be exported the signal of each pixel according to the true waveform of gathering.For the real infrared signal of emulation true to nature, the output clock frequency must be higher than MC far away.Adopt PLL that MC is carried out frequency multiplication for this reason, obtain the high-frequency clock signal, grey scale signal and the waveform signal to each pixel merges then, and the waveform signal after will merging at last outputs to outside DAC chip.
Summary of the invention
The purpose of this invention is to provide a kind of detector simulation apparatus, substitute real infrared eye, can directly be connected, effectively the hyperchannel I/O of analog prober with the prober interface circuit, thereby reduce the R﹠D costs of infrared eye treatment circuit, improve efficiency of research and development.
For achieving the above object, the present invention adopts following technical scheme: a kind of detector simulation apparatus, comprise the simulator main frame that is used for the host computer control linkage, described simulator main frame comprises switch and indicating module and governor circuit, and the signal input part of described governor circuit is used for being connected with the prober interface circuit is two-way by interface adapter; The control output end of described switch and indicating module is connected with the control input end of governor circuit is two-way; The output terminal of governor circuit is provided with and is used for measuring the test interface that the input end of interface is connected with simulator; Governor circuit also is provided with and is used for the communication interface that is connected with host computer.
The output terminal of described governor circuit also is connected with the LCD display module.
Described governor circuit is made up of ARM main frame template and the waveform storage output template that communicates with connection, and described waveform is stored output template and realized by FPGA, and be connected with the prober interface circuit is two-way by interface adapter.
Described ARM main frame template realize the simulator main frame communicate to connect, control with host computer the LCD display module show, to switch and indicating module signal Processing with driving, be connected with simulator measurement interface, and be connected with interface signal that waveform is stored output template.
Described waveform storage output template comprises logical signal conversion module, waveform clock module, waveform storage output module, serial communication module.
Also be provided with the host computer that connects by communication interface on the described governor circuit.
The input end of described control circuit is connected with wave memorizer.
Described governor circuit also comprises power module.
It is core that detector simulation apparatus of the present invention adopts with the governor circuit, read the data in the memory device, and the control timing of sending here according to prober interface circuit output simulating signal and other level signals, video that simultaneously will be to be exported is exported with standard P AL standard form, for follow-up comparison, gauge tap is finished the selection to detector simulation device mode of operation; This device can substitute expensive infrared eye, reduces the R﹠D costs of infrared eye treatment circuit, for the infrared imaging circuit provides research/development platform; And integrated level height, volume are little, low in energy consumption, easy to use, also have good upgrading and extended capability simultaneously.
Description of drawings
Fig. 1 is a detector simulation apparatus composition frame chart of the present invention;
Fig. 2 is a detector simulation device governor circuit hardware block diagram of the present invention.
Embodiment
Below the present invention is described in further details.
Be illustrated in figure 1 as the composition frame chart of detector simulation apparatus of the present invention, comprise the simulator main frame that is used for the host computer control linkage, the simulator main frame comprises switch and indicating module and governor circuit, and the signal input part of governor circuit is used for being connected with the prober interface circuit is two-way by interface adapter; The control output end of switch and indicating module is connected with the control input end of governor circuit is two-way; The output terminal of governor circuit is provided with and is used for measuring the test interface that the input end of interface is connected with simulator; In addition, governor circuit also is provided with and is used for the communication interface that is connected with host computer; The output terminal of governor circuit also is connected with LCD display module (present embodiment employing LCD display), and switch and indicating module comprise switch, button and pilot lamp.
USB interface and LAN interface are used for communicating to connect of simulator main frame and host computer, and interface adapter is used for being connected of simulator main frame and prober interface circuit.The simulator main frame is a core with ARM and FPGA, functions such as the pattern of mainly finishing simulator is judged, communicated to connect, condition monitoring, data storage, waveform output, the control timing that the simulator main frame is sent here according to the prober interface circuit is exported corresponding analog waveform signal and other level signal, switch/button/the pilot lamp of simulator main frame is finished model selection, waveform sequential control and the state indication of simulator, and LCD display is mainly used in the duty and the monitoring parameter of display simulation device.Host computer links to each other with the simulator main frame by LAN or USB interface, carries out work such as the setting of simulator parameter, Wave data generation, data management, data download, simulator host computer control, simulator running state monitoring.
Be illustrated in figure 2 as detector simulation device governor circuit hardware block diagram, governor circuit is the core of simulator, mainly comprise power module, simulator ARM main frame template and waveform storage output template, ARM main frame template comprises the ARM module, be used for the interface that is connected with the LCD display module with switch/button/indicating lamp module, waveform storage output template comprises logical signal conversion module, waveform clock module, waveform storage output module, serial communication module, waveform data memory (not shown), mainly each functional module of governor circuit is described below.
ARM main frame template mainly realizes the connection and the management of peripheral components, the USB interface that mainly comprises ARM and host computer communicates to connect, to LCD display management, switch/button/pilot lamp signal Processing and driving, simulator test interface, and with the interface signal of waveform template.
Simulator logical signal conversion module is realized by FPGA.This module is mainly finished the level translation of logical signal between detector and the simulator main frame, make the simulator main frame can with the detector logical signal compatibility of 5V and 3.3V, for FPGA and ARM provide required logical signal.
The waveform clock module is realized by FPGA.This module generates the required waveform clock signal of waveform storage output module according to nuclear clock in the MC signal of detector and the FPGA, provides reference clock for simulator carries out Wave data output.
Waveform storage output template is realized that by FPGA this module is a benchmark with the waveform clock, finishes waveform storage and output timing control function.In order to guarantee ARM and DAC to the uniqueness of wave memorizer operation and the integrality of Wave data, satisfy waveform output rapidity requirement, when DAC carried out the waveform output function, ARM can not carry out read-write operation to wave memorizer; Have only the DAC of working as to finish a frame waveform output function, ARM could carry out read-write operation to wave memorizer.During ARM carried out read-write operation to wave memorizer, DAC output stopped output waveform, had finished operation to wave memorizer until ARM, and DAC begins output waveform again.The Wave data memory block is made up of the sram chip of 16 256K words, and the sram chip of these 16 256K words is corresponding with 16 16 DAC chips respectively, forms 16 road Wave data analog output channels.
The interconnection that the FPGA serial communication module is mainly finished simulator and detector serial communication interface signal SERCLK, SERDAT, SERCL with communicate by letter.FPGA receives from the serial data of detector and is temporarily stored in the ram buffer of FPGA, and serial data to be sent sends to detector according to the serial interface communication agreement in can the ram buffer with FPGA.
LCD interface display module is mainly realized the driving function of ARM to LCD, and required input/output signal logic and sequential are determined according to selected ARM and LCD, should be able to be satisfied ARM LCD display is carried out all operations.
The simulator governor circuit adopts interface adapter to link to each other with the prober interface circuit, adopt the general-purpose interface definition in simulator governor circuit one side, then define in detector one side according to the model and the interface circuit leg signal thereof of detector, in simulator work/test and debugging, need select different cables according to type photodetector of being simulated and interface circuit thereof.
Power module is a direct supply with the 220VAC power conversion, provide simulator ARM main frame template and waveform storage output template required direct current digital power and DC simulation power supply, and provide required datum for simulator DAC according to the requirement of waveform storage output template.
The detector simulation apparatus is two kinds of patterns according to the object different definition of simulation: linear array pattern and face battle array pattern.The interface adapter different according to different model selections.For compatible face battle array and two kinds of detectors of linear array, the part signal passage will be multiplexing.The major function of detector simulation apparatus is as follows:
(1) the hyperchannel I/O of falseface array detector and detector array comprises various detectors such as face battle array 320 * 256, face battle array 640 * 512, linear array 480 * 6, linear array 576 * 6;
(2) the work at present pattern of demonstration detector simulation device;
(3) detect the supply voltage that the prober interface circuit is sent here, if monitored supply voltage is lower than index request, then forbid output waveform signals, supply voltage is output waveform signals just normally;
(4) possess the power-on self-test brake is arranged, can show the self check state.
According to the description of above detector simulation device function, the groundwork flow process of detector simulation device is as follows:
1. whether simulator self check: carry out self check after the detector simulation device powers on, LCD display can show the process and the self-detection result of self check, working properly to judge the detector simulation device;
2. normally export simulating signal: the detector simulation device enters normal operating conditions after finishing self check, information such as the mode output signal of LCD display display simulation device and operational factor.
Claims (8)
1. detector simulation apparatus, it is characterized in that: comprise the simulator main frame that is used for the host computer control linkage, described simulator main frame comprises switch and indicating module and governor circuit, and the signal input part of described governor circuit is connected with the prober interface circuit is two-way by interface adapter; The control output end of described switch and indicating module is connected with the control input end of governor circuit is two-way; The output terminal of governor circuit is provided with and is used for measuring the test interface that the input end of interface is connected with simulator; Governor circuit also is provided with and is used for the communication interface that is connected with host computer.
2. detector simulation apparatus according to claim 1 is characterized in that: the output terminal of described governor circuit also is connected with the LCD display module.
3. detector simulation apparatus according to claim 1 and 2, it is characterized in that: described governor circuit is made up of ARM main frame template and the waveform storage output template that communicates with connection, described waveform storage output template realized by FPGA, and be connected with the prober interface circuit is two-way by interface adapter.
4. detector simulation apparatus according to claim 3, it is characterized in that: described ARM main frame template realize the simulator main frame communicate to connect, control with host computer the LCD display module show, to switch and indicating module signal Processing with driving, be connected with simulator measurement interface, and be connected with interface signal that waveform is stored output template.
5. detector simulation apparatus according to claim 3 is characterized in that: described waveform storage output template comprises logical signal conversion module, waveform clock module, waveform storage output module, serial communication module.
6. detector simulation apparatus according to claim 1 and 2 is characterized in that: also be provided with the host computer that connects by communication interface on the described governor circuit.
7. detector simulation apparatus according to claim 1 and 2 is characterized in that: the input end of described governor circuit also is connected with wave memorizer.
8. detector simulation apparatus according to claim 7 is characterized in that: described governor circuit also comprises power module.
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| Application Number | Priority Date | Filing Date | Title |
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| CN 201110108840 CN102288298B (en) | 2011-04-28 | 2011-04-28 | Detector simulator device |
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| CN 201110108840 CN102288298B (en) | 2011-04-28 | 2011-04-28 | Detector simulator device |
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| CN102288298A true CN102288298A (en) | 2011-12-21 |
| CN102288298B CN102288298B (en) | 2013-05-08 |
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| CN 201110108840 Expired - Fee Related CN102288298B (en) | 2011-04-28 | 2011-04-28 | Detector simulator device |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102538972A (en) * | 2011-12-31 | 2012-07-04 | 中国电子科技集团公司第四十一研究所 | Infrared focal plane array signal simulator |
| CN104036080A (en) * | 2014-06-09 | 2014-09-10 | 西安电子科技大学 | Multi-spectral infrared detection simulator |
| CN105930292A (en) * | 2016-04-28 | 2016-09-07 | 上海机电工程研究所 | Method and system for realizing high speed real time injection of infrared scene |
| CN106468668A (en) * | 2016-09-28 | 2017-03-01 | 北京凯视佳光电设备有限公司 | Industrial camera cylinder detection method |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US5802347A (en) * | 1994-09-12 | 1998-09-01 | Nec Corporation | Emulator with function for detecting illegal access to special function register |
| CN101425098A (en) * | 2007-10-31 | 2009-05-06 | 中国科学院沈阳自动化研究所 | Analogue method and apparatus outputted by infrared detector |
| CN102004219A (en) * | 2010-09-17 | 2011-04-06 | 南京理工大学 | Infrared focal plane array detector simulation device and method |
-
2011
- 2011-04-28 CN CN 201110108840 patent/CN102288298B/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5802347A (en) * | 1994-09-12 | 1998-09-01 | Nec Corporation | Emulator with function for detecting illegal access to special function register |
| CN101425098A (en) * | 2007-10-31 | 2009-05-06 | 中国科学院沈阳自动化研究所 | Analogue method and apparatus outputted by infrared detector |
| CN102004219A (en) * | 2010-09-17 | 2011-04-06 | 南京理工大学 | Infrared focal plane array detector simulation device and method |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102538972A (en) * | 2011-12-31 | 2012-07-04 | 中国电子科技集团公司第四十一研究所 | Infrared focal plane array signal simulator |
| CN102538972B (en) * | 2011-12-31 | 2014-04-09 | 中国电子科技集团公司第四十一研究所 | Infrared focal plane array signal simulator |
| CN104036080A (en) * | 2014-06-09 | 2014-09-10 | 西安电子科技大学 | Multi-spectral infrared detection simulator |
| CN105930292A (en) * | 2016-04-28 | 2016-09-07 | 上海机电工程研究所 | Method and system for realizing high speed real time injection of infrared scene |
| CN105930292B (en) * | 2016-04-28 | 2018-12-18 | 上海机电工程研究所 | A kind of method and its system realizing IR Scene high speed and injecting in real time |
| CN106468668A (en) * | 2016-09-28 | 2017-03-01 | 北京凯视佳光电设备有限公司 | Industrial camera cylinder detection method |
| CN106468668B (en) * | 2016-09-28 | 2019-03-12 | 北京凯视佳光电设备有限公司 | Industrial camera cylinder detection method |
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| CN102288298B (en) | 2013-05-08 |
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