CN102253848B - Method for automatically generating fiber optic gyros with field programmable gate array (FPGA) logic in batches - Google Patents

Method for automatically generating fiber optic gyros with field programmable gate array (FPGA) logic in batches Download PDF

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CN102253848B
CN102253848B CN 201110143857 CN201110143857A CN102253848B CN 102253848 B CN102253848 B CN 102253848B CN 201110143857 CN201110143857 CN 201110143857 CN 201110143857 A CN201110143857 A CN 201110143857A CN 102253848 B CN102253848 B CN 102253848B
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frequency
logic
fpga
frequency division
parameter
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CN102253848A (en
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黎秋甫
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Hubei Sanjiang Aerospace Hongfeng Control Co Ltd
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Hubei Sanjiang Aerospace Hongfeng Control Co Ltd
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Abstract

The invention relates to a method for automatically generating fiber optic gyros with field programmable gate array (FPGA) logic in batches, which is suitable for the field of inertia device fiber optic gyros and is used for FPGA logic implementation, engineering management and quality control in the large batch production process of the fiber optic gyros. By the method, a series of work such as gyro frequency calculation, two-stage digital clock manager (DCM) frequency division parameter calculation and matching, FPGA logic modification, logic synthesis, logic implementation, downloaded filegeneration and the like can be automatically finished, work efficiency is greatly improved, and product quality and reliability are ensured.

Description

The automatic batch generation method of optical fibre gyro fpga logic
Technical field
This method is suitable for inertia device optical fibre gyro field, is used for the realization of optical fibre gyro high volume production process fpga logic, through engineering approaches management and quality control.
Background technology
Optical fibre gyro is to utilize the Sagnac effect to carry out the inertia device that angular speed detects.It adopts on-site programmable gate array FPGA as master controller, and the optical fibre gyro of using FPGA clock internal administrative unit DCM to realize frequency division, and the DCM frequency division parameter need calculate selection respectively according to the characteristic frequency of gyro.To each gyro, all need to finish according to its characteristic frequency respectively a series of activities such as calculating coupling, fpga logic modification, logic synthesis, logic realization and the generation of download file of frequency computation part, two-stage DCM frequency division parameter.In the gyro high volume production process, finish this work by hand if make, for each transit time, this will be very loaded down with trivial details, uninteresting, as to waste time and energy and make mistakes an easily job.
Summary of the invention
Technical matters to be solved by this invention provides a kind of method that can automatic batch generates the optical fibre gyro fpga logic, increasing work efficiency, and guarantees product quality and reliability.
For solving the problems of the technologies described above, the automatic batch that the present invention proposes generates the method for optical fibre gyro fpga logic, comprises the steps:
Step 1, the initial frequency of obtaining optical fibre gyro, termination frequency, crystal oscillator frequency, fpga chip type, sampled point parameter;
Step 2, with described initial frequency as current characteristic frequency;
Step 3, described crystal oscillator frequency is carried out two-stage DCM frequency division, obtain a set of division parameter, that frequency division parameter of selecting to mate most with described current characteristic frequency from described frequency division parameter is as actual frequency division parameter;
Step 4, search for and locate the expression unit of frequency division parameter in the fpga logic of current optical fibre gyro, the described actual frequency division parameter that obtains with step 3 is made amendment and is preserved the expression unit of frequency division parameter in the described fpga logic;
Step 5, fpga logic that step 4 is obtained be as input, calls programmable logic device (PLD) PLD design tool and the FPGA of current optical fibre gyro is carried out the comprehensive of FPGA (Field Programmable Gate Array) and realize;
Step 6, call programmable logic device (PLD) PLD design tool, the fpga logic that step 5 is obtained carries out the file layout conversion, generates and downloads file;
Step 7, described current characteristic frequency is increased a separation values, judge that the current characteristic frequency that increases after the separation values whether greater than stopping frequency, if not, then returns step 3; Be, then
Step 8, processing finish.
The present invention has following beneficial effect: calculate each transit time characteristic of correspondence frequency automatically, mate fpga chip two-stage DCM frequency division parameter automatically; Automatically finishing fpga logic revises; Logic synthesis; Logic realization, automatic formation logic are downloaded file.Realize the different transit time of mass, different crystal oscillator frequency, generated without the automatic batch of the optical fibre gyro logical file of FPGA configuring chip model, improved the production efficiency of optical fibre gyro greatly, effectively guaranteed the q﹠r of product.
Description of drawings
Fig. 1 is process flow diagram of the present invention.
Embodiment
The present invention is described in further detail below in conjunction with accompanying drawing.As shown in Figure 1, may further comprise the steps:
1, obtains initial frequency, termination frequency, crystal oscillator frequency, configuring chip type, sampled point parameter.
2, get initial frequency as current characteristic frequency.
3, to current frequency computation part, coupling two-stage DCM frequency division parameter.Comprise: with the crystal oscillator frequency of optical fibre gyro, totally four parameters of use DCM two-stage is carried out frequency division.Concrete grammar is that all combinations of four parameters are all listed, and uses each group parameter that crystal oscillator frequency is carried out frequency division then, obtains a class frequency.With the characteristic frequency value of this class frequency value of obtaining and gyro relatively, choose that frequency of absolute difference minimum and frequency division parameter as actual frequency division parameter.
4, fpga logic is revised automatically.Comprise: adopt automatic search method, from fpga logic, find the frequency division parameter part automatically, and parameter in the logic made amendment according to previous step result of calculation and preserve.
5, automatic logic synthesis (XST) and realization.Use the ISE command line mode of Xilinx company to call XST instrument completion logic integrated logic automatic Synthesis, use the ISE command line mode to call Translate, Map, the realization of Place and Route completion logic, generate the bit formatted file;
6, downloading file generates automatically.Use ISE command line mode mode to call the IMPACT instrument and generate mcs form download file automatically.
7, gyro frequency increases a frequency interval, and with finish frequency ratio, if smaller or equal to finishing frequency, then return step 3; If greater than finishing frequency, then end process.
It should be noted last that, above embodiment is only unrestricted in order to technical scheme of the present invention to be described, although with reference to preferred embodiment the present invention is had been described in detail, those of ordinary skill in the art is to be understood that, can make amendment or be equal to replacement technical scheme of the present invention, and not breaking away from the spirit and scope of technical solution of the present invention, it all should be encompassed in the middle of the claim scope of the present invention.

Claims (1)

1. the method for an automatic batch generation optical fibre gyro fpga logic is characterized in that, comprises the steps:
Step 1, the initial frequency of obtaining optical fibre gyro, termination frequency, crystal oscillator frequency, fpga chip type, sampled point parameter;
Step 2, with described initial frequency as current characteristic frequency;
Step 3, described crystal oscillator frequency is carried out two-stage DCM frequency division, comprise: with the crystal oscillator frequency of optical fibre gyro, totally four parameters of use DCM two-stage is carried out frequency division, all combinations of four parameters are all listed, use each group parameter that crystal oscillator frequency is carried out frequency division then, obtain a set of division parameter, that frequency division parameter of selecting to mate most with described current characteristic frequency from described frequency division parameter is as actual frequency division parameter;
Step 4, adopt automatic search method, search for and locate the expression unit of frequency division parameter in the fpga logic of current optical fibre gyro, the described actual frequency division parameter that obtains with step 3 is made amendment and is preserved the expression unit of frequency division parameter in the described fpga logic;
Step 5, fpga logic that step 4 is obtained are as input, call programmable logic device (PLD) PLD design tool and the FPGA of current optical fibre gyro is carried out the comprehensive and realization of FPGA (Field Programmable Gate Array), use the ISE command line mode of Xilinx company to call XST instrument completion logic integrated logic automatic Synthesis, use the ISE command line mode to call Translate, Map, the realization of Place and Route completion logic, generate the bit formatted file;
Step 6, call programmable logic device (PLD) PLD design tool, the fpga logic that step 5 is obtained carries out the file layout conversion, generates and downloads file; Wherein, described generation download file is drawn together: use the ISE command line mode to call the IMPACT instrument and generate mcs form download file automatically;
Step 7, described current characteristic frequency is increased a separation values, judge that the current characteristic frequency that increases after the separation values whether greater than stopping frequency, if not, then returns step 3; Be, then
Step 8, processing finish.
CN 201110143857 2011-05-31 2011-05-31 Method for automatically generating fiber optic gyros with field programmable gate array (FPGA) logic in batches Active CN102253848B (en)

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Publication number Priority date Publication date Assignee Title
CN105136167B (en) * 2015-08-20 2018-01-05 湖北三江航天红峰控制有限公司 A kind of optical fibre gyro dynamic dividing method
CN106338293B (en) * 2016-08-23 2019-03-05 湖北三江航天红峰控制有限公司 A kind of automatic adjustment method of optical fibre gyro
CN107316655B (en) * 2017-07-19 2019-08-09 上海航天测控通信研究所 A method of it is stored for space flight initialization data
CN109308031B (en) * 2017-07-28 2021-07-23 湖南航天机电设备与特种材料研究所 Parameter configuration method, configuration device and storage space based on FPGA circuit
CN110849344B (en) * 2019-11-21 2022-10-28 中国船舶重工集团公司第七0七研究所 Precise frequency division method for triaxial fiber-optic gyroscope

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5305086A (en) * 1991-02-27 1994-04-19 Japan Aviation Electronics Industry Limited Two step demodulation synchronous detector
CN1932442A (en) * 2006-10-10 2007-03-21 北京航空航天大学 Frequency divider adapted to optical fiber top
CN201803730U (en) * 2010-07-29 2011-04-20 国营红峰机械厂 Optical fiber gyro signal debugging closed loop system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5305086A (en) * 1991-02-27 1994-04-19 Japan Aviation Electronics Industry Limited Two step demodulation synchronous detector
CN1932442A (en) * 2006-10-10 2007-03-21 北京航空航天大学 Frequency divider adapted to optical fiber top
CN201803730U (en) * 2010-07-29 2011-04-20 国营红峰机械厂 Optical fiber gyro signal debugging closed loop system

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