CN102237306A - Liquid crystal display substrate and manufacturing method thereof, and liquid crystal display - Google Patents

Liquid crystal display substrate and manufacturing method thereof, and liquid crystal display Download PDF

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Publication number
CN102237306A
CN102237306A CN201010168708XA CN201010168708A CN102237306A CN 102237306 A CN102237306 A CN 102237306A CN 201010168708X A CN201010168708X A CN 201010168708XA CN 201010168708 A CN201010168708 A CN 201010168708A CN 102237306 A CN102237306 A CN 102237306A
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via hole
resin material
layer
material layer
liquid crystal
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CN102237306B (en
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谢振宇
周伟峰
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BOE Technology Group Co Ltd
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Beijing BOE Optoelectronics Technology Co Ltd
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Abstract

The invention discloses a liquid crystal display substrate and a manufacturing method thereof, and a liquid crystal display. The method at least comprises the following steps of: forming a resin material layer on a thin film to be etched; forming first via holes and second via holes in the resin material layer, wherein the shortest distance among the edges of the second via holes is greater than the shortest distance among the edges of the first via holes; heating to make the resin material layer collapsed, so that the edges of the bottom surfaces of the first via holes extend inward and are connected with one another to cover the bottom surfaces of the first via holes and the edges of the bottom surfaces of the second via holes extend inward and are spaced from one another; and etching materials exposed out of the second via holes. By using the characteristic that a resin material is collapsed and deformed at high temperature, the smaller via holes are plugged during collapsed deformation and the larger via holes retain a certain aperture; and when the materials are etched in the larger via holes, the smaller via holes are plugged to protect the materials thereunder against excessive etching.

Description

Liquid crystal display substrate and manufacture method thereof and LCD
Technical field
The present invention relates to lcd technology, relate in particular to a kind of liquid crystal display substrate and manufacture method thereof and LCD.
Background technology
Thin Film Transistor-LCD (Thin Film Transistor-Liquid CrystalDisplay, be called for short TFT-LCD) be present common flat-panel monitor, the critical piece of TFT-LCD is a liquid crystal panel, liquid crystal panel is formed box by two liquid crystal display substrates, promptly common alleged color membrane substrates and array base palte.
Be formed with the circuit pattern that matrix form is arranged on the array base palte of TFT-LCD, array base-plate structure generally includes interface (PAD) zone outside pixel region and the pixel region.Pixel region is grid line and the data wire that forms horizontal vertical intersection on underlay substrate, encloses the pixel cell that forms matrix form, is provided with TFT switch and pixel electrode in each pixel cell.The source electrode of TFT switch connects data wire, and drain electrode connects pixel electrode, and gate electrode connects grid line, between source electrode and drain electrode and gate electrode active layer is set.Be that grid line and data wire prolongation are drawn in the interface area, so that be connected with driver circuit.
Keep insulation to isolate with insulating barrier between the conductive pattern in above-mentioned pixel region and the interface area, for realizing generally in insulating barrier, forming via hole with the electrical connection of insulating barrier conductive pattern at interval.Typical a kind of array base-plate structure is: be coated with gate insulation layer on the grid line; Active layer, data wire, source electrode and drain electrode are formed on the gate insulation layer, and cover under the passivation layer; Form the drain electrode via hole in the passivation layer of drain electrode top, so that pixel electrode is electrically connected with drain electrode by the drain electrode via hole; Form grid interface via hole and data-interface via hole above grid line in interface area and the data wire respectively, be connected driver circuit so that grid line and data wire exposed.
In carrying out research process of the present invention, the inventor finds that there is following defective in said structure: when adopting mask lithography technology to come each via hole of etching, drain electrode via hole and data-interface via hole are etching passivation layers and forming, grid interface via hole is etching passivation layer and gate insulation layer and form, therefore, after etching is finished each via hole in the passivation layer, also need separately the via hole in the gate insulation layer to be carried out etching.But during via hole, drain electrode via hole and data-interface via hole in fact etching are finished and are exposed data wire and drain electrode in the etching gate insulation layer, can take place when carrying out the gate insulation layer etching data wire and drain electrode crossed the phenomenon at quarter.It is bigger to be that data-interface via hole and drain electrode via etch are crossed the quarter ratio, and data wire and drain electrode can etch away 30%~50% of original thickness, influences line resistance or produces badly, reduces the quality of LCD.
Summary of the invention
The invention provides a kind of liquid crystal display substrate and manufacture method thereof and LCD, what take place when avoiding under liquid crystal display substrate etching via hole material crosses the phenomenon at quarter, improves the quality of LCD.
The embodiment of the invention provides a kind of manufacture method of liquid crystal display substrate, be included in the flow process that forms conductive pattern and insulating barrier on the underlay substrate, wherein, on underlay substrate, form to treat in conductive pattern and the insulating barrier flow process in the step that etched film carries out via etch and comprise at least:
On described film to be etched, form resin material layer;
Form first via hole and second via hole in described resin material layer, the beeline between described second via edges is greater than the beeline between described first via edges;
Carry out heat treated so that described resin material layer subsides, thereby the bottom edge of described first via hole is extended internally link to each other the back to hide the bottom surface of described first via hole, and the bottom edge of described second via hole is extended internally and keep spacing;
The material that exposes through described second via hole is carried out etching.
The embodiment of the invention also provides a kind of liquid crystal display substrate, comprises underlay substrate, is formed with conductive pattern and insulating barrier on the described underlay substrate, wherein, also comprises:
First via hole and second via hole are formed in the resin material layer, and the beeline between described second via edges is greater than the beeline between described first via edges, and the bottom edge of described second via hole extends internally and keeps spacing.
The embodiment of the invention also provides a kind of LCD, comprising liquid crystal display substrate provided by the present invention.
Liquid crystal display substrate provided by the invention and manufacture method thereof and LCD; utilized the characteristic of resin material high temperature collapse-deformation; less via hole is stopped up when collapse-deformation; and big via hole keeps certain aperture; when material is etched under big via hole; can not take place quarter owing to the material that stops up below protecting than small vias, thereby can avoid carving the appearance that damages, improve the quality of LCD.
Description of drawings
The local flow chart of the manufacture method of the liquid crystal display substrate that Fig. 1 provides for the embodiment of the invention one;
Fig. 2 A is the structural representation of the preceding resin bed shape of heating;
Fig. 2 B is the structural representation of heating back resin bed shape;
Fig. 3 A is the shape schematic diagram of resin bed before heating that is formed with via hole;
Fig. 3 B is the shape schematic diagram of resin bed after heating that is formed with via hole;
The manufacture method flow chart of the liquid crystal display substrate that Fig. 4 provides for the embodiment of the invention two;
Fig. 5 A is the fragmentary top TV structure schematic diagram one of the embodiment of the invention two prepared array base paltes;
Fig. 5 B is that A-A among Fig. 5 A is to the sectional structure schematic diagram;
Fig. 6 A is the fragmentary top TV structure schematic diagram two of the embodiment of the invention two prepared array base paltes;
Fig. 6 B is that A-A among Fig. 6 A is to the sectional structure schematic diagram;
Fig. 7 A is the fragmentary top TV structure schematic diagram three of the embodiment of the invention two prepared array base paltes;
Fig. 7 B is that A-A among Fig. 7 A is to the sectional structure schematic diagram;
Fig. 8 A is the structure for amplifying schematic diagram at the first via hole place in the embodiment of the invention two prepared array base paltes;
Fig. 8 B is the structure for amplifying schematic diagram at the second via hole place in the embodiment of the invention two prepared array base paltes;
Fig. 9 is the partial side TV structure schematic diagram four of the embodiment of the invention two prepared array base paltes;
Figure 10 A is the fragmentary top TV structure schematic diagram five of the embodiment of the invention two prepared array base paltes;
Figure 10 B is that A-A among Figure 10 A is to the sectional structure schematic diagram;
The manufacture method flow chart of the liquid crystal display substrate that Figure 11 provides for the embodiment of the invention three;
Figure 12 A~12D is respectively the sectional structure schematic diagram of the embodiment of the invention three prepared liquid crystal display substrates;
The manufacture method flow chart of the liquid crystal display substrate that Figure 13 provides for the embodiment of the invention four;
Figure 14 A~14C is respectively the sectional structure schematic diagram of the embodiment of the invention four prepared liquid crystal display substrates.
Reference numeral:
The 1-underlay substrate; The 2-grid line; The 3-gate electrode;
The 4-gate insulation layer; The 5-data wire; The 61-semiconductor layer;
The 62-doping semiconductor layer; 7-source electrode; The 8-drain electrode;
The 9-passivation layer; 10-first via hole; 11-second via hole;
12-the 3rd via hole; The 13-pixel electrode; The 30-pixel region;
The 40-interface area; The 50-photoresist layer.
Embodiment
For the purpose, technical scheme and the advantage that make the embodiment of the invention clearer, below in conjunction with the accompanying drawing in the embodiment of the invention, technical scheme in the embodiment of the invention is clearly and completely described, obviously, described embodiment is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making the every other embodiment that is obtained under the creative work prerequisite.
The embodiment of the invention provides a kind of manufacture method of liquid crystal display substrate, be included in the flow process that forms conductive pattern and insulating barrier on the underlay substrate, wherein, on underlay substrate, form to treat in conductive pattern and the insulating barrier flow process in the step that etched film carries out via etch and comprise at least:
On film to be etched, form resin material layer;
Form first via hole and second via hole in resin material layer, the beeline between second via edges is greater than the beeline between first via edges;
Carry out heat treated so that resin material layer subsides, thereby the bottom edge of first via hole is extended internally link to each other the back to hide the bottom surface of first via hole, and the bottom edge of second via hole is extended internally and keep spacing;
The material that exposes through second via hole is carried out etching.
The technical scheme that the embodiment of the invention provided has been utilized the characteristics that resin material at high temperature can collapse-deformation.After forming two different class via holes of aperture, utilize the distortion of resin material to come the less class via hole in temporary transient shutoff aperture, thereby realized the difference etching of material under the two class via holes, avoided crossing of material under the temporary transient shutoff via hole carved.
Resin material layer can be the existing insulating barrier on the liquid crystal display substrate, finally is retained on the substrate, perhaps also can adopt in etching process, and for example photoresist layer finally needs this resin material layer is removed temporarily.Describe respectively below by embodiment.
Embodiment one
The local flow chart of the manufacture method of the liquid crystal display substrate that Fig. 1 provides for the embodiment of the invention one, this manufacture method are included in the flow process that forms conductive pattern and insulating barrier on the underlay substrate, and wherein, the flow process that forms insulating barrier comprises the steps: at least
Step 110, form first via hole and second via hole in resin material layer, the beeline between second via edges is greater than the beeline between first via edges;
Step 120, carry out heat treated, thereby the bottom edge of first via hole is extended internally link to each other the back to hide the bottom surface of first via hole, and the bottom edge of second via hole is extended internally and keep spacing so that resin material layer subsides;
Step 130, carry out etching to seeing through the material that second via hole exposes;
Step 140, resin material layer is carried out etching, run through first via hole with the bottom surface that etches away first via hole.
The technical scheme of present embodiment has adopted resin material as insulating barrier, and the characteristic of having utilized resin material high temperature to subside.Resin material has a lot of advantages as a kind of material of desirable alternative inorganic thin film, and for example low-k, high permeability, uniformity height and technology are simple etc.Resin material can be divided into photosensitive resin material and non-photosensitivity resin material.When selecting photosensitive resin material for use, can be by directly in photosensitive resin material, forming via hole after gluing, exposure, development and the curing, when selecting the non-photosensitivity resin material for use, can be by in the non-photosensitivity resin material, forming via hole after gluing, exposure, development, etching and the curing.
Resin material is exactly the phenomenon that collapse-deformation at high temperature can take place as a characteristic of organic material, is depicted as the shape that heats preceding resin bed as Fig. 2 A, and Fig. 2 B is depicted as the shape of the resin bed after the heating, and the back resin bed that subsides can broaden slightly.The degree of subsiding of resin bed can be controlled by the temperature height and the time length in when heating.Fig. 3 A and Fig. 3 B are the shape schematic diagram of resin bed before and after heating that is formed with via hole, after resin material subsides, the bottom edge of resin bed via hole can extend internally, and by the control temperature and time bottom edge is extended to and connect fully to cover the bottom surface of via hole.Present embodiment has promptly utilized this characteristic of resin material.
When certain insulating barrier need form two class via holes, the further etching of material require under the second class via hole wherein, and the material under the first kind via hole has just produced the demand that prevents that it's quarter is past material under the first kind via hole when not needing to be etched this moment.The technical scheme of present embodiment is filled with the edge that the collapse characteristics of resin material is extended the bottom surface of first via hole, then can protect the material of first via hole below not take place quarter.Second via hole since its edge between beeline greater than the beeline between first via edges, so when the bottom edge of first via hole links to each other because of the extension of subsiding, also do not link to each other though the bottom edge of second via hole is extended but, can see through the material of its below of second via etch.So, when adopting the technical scheme of present embodiment effectively to solve to exist under the two class via holes different etching demand, avoid taking place to carve the problem of phenomenon.Both guaranteed that forming two class via holes by same step etching simplified technology, and can avoid carving the quality that guarantees LCD again.
Liquid crystal display substrate of the present invention can be array base palte or color membrane substrates, just can adopt the scheme of the foregoing description to avoid quarter when having the etching demand of above-mentioned inhomogeneity via hole.According to different design needs, conductive pattern on the liquid crystal display substrate and insulating barrier can have multiple design form, specify the technical scheme of the embodiment of the invention below with a kind of typical array base-plate structure.
Embodiment two
The manufacture method flow chart of the liquid crystal display substrate that Fig. 4 provides for the embodiment of the invention two specifically is the process of manufacturing array substrate in the present embodiment, comprises the steps:
Step 410, form the grid line 2 and the gate electrode 3 of pixel region 30 and interface area 40 on underlay substrate 1, underlay substrate 1 be a transparency carrier, can adopt glass substrate usually, and grid line 2 and the non-printing opacity electric conducting material of gate electrode 3 employings are made, for example metal material.Fig. 5 A is the fragmentary top TV structure schematic diagram one of prepared array base palte, and Fig. 5 B is that A-A among Fig. 5 A is to the sectional structure schematic diagram;
Step 420, forming covering gate insulating barrier 4 on the underlay substrate 1 of above-mentioned pattern;
Step 430, on gate insulation layer 4, form the data wire 5 of pixel region 30 and interface area 40, and the active layer, source electrode 7 and the drain electrode 8 that form pixel region 30, wherein active layer comprises semiconductor layer 61 and doping semiconductor layer 62, doping semiconductor layer 62 between source electrode 7 and the drain electrode 8 is etched away to form the TFT raceway groove, Fig. 6 A is the fragmentary top TV structure schematic diagram two (overlooking not shown insulating barrier) of prepared array base palte, and Fig. 6 B is that the A-A of Fig. 6 A is to the sectional structure schematic diagram;
Can be in step 420 and the step 430 by plasma activated chemical vapour deposition (PlasmaEnhanced Chemical Vapor Deposition, be called for short PECVD) etc. method successive sedimentation gate insulation layer 4, semiconductive thin film and N type semiconductor film, and can adopt the metal level of magnetron sputtering deposition source electrode 7 and drain electrode 8.Form the pattern of data wire 5, active layer, source electrode 7 and drain electrode 8 by duotone mask plate etching.
Step 440, cover passivation layer 9 on the underlay substrate 1 of above-mentioned pattern forming, this passivation layer 9 is a resin material layer, can smear the layer of even resin material by applying (coating) technology, material layers such as the gate insulation layer 4 under the passivation layer 9, data wire 5 are film to be etched;
Step 450, in passivation layer 9, form first via hole 10 and second via hole 11, shown in Fig. 7 A and 7B, in the present embodiment, first via hole 10 and second via hole 11 are circle, the diameter of second via hole 11 is greater than the diameter of first via hole 10, and the beeline between satisfied second via hole, 11 edges is greater than the requirement of the beeline between first via hole, 10 edges;
Resin material can adopt non-photosensitivity resin material or photosensitive resin material.The step that then forms first via hole and second via hole in resin material layer can have two kinds of operation formats:
A kind of form is: apply photoresist on resin material layer, photoresist carried out exposure imaging operation forms the complete reserve area of photoresist and photoresist is removed the zone fully, carry out etching operation and remove the corresponding resin material insulating barrier in zone fully, form first via hole and second via hole to etch away photoresist;
Another kind of form is: carry out the exposure imaging material on resin material layer, form the pattern of first via hole and second via hole, wherein, adopt photosensitive resin material as resin material, promptly the material that directly adopts similar photoresist has saved the step of an etching as insulating barrier.
The passivation layer 9 preferred photosensitive resin materials that adopt are made, then can directly form first via hole 10 and second via hole 11 of setting size and position by exposure imaging technology, the diameter of first via hole 10 is preferably 2 to 5 microns or 2 to 4 microns, and the diameter of second via hole 11 preferably is about 10 microns.In concrete the application, be not limited to passivation layer 9 and adopt the material of similar photoresist to make, other insulating barriers that need form two via holes also can adopt the photosensitive resin material preparation of similar photoresist.
Step 460, the heat treated of carrying out are preferably toasted passivation layer 9 and are heated under 200 to 300 ℃ temperature;
Heating steps can utilize original passivation layer 9 to solidify heating steps but improve original curing temperature.Subside through heating post passivation layer 9, the bottom edge of first via hole 10 is extended internally link to each other the back to hide the bottom surface of first via hole 10, and the bottom edge that makes second via hole 11 extends internally and keeps spacing, be respectively the structure for amplifying schematic diagram at first via hole 10 and second via hole, 11 places as Fig. 8 A and 8B, though the bottom surface of first via hole 10 is covered by resin, the resin material layer thickness in first via hole 10 is much smaller than the thickness of passivation layer 9.
Step 470, carry out etching to seeing through the gate insulation layer 4 that second via hole 11 exposes, to form the 3rd via hole 12;
In this step, gate insulation layer 4 general inorganic insulating material or the resin materials of adopting are made, and can do quarter, adopt sulphur hexafluoride (SF 6), chlorine (Cl 2) and oxygen (O 2) wait the gate insulation layer 4 of gas elder generation etching interface area 40, generally need carry out about 30% cross to carve and guarantee that the gate insulation layer 4 of interface area 40 the 3rd via hole 12 is etched away fully, comes out grid line 2.
Step 480, passivation layer 9 is carried out etching, run through first via hole 10 with the bottom surface that etches away first via hole 10, as shown in Figure 9;
The part that first via hole, 10 bottom surfaces are capped etches away after etching is finished gate insulation layer 4 again.Owing to will be about the hundreds of Ethylmercurichlorendimide to several thousand Ethylmercurichlorendimides much smaller than original thickness of resin material passivation layer 9 by the bottom thickness that covered of distortion, thus can etch away within a short period of time, though passivation layer 9 integral body attenuate to some extent influences very little.In addition, the etching of resin material can adopt gases such as oxygen and SF6, therefore can etching data wire 5 and the metal material of drain electrode 8, and the formation internal diameter is about 5 microns first via hole 10 etching is finished after.
Step 490, form pixel electrode 13 on the underlay substrate 1 of above-mentioned pattern forming, pixel electrode 13 passes first via hole 10 and is electrically connected with drain electrode 8, shown in Figure 10 A and 10B.
In the present embodiment, first via hole 10 on the drain electrode 8 of pixel region 30 and interface area 40 data wires 5 only needs to etch away passivation layer 9 materials, second via hole 11 on interface area 40 grid lines 2 need etch away the material of passivation layer 9 and gate insulation layer 4, therefore belongs to two class via holes.For second via hole 11, also be present in the demand that 11 times etching gate insulation layers of second via hole 4 form the 3rd via hole 12, need prevent that data wire 5 and the drain electrode 8 under first via hole 10 from taking place to carve and damage at this moment.Based on the demand, present embodiment adopts resin material to prepare passivation layer 9, and the diameter of second via hole 11 of preparation circle is greater than the diameter of first via hole 10.When passivation layer 9 high temperature cave in distortion; passivation layer 9 thickness attenuation; the aperture of first via hole 10 can be blocked; make data wire 5 and drain electrode 8 by temporary protection; though the aperture of second via hole 11 also can be owing to distortion is dwindled; but can be not blocked, still can expose the gate insulation layer 4 of below.Can avoid drain electrode 8 and data wire 5 to cross and carve this moment earlier by the grid line 2 of second via hole, 11 etching interface area 40.
The technical scheme of present embodiment, still can in same step, finish the etching of first via hole and second via hole, and the etching of the first via hole bottom surface, so because the thin etch period that increases of block part is few, so technical scheme integral body does not too much increase time cost.
Embodiment three
The flow chart of the manufacture method of the liquid crystal display substrate that Figure 11 provides for the embodiment of the invention three, present embodiment adopts this photosensitive resin material of photoresist as resin material layer, forms to treat in conductive pattern and the insulating barrier flow process in the step that etched film carries out via etch on underlay substrate to comprise at least:
Step 111, on film to be etched, form resin material layer, promptly form photoresist layer 50, film to be etched can be for needing the film of etching via hole arbitrarily, and present embodiment is an example with the exemplary array board structure shown in the embodiment two, and film to be etched herein is a passivation layer 9;
Step 112, in photoresist layer 50, form first via hole 10 and second via hole 11, shown in Figure 12 A, beeline between second via hole, 11 edges is greater than the beeline between first via hole, 10 edges, situation shown in the embodiment two as described above, first via hole 10 is formed on the position of the corresponding passivation layer via hole of pixel region, and second via hole 11 is formed on the position of the corresponding grid line 2 of interface area; The technology that forms via hole in photoresist layer 50 can be utilized existing exposure mask etching technics.
Step 113, heat treated so that photoresist layer 50 subside, thereby the bottom edge of first via hole 10 is extended internally link to each other the back to hide the bottom surface of first via hole 10, and the bottom edge of second via hole 11 extended internally and keep spacing;
Step 114, carry out etching to seeing through the material that second via hole 11 exposes, the material that exposes from second via hole 11 this moment is the passivation layer 9 the interface area, shown in Figure 12 B;
Step 115, photoresist layer 50 carried out remove technologies, run through first via hole 10 with the bottom surface of getting rid of first via hole 10; Removal technology to photoresist layer 50 can adopt etching technics, and the thickness of also can ashing removing part photoresist layer 50 runs through first via hole 10.
Step 116, carry out etching to seeing through the material that first via hole 10 and second via hole 11 expose, what exposed from first via hole 10 this moment is passivation layer 9 pixel region, and the material that exposes from second via hole 11 is the gate insulation layer 4 the interface area, shown in Figure 12 C;
Step 117, removal photoresist layer 50 are shown in Figure 12 D.The follow-up preparation that can finish other retes.
Adopt the technical scheme of present embodiment, still can utilize the characteristic that resin material high temperature subsides to come respectively two class via holes to be carried out etching, avoid the problem that it's quarter is past material under first via hole.
Embodiment four
The flow chart of the manufacture method of the liquid crystal display substrate that Figure 13 provides for the embodiment of the invention four, present embodiment adopts this photosensitive resin material of photoresist as resin material layer, forms to treat in conductive pattern and the insulating barrier flow process in the step that etched film carries out via etch on underlay substrate to comprise at least:
Step 131, on film to be etched, form resin material layer, promptly form photoresist layer 50, film to be etched can be for needing the film of etching via hole arbitrarily, and present embodiment is an example with the exemplary array board structure shown in the embodiment two, and film to be etched herein is a passivation layer 9;
Step 132, in photoresist layer 50, form first via hole 10 and second via hole 11, beeline between second via hole, 11 edges is greater than the beeline between first via hole, 10 edges, situation shown in the embodiment two as described above, first via hole 10 is formed on the corresponding passivation layer via hole of pixel region, and second via hole 11 is formed on the position of the corresponding grid line 2 of interface area;
Step 133, carry out etching to seeing through the material that first via hole 10 and second via hole 11 expose, this moment etching be passivation layer 9 in pixel region and the interface area, shown in Figure 14 A;
Step 134, heat treated so that photoresist layer 50 subside, thereby the bottom edge of first via hole 10 is extended internally link to each other the back to hide the bottom surface of first via hole 10, and the bottom edge of second via hole 11 extended internally and keep spacing, as shown in Figure 14B; In fact photoresist layer 50 can be collapsed upon in the passivation layer 9, because the thickness of photoresist layer 50 thickness that surpasses existing each layer on the substrate far away usually, so subsiding of photoresist layer 50 can hide the bottom surface of first via hole 10.
Step 135, carry out etching to seeing through the material that second via hole 11 exposes, the material that exposes from second via hole 11 this moment is the gate insulation layer 4 the interface area;
Step 136, removal photoresist layer 50 are shown in Figure 14 C.
Adopt the technical scheme of present embodiment, still can utilize the characteristic that resin material high temperature subsides to come respectively two class via holes to be carried out etching, avoid the problem that it's quarter is past material under first via hole.
Embodiment five
The embodiment of the invention five provides a kind of liquid crystal display substrate, comprise underlay substrate, be formed with conductive pattern and insulating barrier on the underlay substrate, also comprise first via hole and second via hole, be formed in the resin material layer, beeline between second via edges is greater than the beeline between first via edges, and the bottom edge of second via hole extends internally and keeps spacing.
The liquid crystal display substrate of the embodiment of the invention can also can be color membrane substrates for array base palte; can adopt the manufacture method of liquid crystal display substrate of the present invention to prepare; high temperature collapse characteristics by resin material; the first less via hole is carried out temporary transient shutoff, protect the material under first via hole not carved excessively when material carries out etching under to second via hole.
Liquid crystal display substrate of the present invention can be specially array base palte, shown in Figure 10 A and 10B, conductive pattern and insulating barrier specifically comprise: grid line 2, gate electrode 3, gate insulation layer 4, data wire 5, active layer, source electrode 7 and drain electrode 8, passivation layer 9 and pixel electrode 13.Wherein, grid line 2 and gate electrode 3 are formed in the pixel region 30 and interface area 40 of underlay substrate 1; Gate insulation layer 4 covers on the underlay substrate 1 that forms grid line 2 and gate electrode 3; Data wire 5 is formed on the gate insulation layer 4, is arranged in pixel region 30 and interface area 40; Active layer, source electrode 7 and drain electrode 8 are formed on the gate insulation layer 4, are arranged in pixel region 30, and active layer specifically comprises semiconductor layer 61 and doping semiconductor layer 62; Passivation layer 9 covers on the underlay substrate 1 that forms data wire 5, and passivation layer 9 is a resin material layer, is formed with first via hole 10 and second via hole 11 in the passivation layer 9, also is formed with the 3rd via hole 12, the three via holes 12 in the gate insulation layer 4 and is positioned at second via hole 11 times; Pixel electrode 13 is formed on the passivation layer 9, and pixel electrode 13 passes first via hole 10 and is electrically connected with drain electrode 8.
In the above-mentioned liquid crystal display substrate, first via hole 10 and second via hole 11 be shaped as circle, the diameter of first via hole 10 is preferably 2 to 5 microns, or more preferably 2 to 4 microns, the diameter of second via hole 11 preferably is about 10 microns.
Adopt technical scheme of the present invention, utilize resin material that the character of collapse-deformation can take place under the certain high temperature state, size by designing mask plate via etch, the exposure back forms the via hole that causes not of uniform size in the interface area of pixel region and peripheral circuit, because the size of two class via holes is inequality, the size of second via hole is more than several times of first via size, temperature by the control curing process, make resin material generation collapse-deformation, first via hole is covered by resin material, form the effect of similar portions exposure, and second via hole can be covered fully greatly and not owing to size.Thereby realized avoiding under the via hole data wire and drain electrode to be crossed the problem of carving, simultaneously, deformed, therefore in fact can also reduce the aperture of via hole after the etching owing to solidify the back resin material.
The embodiment of the invention also provides a kind of LCD, and it comprises liquid crystal display substrate provided by the present invention.By simple modifications to technology, can avoid the problem at quarter, improve the quality of LCD.
It should be noted that at last: above embodiment only in order to technical scheme of the present invention to be described, is not intended to limit; Although with reference to previous embodiment the present invention is had been described in detail, those of ordinary skill in the art is to be understood that: it still can be made amendment to the technical scheme that aforementioned each embodiment put down in writing, and perhaps part technical characterictic wherein is equal to replacement; And these modifications or replacement do not make the essence of appropriate technical solution break away from the spirit and scope of various embodiments of the present invention technical scheme.

Claims (13)

1. the manufacture method of a liquid crystal display substrate, be included in the flow process that forms conductive pattern and insulating barrier on the underlay substrate, it is characterized in that, on underlay substrate, form to treat in conductive pattern and the insulating barrier flow process in the step that etched film carries out via etch and comprise at least:
On described film to be etched, form resin material layer;
Form first via hole and second via hole in described resin material layer, the beeline between described second via edges is greater than the beeline between described first via edges;
Carry out heat treated so that described resin material layer subsides, thereby the bottom edge of described first via hole is extended internally link to each other the back to hide the bottom surface of described first via hole, and the bottom edge of described second via hole is extended internally and keep spacing;
The material that exposes through described second via hole is carried out etching.
2. manufacture method according to claim 1 is characterized in that, after the material that exposes through described second via hole is carried out etching, also comprises:
Described resin material layer is carried out removal technology, run through described first via hole with the bottom surface of getting rid of described first via hole.
3. manufacture method according to claim 2 is characterized in that, removes technology in that described resin material layer is carried out, and runs through after described first via hole with the bottom surface of getting rid of described first via hole, also comprises:
Carry out etching to seeing through the material that described first via hole and second via hole expose;
Remove described resin material layer.
4. manufacture method according to claim 1 is characterized in that:
Carrying out heat treated so that described resin material layer also comprises before subsiding: carry out etching to seeing through the material that described first via hole and second via hole expose;
The material that exposes through described second via hole is being carried out also comprising after the etching: remove described resin material layer.
5. manufacture method according to claim 2 is characterized in that, the flow process that forms conductive pattern and insulating barrier on underlay substrate comprises:
On described underlay substrate, form the grid line and the gate electrode of pixel region and interface area;
Covering gate insulating barrier on the underlay substrate that forms above-mentioned pattern;
On described gate insulation layer, form the data wire of pixel region and interface area, and the active layer, source electrode and the drain electrode that form pixel region;
Cover passivation layer on the underlay substrate that forms above-mentioned pattern, described passivation layer is described resin material layer;
In described passivation layer, form described first via hole and second via hole, and carry out heat treated;
The gate insulation layer that exposes through described second via hole is carried out etching, to form the 3rd via hole;
Described passivation layer is carried out etching, run through described first via hole with the bottom surface that etches away described first via hole;
Form pixel electrode on the underlay substrate that forms above-mentioned pattern, described pixel electrode passes described first via hole and is electrically connected with described drain electrode.
6. according to the arbitrary described manufacture method of claim 1~5, it is characterized in that described heat treated comprises: the described resin material layer of baking heating under 200 ℃ to 300 ℃ temperature.
7. according to the arbitrary described manufacture method of claim 1~5, it is characterized in that formation first via hole and second via hole comprise in resin material layer:
Form circular first via hole and second via hole in resin material layer, the diameter of described first via hole is 2 to 5 microns, and the diameter of described second via hole is 10 microns.
8. manufacture method according to claim 5, it is characterized in that, described passivation layer is carried out etching, running through described first via hole with the bottom surface that etches away described first via hole comprises: adopt sulphur hexafluoride and oxygen that described passivation layer is carried out etching, run through described first via hole with the bottom surface that etches away described first via hole.
9. manufacture method according to claim 5 is characterized in that, the gate insulation layer that exposes through described second via hole is carried out etching, comprises to form the 3rd via hole:
Adopt sulphur hexafluoride, chlorine and oxygen that the gate insulation layer that exposes through described second via hole is carried out etching, to form the 3rd via hole.
10. a liquid crystal display substrate comprises underlay substrate, is formed with conductive pattern and insulating barrier on the described underlay substrate, it is characterized in that, also comprises:
First via hole and second via hole are formed in the resin material layer, and the beeline between described second via edges is greater than the beeline between described first via edges, and the bottom edge of described second via hole extends internally and keeps spacing.
11. liquid crystal display substrate according to claim 10 is characterized in that, described conductive pattern and insulating barrier comprise:
Grid line and gate electrode are formed in the pixel region and interface area of described underlay substrate;
Gate insulation layer covers on the underlay substrate that forms described grid line and gate electrode;
Data wire is formed on the described gate insulation layer, is arranged in described pixel region and interface area;
Active layer, source electrode and drain electrode are formed on the gate insulation layer, are arranged in described pixel region;
Passivation layer, cover on the underlay substrate that forms described data wire, described passivation layer is described resin material layer, is formed with described first via hole and second via hole in the described passivation layer, also be formed with the 3rd via hole in the described gate insulation layer, described the 3rd via hole is positioned under described second via hole;
Pixel electrode is formed on the described passivation layer, and described pixel electrode passes described first via hole and is electrically connected with described drain electrode.
12. liquid crystal display substrate according to claim 10 is characterized in that: described first via hole and second via hole be shaped as circle, the diameter of described first via hole is 2 to 5 microns, the diameter of described second via hole is 10 microns.
13. a LCD is characterized in that: comprise the arbitrary described liquid crystal display substrate of claim 10~12.
CN 201010168708 2010-05-06 2010-05-06 Liquid crystal display substrate and manufacturing method thereof, and liquid crystal display Expired - Fee Related CN102237306B (en)

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