CN102231518B - Surging suppression circuit - Google Patents
Surging suppression circuit Download PDFInfo
- Publication number
- CN102231518B CN102231518B CN 201110156185 CN201110156185A CN102231518B CN 102231518 B CN102231518 B CN 102231518B CN 201110156185 CN201110156185 CN 201110156185 CN 201110156185 A CN201110156185 A CN 201110156185A CN 102231518 B CN102231518 B CN 102231518B
- Authority
- CN
- China
- Prior art keywords
- transistor
- resistance
- effect transistor
- field effect
- connects
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Semiconductor Integrated Circuits (AREA)
Abstract
The invention discloses a surging suppression circuit comprising a positive input end and a negative input end of an input power supply, a positive output end and a negative output end of an output power supply, a field-effect transistor, a second transistor, a third transistor, a capacitor, a first resistor, a second resistor and a third resistor, wherein the positive input end is connected withthe positive output end; the positive input end is connected with the grid electrode of the field-effect transistor and the collector electrode of the third transistor by virtue of the third resistor; the positive input end is connected with a drain electrode of the field-effect transistor by virtue of the capacitor; the drain electrode of the field-effect transistor is connected with the negative output end; the negative input end is connected with the source electrode of the field-effect transistor by virtue of the first resistor; the base electrode of the third transistor is connected withthe source electrode of the field-effect transistor; the base electrode of the second transistor is connected with the negative output end by virtue of the second resistor; the emitting electrode of the third transistor is connected with the collector electrode of the second transistor; and the emitting electrode of the second transistor is connected with the negative input end. The surging suppression circuit can be used for restraining surge voltage or current injection actually and effectively when a machine is started on.
Description
Technical field
The present invention relates to power protecting circuit, particularly the surge restraint circuit in the capacitor filter.
Background technology
In the present various electrical equipment, there is rectification circuit in a large number, through rectification, capacitor filtering, gives the translation circuit power supply of Switching Power Supply as civil power again; Conventional power source for another example, civil power is after the transformer step-down, behind rectification, capacitor filtering, give other circuit supply, this electric appliances is connected moment at mains switch, because the existence of filter capacitor, filter capacitor both end voltage moment charges to rated operational voltage from 0V, can produce very big surge voltage and surge current, surge current has not only shortened the life-span of filter capacitor, also wiring, cabling in the diode in the rectification circuit, fuse, the power supply is had bigger impact simultaneously.
The method of traditional inhibition surge current is in the loop of rectification circuit, seal in the thermistor (NTC) of suitable negative temperature coefficient, thermistor its resistance under normal conditions is bigger, mains switch is connected moment, and the thermistor resistance is bigger, has limited the charging current to electric capacity, thereby suppressed surge current, thermistor is owing to generate heat, and its resistance reduces because of heating, to reduce resistance oneself power consumption and reduction to the influence of circuit efficiency.This method simple possible, but if short supply interruption, because thermistor is longer cooling time; when thermistor was uncolled, if mains switch is connected again or circuit re-powers, at this moment the surge of Chan Shenging will be very big; the protective effect meeting of thermistor descends, even ineffective fully.Even short supply interruption not, thermistor is because its resistance reduces, and when external power source had surge voltage to produce, the thermistor effect was minimum, and subsequent conditioning circuit still is subjected to the impact of surge voltage.
In the low-power applications occasion, industry replaces above-mentioned thermistor through fixed resistance commonly used, and the value of fixed resistance has become problem, get for a short time, inhibition is poor, has got greatly, heating is serious, influence the efficient of complete machine, generally be difficult between the two and accept or reject, and, in case circuit enters stable state, this fixed resistance suppresses the surge effect to be finished, in circuit, only plays the negative effect of heating.
In the prior art, more effective a kind of solution, referring to Fig. 1, this circuit comprises voltage input end Vin-, voltage output end Vout-, metal-oxide-semiconductor Q1, triode Q2, capacitor C, first resistance R 1, second resistance R 2, the 3rd resistance R 3, voltage input end Vin-is connected with the source electrode of metal-oxide-semiconductor Q1 and the emitter of triode Q2 respectively, above-mentioned voltage input end also links to each other with the drain electrode of metal-oxide-semiconductor Q1 by first resistance R 1, the collector electrode of triode Q2 connects the grid of metal-oxide-semiconductor Q1 and passes through the 3rd resistance R 3 ground connection, the base stage of triode Q2 links to each other with the drain electrode of metal-oxide-semiconductor Q1 by second resistance R 2, the drain electrode of metal-oxide-semiconductor Q1 is by capacitor C ground connection, and the drain electrode of metal-oxide-semiconductor Q1 also is connected with voltage output end Vout-.
Foregoing circuit also has another equivalents, and the relation that soon is connected with external power source is changed: power input is changed into the external power source ground wire insert, former ground wire changes the external power source positive input into; The output ground wire is just changing to output, and output port changes to the output ground wire; The output ground wire is two different networks with the external power source ground wire.
The operation principle of such scheme is, when Vin connects external power source, this power supply is negative pressure, if mains switch closure, because the electric capacity both end voltage is initially 0V or lower magnitude of voltage, external power source passes through ground wire, through capacitor C, be divided into two-way and get back to Vin-, one tunnel process resistance R 1 is got back to Vin-, and another road is through the base stage of resistance R 2 and triode Q2, emitter is got back to Vin-, at this moment triode Q2 is because base stage has electric current to flow through to emitter, triode Q2 work, because Q1 is metal-oxide-semiconductor, its gate bias resistor R3 value is bigger, generally about M Ω level, the collector load R3 of triode Q2 makes that the grid level of N-channel MOS pipe Q1 is very low to the voltage of source electrode because value is big, and triode Q2 directly enters saturated, saturation voltage drop for triode Q2, be generally between the 0.7V to 0.1V, this voltage does not reach the cut-in voltage of N-channel MOS pipe Q1, and metal-oxide-semiconductor Q1 is in off state.
At this moment, this circuit occurs in the moment that the capacitor C both end voltage is 0V from the maximum current that external power source absorbs, and this current maxima is:
From above-mentioned formula as can be seen, this circuit is when externally power supply is closed, external power source is not produced unmanageable charging current, this electric current is only relevant with the value of resistance R 1 and R2, to the electric current of capacitor C charging, along with the capacitor C both end voltage raises, and progressively descend, the capacitor C both end voltage raises, and the numerical value of Vout further descends, the absolute value that is output voltage V out increases, when satisfying:
Vout-Vin≤0.7V
When satisfying above-mentioned formula, namely the base stage of triode Q2, the voltage between the emitter also can be lower than 0.7V, and triode Q2 ends, at this moment external power source is added to voltage on the grid of Q1 by R3, comparatively speaking, grid voltage is higher than source voltage, and metal-oxide-semiconductor Q1 opens, be in conducting state, because the internal resistance of metal-oxide-semiconductor is very low, at this moment, Vin and Vout voltage difference are extremely low, resistance R 1 and R2 both end voltage are extremely low, and heating power is very little; And resistance R 3 is bigger owing to value, and caloric value is also extremely low; When having realized that circuit enters stable state, reduced the power loss of this circuit.
When this circuit entered stable state, if at this moment Vin-has the surge voltage fluctuation, if the absolute value trend of Vin-voltage diminishes, at this moment the parasitic diode that voltage can pass through metal-oxide-semiconductor Q1 inside on the capacitor C was not had any influence by the external power source clamper; If it is big that the absolute value trend of Vin-voltage becomes; this circuit can be realized surge protection; can not produce bigger impulse current to circuit; principle is: if the absolute value trend of Vin-voltage becomes big moment; shown in the arrow on the voltage input end Vin-limit among Fig. 1; because the capacitor C both end voltage can not be suddenlyd change; triode Q2 emitter is connected with Vin-; triode Q2 emitter also can drop down moment; at this moment; the emitter of triode Q2 to the voltage difference between resistance R 2 and the Vout tie point can raise; when voltage difference is crossed 0.7V; in the resistance R 2 electric current can appear, the base stage of triode Q2; emitter has electric current and flows through, triode Q2 saturation conduction; metal-oxide-semiconductor Q1 ends synchronously; the surge voltage fluctuation of external power source can only be passed through R1; R2 is, and capacitor C works, and when realizing that like this external power source has surge voltage to produce, it is dynamic that this circuit provides; real-time guard.
This circuit is in actual tests, discovery is very high to the requirement of R1, particularly use the occasion at high pressure, the pulsation high pressure that after rectification, occurs the nearly 310V of peak value as the civil power of 220VAC, in the moment that powers up, this voltage just directly is added to the two ends of R1 by capacitor C, and the power headroom of R1 will be more, in fact comprehensive, also there is following deficiency in this circuit:
1, Kai Ji surge current is:
Surge current when thinking further to reduce start, R1 will get greatly,
2, facing a difficult choice often appears in the value of R1.Get for a short time, impulse current during start (surge current) is bigger.Got greatly, slow to the charging of C, the circuit start time is long, because the power consumption of subsequent conditioning circuit, and the Q1 conducting that delays.The charging current in RC loop is exactly passing in time, and the C both end voltage raises, and the charging current that flows through R1 is more and more littler.
3, the power headroom of R1 wants enough, because volume restrictions is a lot of to the bad compatibility of the occasion of volume requirement strictness.
Summary of the invention
Have in view of that, the object of the present invention is to provide a kind of surge restraint circuit, the technical problem that solve is on the basis of background technology Fig. 1, to allow Q1 be operated in the constant-current source state when start, the surge that does not exist charging to cause.Be operated in complete conducting state after the end, the same purpose that realizes suppressing surge.
For solving the problems of the technologies described above, the invention provides a kind of surge restraint circuit, comprise input power supply positive-negative input end, the out-put supply positive-negative output end, field effect transistor, transistor seconds, the 3rd transistor, electric capacity, first resistance, second resistance and the 3rd resistance, described positive input terminal connects positive output end, described positive input terminal is connected with grid and the described the 3rd transistorized collector electrode of described field effect transistor respectively after by described the 3rd resistance, described positive input terminal is connected to described field effect transistor drain electrode through described electric capacity, the drain electrode of described field effect transistor also is connected with negative output terminal, described negative input end links to each other with described field effect transistor source electrode by described first resistance, the described the 3rd transistorized base stage connects the source electrode of field effect transistor, the base stage of described transistor seconds connects negative output terminal by described second resistance, the described the 3rd transistorized emitter connects the collector electrode of described transistor seconds, and the emitter of described transistor seconds connects negative input end.
Described transistor seconds and the 3rd transistor are NPN transistor, and accordingly, described field effect transistor is the power-type metal-oxide-semiconductor of N raceway groove.
Described transistor seconds and the 3rd transistorized base stage and emitter are parallel with resistance respectively.
Be parallel with a voltage-stabiliser tube between the grid of described field effect transistor and the source electrode.
As another embodiment of the invention: a kind of surge restraint circuit, comprise input power supply positive-negative input end, the out-put supply positive-negative output end, field effect transistor, transistor seconds, the 3rd transistor, electric capacity, first resistance, second resistance and the 3rd resistance, described negative input end connects negative output terminal, described positive input terminal connects the emitter of transistor seconds and connects the source electrode of the 3rd transistorized base stage and field effect transistor by first resistance respectively, the base stage of described transistor seconds connects positive output end by second resistance, the collector electrode of described transistor seconds connects the 3rd transistorized emitter, the described the 3rd transistorized collector electrode connects the grid of field effect transistor and connects negative input end by the 3rd resistance, and the drain electrode of described field effect transistor connects positive output end and connects negative input end by electric capacity.
Described transistor seconds and the 3rd transistor are PNP transistor, and accordingly, described field effect transistor is the power-type metal-oxide-semiconductor of P raceway groove.
Described transistor seconds and the 3rd transistorized base stage and emitter are parallel with resistance respectively.
Be parallel with a voltage-stabiliser tube between the grid of described field effect transistor and the source electrode.
The present invention compared with prior art has following beneficial effect:
The present invention is in when start, and metal-oxide-semiconductor is realized constant current charge, effectively suppresses the injection of surge voltage, and after circuit entered stable state, the complete conducting of metal-oxide-semiconductor had reduced the power loss of surge restraint circuit; During load short circuits, provide the current-limiting protection function, when external power source had surge voltage to produce, this circuit provided dynamic, real-time current-limiting protection.
Description of drawings
Fig. 1 suppresses the schematic diagram of the more effective a kind of solution of prior art for surge;
Fig. 2 is embodiment one schematic diagram of surge restraint circuit of the present invention;
Fig. 3 is embodiment two schematic diagrams of surge restraint circuit of the present invention;
Embodiment
Embodiment one
As shown in Figure 2, a kind of surge restraint circuit, comprise positive input terminal Vin+, negative input end Vin-, positive output end Vout+, negative output terminal Vout-, metal-oxide-semiconductor Q1, transistor seconds Q2, the 3rd transistor Q3, capacitor C, first resistance R 1, second resistance R 2 and the 3rd resistance R 3, positive input terminal Vin+ connects positive output end Vout+, positive input terminal Vin+ is connected with the grid of metal-oxide-semiconductor Q1 and the collector electrode of the 3rd transistor Q3 respectively by after the 3rd resistance R 3, positive input terminal Vin+ is connected to the drain electrode of field effect transistor Q1 by capacitor C, the drain electrode of metal-oxide-semiconductor Q1 also is connected with negative output terminal Vout-, negative input end Vin-links to each other with metal-oxide-semiconductor Q1 source electrode by first resistance R 1, the base stage of the 3rd transistor Q3 is connected on the tie point of the source electrode of metal-oxide-semiconductor Q1 and first resistance R 1, the base stage of transistor seconds Q2 meets negative output terminal Vout-by second resistance R 2, and the collector electrode of transistor seconds Q2 connects the emitter of the 3rd transistor Q3.
The operation principle of above-described embodiment one is, when positive input terminal Vin+ connects external power source, this power supply is malleation, if mains switch closure, because the electric capacity both end voltage is initially 0 or lower magnitude of voltage, external power source passes through power line, through capacitor C, be divided into multichannel and get back to voltage input end Vin-, (hereinafter to be referred as input ground), the one tunnel through base stage, the emitter of capacitor C, second resistance R 2 and transistor seconds Q2 with getting back to input, and at this moment transistor seconds Q2 is because base stage has electric current to flow through to emitter, transistor seconds Q2 work is in the saturation conduction state; Gate bias the 3rd resistance R 3 values of metal-oxide-semiconductor are bigger, generally about M Ω level, the collector load of transistor Q2: the 3rd resistance R 3 and the 3rd transistor Q3, because the 3rd resistance R 3 values are big, transistor seconds Q2 directly enters saturated, make the emitter equivalence of the 3rd transistor Q3 connect input ground, at this moment N-channel MOS pipe Q1, the 3rd transistor Q3 and first resistance R 1 are formed constant-current source circuit, and the electric current of constant-current source is:
U wherein
Q3BEBe base stage and the emitter voltage drop of the 3rd transistor Q3, common silicone tube is about 0.7V, V
Q2CE (sat)Be the collector electrode of transistor seconds Q2 and the saturation voltage drop of emitter, common silicone tube is about 0.15V, by formula 2 as seen, flowing through the electric current of metal-oxide-semiconductor Q1 and the value of first resistance R 1 is inversely proportional to, the electric current of another part is the electric current through the 3rd resistance R 3, the 3rd transistor Q3 collector electrode, the 3rd transistor Q3 emitter, transistor seconds Q2 collector electrode, transistor seconds Q2 emitter, this electric current about the milliampere level, can not produce surge owing to influenced by the 3rd resistance R 3.
The operation principle summary of constant-current source circuit:
If certain reason makes I
R1Become big, the voltage at first resistance R, 1 two ends raises so, at this moment, flow through the base stage of the 3rd transistor Q3, the electric current increase of emitter, the collector current of the 3rd transistor Q3 increases, and the both end voltage of the 3rd resistance R 3 raises, the collector electrode of the 3rd transistor Q3 reduces the voltage on input ground (Vin-) so, be that metal-oxide-semiconductor Q1 grid reduces synchronously with the voltage of importing ground, the conducting electric current of metal-oxide-semiconductor Q1 can reduce, thereby makes I
R1Get back on the current value of formula 2.
If certain reason makes I
R1Diminish, the voltage at first resistance R, 1 two ends reduces so, at this moment, flow through the base stage of the 3rd transistor Q3, the electric current of emitter reduces, the collector current of the 3rd transistor Q3 reduces, the both end voltage of the 3rd resistance R 3 reduces, the collector electrode of the 3rd transistor Q3 raises to the voltage on input ground (Vin-) so, be that metal-oxide-semiconductor Q1 grid raises synchronously with the voltage of importing ground, the conducting electric current of metal-oxide-semiconductor Q1 can increase, thereby makes I
R1Rise and get back on the current value of formula 2.
External power source through capacitor C, is got back to the input ground of voltage input end by power line through metal-oxide-semiconductor Q1, first resistance R 1.Also have one the tunnel to get back to the ground wire of voltage input end through the 3rd resistance R 3, the 3rd transistor Q3, transistor seconds Q2.
From above-mentioned formula 2 as can be known, this circuit does not produce unmanageable charging current to external power source when externally power supply is closed, and this electric current is constant I
R1, to the electric current of capacitor C charging, along with the capacitor C both end voltage raises, maintain I always
R1, the capacitor C both end voltage raises, and voltage further raises between positive output end Vout+ and the negative output terminal Vout-, and when satisfying:
Vin-Vout≤0.7V
When satisfying above-mentioned formula, the base stage, the voltage between the emitter that are transistor seconds Q2 also can be lower than 0.7V, and transistor seconds Q2 ends, and at this moment the 3rd transistor Q3 also can end, external power source is added to voltage on the grid of metal-oxide-semiconductor Q1 by resistance R 3, metal-oxide-semiconductor Q1 is in conducting state fully, because the internal resistance of metal-oxide-semiconductor Q1 is very low, at this moment, Vin and Vout voltage difference are extremely low, first resistance R 1 is because value is less, and both end voltage is lower, and heating power is very little; And the 3rd resistance R 3 is very big owing to value, and caloric value is very low; When having realized that circuit enters stable state, reduced the power loss of surge restraint circuit.
When circuit enters stable state; if at this moment Vin has the surge voltage fluctuation; if Vin+ voltage raises; at this moment voltage can not suddenly change on the capacitor C; the voltage that changes can allow transistor seconds Q2 saturation conduction again by second resistance R 2, makes metal-oxide-semiconductor Q1 be operated in constant current state again, to the charging current of capacitor C again by current limliting; when realizing that like this external power source has surge voltage to produce, this circuit provides dynamically, real-time guard.If when positive input terminal Vin+ voltage reduced, metal-oxide-semiconductor Q1 can be in complete conducting, because the surge harm that the outer power voltage reduction produces is little, can protect.
The realization principle of load short circuit protection function: when circuit enters steady operation; if load is short-circuited; namely be equivalent to the capacitor C short circuit; the both end voltage that is capacitor C can reduce; at this moment; second resistance R 2 is by the base stage of transistor seconds Q2; emitter has electric current to flow through again; transistor seconds Q2 saturation conduction; metal-oxide-semiconductor Q1 is in constant current work; at this moment total work electric current of circuit so need only choose reasonable first resistance R 1, cooperates the fuse in the circuit as shown in Equation 1; reasonable total work electric current of control circuit just is unlikely to allow fault extension or initiation fire etc.
Present embodiment one is applicable to the not circuit on ground altogether of input and output.
Embodiment two
As shown in Figure 3, different with embodiment one is, transistor seconds Q2, the 3rd transistor Q3 are PNP transistor, metal-oxide-semiconductor Q1 is the power-type metal-oxide-semiconductor of P raceway groove, electric power polarity will be conversely, other annexation is constant, and if electric capacity use electrochemical capacitor etc. has polar capacitor, gets final product by correct access of actual polarity during access.
Its operation principle is described with embodiment one, repeats no more here.Embodiment two is suitable for controlling the circuit that circuit, input and the output of positive supply input need be altogether.
In addition, above-mentioned two embodiment can also further improve, as parallel resistance between the base stage of transistor seconds Q2, the 3rd transistor Q3 and emitter, can regulate triode saturated, by sensitivity behaviour, thereby the working sensitivity of regulating circuit of the present invention.
Also can be between metal-oxide-semiconductor Q1 grid and source electrode the voltage-stabiliser tube of parallel connection protection usefulness, be broken down by high-voltage to prevent metal-oxide-semiconductor Q1 grid and source electrode.
Only be preferred implementation of the present invention below, should be pointed out that above-mentioned preferred implementation should not be considered as limitation of the present invention, protection scope of the present invention should be as the criterion with claim institute restricted portion.For those skilled in the art; without departing from the spirit and scope of the present invention; can also make some improvements and modifications; these improvements and modifications also should be considered as protection scope of the present invention; as adopt triode or known multiple tube to replace corresponding metal-oxide-semiconductor; particularly; available NPN type triode replaces the N-channel MOS pipe, replaces the P channel MOS tube with the positive-negative-positive triode; corresponding, the base stage B of triode, emitter E, collector electrode C be grid G, source S, the drain D of corresponding metal-oxide-semiconductor respectively.
Claims (8)
1. surge restraint circuit, it is characterized in that comprising input power supply positive-negative input end, the out-put supply positive-negative output end, field effect transistor, transistor seconds, the 3rd transistor, electric capacity, first resistance, second resistance and the 3rd resistance, described positive input terminal connects positive output end, described positive input terminal is connected with grid and the described the 3rd transistorized collector electrode of described field effect transistor respectively after by described the 3rd resistance, described positive input terminal is connected to described field effect transistor drain electrode through described electric capacity, the drain electrode of described field effect transistor also is connected with negative output terminal, described negative input end links to each other with described field effect transistor source electrode by described first resistance, the described the 3rd transistorized base stage connects the source electrode of field effect transistor, the base stage of described transistor seconds connects negative output terminal by described second resistance, the described the 3rd transistorized emitter connects the collector electrode of described transistor seconds, and the emitter of described transistor seconds connects negative input end.
2. surge restraint circuit according to claim 1 is characterized in that described transistor seconds and the 3rd transistor are NPN transistor, and accordingly, described field effect transistor is the power-type metal-oxide-semiconductor of N raceway groove.
3. surge restraint circuit according to claim 1 is characterized in that being parallel with resistance respectively between described transistor seconds and the 3rd transistorized base stage and the emitter.
4. surge restraint circuit according to claim 1 is characterized in that being parallel with voltage-stabiliser tube between the grid of described field effect transistor and the source electrode.
5. surge restraint circuit, it is characterized in that comprising input power supply positive-negative input end, the out-put supply positive-negative output end, field effect transistor, transistor seconds, the 3rd transistor, electric capacity, first resistance, second resistance and the 3rd resistance, described negative input end connects negative output terminal, described positive input terminal connects the emitter of transistor seconds and connects the source electrode of the 3rd transistorized base stage and field effect transistor by first resistance respectively, the base stage of described transistor seconds connects positive output end by second resistance, the collector electrode of described transistor seconds connects the 3rd transistorized emitter, the described the 3rd transistorized collector electrode connects the grid of field effect transistor and connects negative input end by the 3rd resistance, and the drain electrode of described field effect transistor connects positive output end and connects negative input end by electric capacity.
6. surge restraint circuit according to claim 5 is characterized in that described transistor seconds and the 3rd transistor are PNP transistor, and accordingly, described field effect transistor is the power-type metal-oxide-semiconductor of P raceway groove.
7. surge restraint circuit according to claim 5 is characterized in that being parallel with resistance respectively between described transistor seconds and the 3rd transistorized base stage and the emitter.
8. surge restraint circuit according to claim 5 is characterized in that being parallel with voltage-stabiliser tube between the grid of described field effect transistor and the source electrode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201110156185 CN102231518B (en) | 2011-06-10 | 2011-06-10 | Surging suppression circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201110156185 CN102231518B (en) | 2011-06-10 | 2011-06-10 | Surging suppression circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102231518A CN102231518A (en) | 2011-11-02 |
| CN102231518B true CN102231518B (en) | 2013-09-25 |
Family
ID=44844063
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201110156185 Active CN102231518B (en) | 2011-06-10 | 2011-06-10 | Surging suppression circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102231518B (en) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103812097B (en) * | 2012-11-06 | 2016-12-21 | 江苏永昌新能源科技有限公司 | Current buffer |
| CN103208774B (en) * | 2013-05-02 | 2015-12-30 | 石家庄迅能电子科技有限公司 | A kind of intrinsic safety electric source short-circuit protection circuit |
| CN105322522A (en) * | 2014-06-24 | 2016-02-10 | 中兴通讯股份有限公司 | Method and circuit for restraining surge current of DC electrical source |
| CN104578843B (en) * | 2014-12-22 | 2017-04-19 | 广州金升阳科技有限公司 | Filter circuit of AC/DC (alternating current/direct current) switching converter |
| CN105305800B (en) * | 2015-11-18 | 2018-08-28 | 明纬(广州)电子有限公司 | A kind of surge current suppression circuit |
| CN106598192B (en) * | 2016-12-12 | 2019-05-14 | 郑州云海信息技术有限公司 | A kind of power supply unit, method and power supply system |
| CN109088535A (en) * | 2017-06-14 | 2018-12-25 | 上海明石光电科技有限公司 | A kind of Switching Power Supply and its soft starting circuit |
| JP7114836B2 (en) * | 2018-05-24 | 2022-08-09 | サンデン・オートモーティブコンポーネント株式会社 | Power supply input circuit and inverter-integrated electric compressor for vehicle equipped with the same |
| CN108512409A (en) * | 2018-05-31 | 2018-09-07 | 西南交通大学 | A kind of highpowerpulse load power source soft starting device and start method |
| CN108963999B (en) * | 2018-08-07 | 2020-02-14 | 中国航空工业集团公司雷华电子技术研究所 | Surge current suppressor |
| CN114204535B (en) * | 2022-02-18 | 2022-07-08 | 上海维安半导体有限公司 | Blocking type surge protector with accelerated turn-off |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101047323A (en) * | 2006-03-30 | 2007-10-03 | 电力集成公司 | Method and apparatus for an in-rush current limiting circuit |
| CN201726130U (en) * | 2010-07-27 | 2011-01-26 | 长城信息产业股份有限公司 | Direct-current surge suppression circuit |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000092823A (en) * | 1998-09-08 | 2000-03-31 | Toko Inc | Current limiting circuit |
-
2011
- 2011-06-10 CN CN 201110156185 patent/CN102231518B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101047323A (en) * | 2006-03-30 | 2007-10-03 | 电力集成公司 | Method and apparatus for an in-rush current limiting circuit |
| CN201726130U (en) * | 2010-07-27 | 2011-01-26 | 长城信息产业股份有限公司 | Direct-current surge suppression circuit |
Non-Patent Citations (1)
| Title |
|---|
| JP特开2000-92823A 2000.03.31 |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102231518A (en) | 2011-11-02 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102231518B (en) | Surging suppression circuit | |
| CN102082430A (en) | Surge suppression circuit | |
| CN106972769A (en) | A kind of light current electrical load overvoltage crowbar | |
| CN212162803U (en) | Impact current suppression and reverse connection prevention protection circuit | |
| CN203313144U (en) | Backflow prevention circuit | |
| CN102646962A (en) | Over temperature protection circuit used for power device | |
| CN102769281B (en) | Quick-response current-limiting protection circuit | |
| CN104914909A (en) | Power control device and method | |
| CN104143818B (en) | Prevent the device that current-limiting circuit is excessively adjusted | |
| CN104578843B (en) | Filter circuit of AC/DC (alternating current/direct current) switching converter | |
| CN106786353A (en) | A kind of overvoltage crowbar | |
| WO2022111240A1 (en) | Control circuit for intelligent low-side power switch, and chip | |
| CN205622210U (en) | Display screen with overvoltage protection | |
| CN103023004A (en) | Surge suppression circuit | |
| US8526149B2 (en) | Limiting current circuit that has output short circuit protection | |
| CN106992668A (en) | A kind of alternating current-direct current Mixed design dc source | |
| CN101594046B (en) | Inrush current limiter | |
| CN105929886A (en) | Reference Voltage Circuit And Electronic Device | |
| CN104578025B (en) | Overvoltage crowbar for high voltage integrated circuit | |
| CN105337356B (en) | Voltage equalization circuit | |
| CN202095140U (en) | Solution for working power source of two-wire system electronic switch | |
| CN202940585U (en) | Surge suppression circuit | |
| CN205809758U (en) | Linear voltage-stabilizing circuit | |
| CN205791623U (en) | Charge port protector | |
| CN104467435A (en) | Balance modulation type multiplex output stabilized voltage supply based on logic protection amplifying circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |