CN102227104B - Data interleaving method and apparatus thereof - Google Patents

Data interleaving method and apparatus thereof Download PDF

Info

Publication number
CN102227104B
CN102227104B CN 201110218453 CN201110218453A CN102227104B CN 102227104 B CN102227104 B CN 102227104B CN 201110218453 CN201110218453 CN 201110218453 CN 201110218453 A CN201110218453 A CN 201110218453A CN 102227104 B CN102227104 B CN 102227104B
Authority
CN
China
Prior art keywords
pattern
interweaves
interleaver
interweave
patterns
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN 201110218453
Other languages
Chinese (zh)
Other versions
CN102227104A (en
Inventor
余荣道
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Huawei Technologies Co Ltd
Original Assignee
Huawei Technologies Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huawei Technologies Co Ltd filed Critical Huawei Technologies Co Ltd
Priority to CN 201110218453 priority Critical patent/CN102227104B/en
Publication of CN102227104A publication Critical patent/CN102227104A/en
Application granted granted Critical
Publication of CN102227104B publication Critical patent/CN102227104B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Error Detection And Correction (AREA)

Abstract

The invention discloses a data interleaving method and an apparatus thereof, which are used to improve an interleaving performance during an interleaving process. The interleaving method of the invention comprises the following steps that: an interleaver is provided with two or more interleaving patterns; the interleaver performs an interleaving operation on input data by respectively adopting the two or more interleaving patterns; data with set bits is successively and respectively input into the two or more interleavers to be interleaved, wherein the set bits are two or more bits; bit sequences output by the interleavers are merged according to the set bits.

Description

The deinterleaving method of data and device
Technical field
The present invention relates to communication technical field, relate in particular to deinterleaving method and the device of data.
Background technology
E-DCH (Enhanced Dedicated Transport Channel, the enhancing special uplink channel) be called again HSUPA (High Speed Uplink Packet Access, the high speed uplink packet access), it is the Radio Transmission Technology of 3GPP another enhancing of introducing in Release 6 after in Release 5, introducing HSDPA, due to the up fast packet scheduling adopted based on Node B (Node B), Fast HARQ (Hybrid Automatic Repeat reQuest, the mixed automatic retransfer request) and the key technology such as the short frame of 2ms, it is high that E-DCH has spectrum efficiency, uplink transmission rate is fast, the obvious advantage of the little grade of propagation delay time, thereby more effectively support the real-time game business, file is uploaded, the grouping such as broadband multimedia services data service application.
In communication system, in order to improve the transmitting of system, adopt FEC (Forward Error Correction, forward error correction coding) and ARQ (Automatic Repeat reQuest, HARQ) two schemes.FEC is because transmission mechanism is simple, the little and general higher occasion for requirement of real time of system delay, and ARQ is high for transmission precision and place that requirement of real-time is low.And both are combined, be that HARQ can obtain transmission performance preferably.The mode merged at receiving terminal according to forward error correction in HARQ, HARQ mainly contains following two kinds: Chase Combining (Chase merging) and IR (Incremental Redundancy, incremental redundancy type).In Chase merges, transmitting terminal retransmits at every turn and uses identical FEC coded data packet, the grouping of receiving terminal storage errors, according to SNR (Signal to Noise Ratio, the signal to noise ratio) weighted array received, these send the copy of grouping to the decoder of receiving terminal.Like this, obtained the time diversity gain.Incremental redundancy type HARQ has considered the time-varying characteristics of radio propagation channel.When transmission data block first, do not have or with a small amount of redundancy.If bust this, retransmitted.The data block retransmitted is not copying of the data block that passes first, but has increased redundancy section wherein.At receiving terminal, the data block of receiving for twice is merged, code rate can decrease and improve coding gain.
At present, in the HARQ transmitting procedure, when carrying out interlace operation, interleaver all adopts the pattern that interweaves to carry out interlace operation, so, and in the initial transmission of E-DCH transmission block and each retransmission processes, the data that each input position is identical, its outgoing position after interweaving is also identical.And, in non-high-speed mobile situation, during due to each the re-transmission, channel variation is smaller, therefore, the obtained time diversity of soft merging gains also smaller.
For E-DPDCH (E-DCH Dedicated Physical Data Channel, the E-DCH Dedicated Physical Data Channel), adopt 4PAM (Pulse Amplitude Modulation, while pulse amplitude modulation) modulating, adopt two interleavers that identical size is R2 * 30, wherein R2 is for meeting smallest positive integral.Input bit enters the two-way interleaver successively.U kenter the first interleaver, u k+1enter the second interleaver.Through after the interweaving of two interleavers, read bit from two interleavers successively and exported, be i.e. v kfrom the first interleaver, v k+1from the second interleaver, k mod 2=1 wherein.Adopt interleaving scheme of the prior art, through after the interweaving of two interleavers, by the output bit of two interleavers carry out in conjunction with after in the bit sequence that obtains, the output bit that index is k and k+1 (is v kand v k+1) between the gain that do not interweave.
By 2 continuous binary character v in the output bit sequence after interweaving k, v k+1while being mapped as 1 real-valued sequence.Its mapping relations can be as shown in table 1:
Table 1
v k,v k+1 Real-valued
00 0.4472
01 1.3416
10 -0.4472
11 -1.3416
Visible, while adopting the interleaving scheme of current 4PAM, 2 bits on 4PAM constellation point do not interweave and come, and that is to say, 2 bits on constellation point, without any the gain that interweaves, can cause the deterioration of performance like this.
Summary of the invention
The embodiment of the present invention provides deinterleaving method and the device of data, in order to improve the felt properties of interleaving process.
In order to solve the problems of the technologies described above, the embodiment of the present invention provides a kind of deinterleaving method of data, comprises the following steps:
Be that an interleaver configures two or more patterns that interweaves; And
Described interleaver adopt respectively described two or more interweave pattern to the input data carry out interlace operation.
The embodiment of the present invention also provides a kind of deinterleaving method of data, comprises the following steps:
The data that to set successively bit are inputted respectively two or more interleavers and are interweaved, and described setting bit is two or more bits; And
According to described setting bit, the bit sequence of described interleaver output is merged.
The embodiment of the present invention also provides a kind of deinterleaving method of data, comprises the following steps:
Data are inputted respectively to two or more interleavers to be interweaved; And
Take two or more bits is merged from the output of described interleaver respectively as one group.
The embodiment of the present invention also provides a kind of interlaced device, and described interlaced device comprises interleaver and configuration module, wherein:
Described configuration module, be used to a described interleaver to configure two or more patterns that interweaves;
Described interleaver, for adopt respectively described two or more interweave pattern to the input data carry out interlace operation.
The embodiment of the present invention also provides a kind of interlaced device, and described interlaced device comprises cuts apart module, merging module and two or more interleavers, wherein:
The described module of cutting apart, for also exporting to respectively described two or more interleavers according to setting bitslicing input data;
Described interleaver, for carrying out interlace operation and the bit sequence after interweaving exported to described merging module the input data;
Described merging module, for being merged the bit sequence of described two or more interleaver outputs according to described setting bit.
The embodiment of the present invention also provides a kind of interlaced device, and described interlaced device comprises two or more interleavers and merging module, wherein:
Described interleaver, for carrying out interlace operation and the bit sequence after interweaving exported to described merging module the input data;
Described merging module, take two or more bits for the bit sequence of described interleaver output and merged as one group.
In embodiments of the present invention, configure two or more patterns that interweaves for interleaver; And interleaver adopt respectively these two or more interweave pattern to the input data carry out interlace operation., when the bit sequence to after interweaving carries out soft merging, can obtain larger time diversity gain, thereby improve the felt properties of interleaving process.
In embodiments of the present invention, the data that will set successively bit are inputted respectively two or more interleavers and are interweaved, and this sets bit is two or more bits; And according to this setting bit, the bit sequence of interleaver output is merged., when the bit sequence by after interweaving is mapped to planisphere, can make a plurality of bits on constellation point have the gain that interweaves, obtain better performance.
Be in example in the present invention, merged from interleaver output respectively as one group by take two or more bits, 2 continuous bits are fully interweaved and come., when the bit sequence by after interweaving is mapped to planisphere, can make a plurality of bits on constellation point have the gain that interweaves, obtain better performance.
The accompanying drawing explanation
Fig. 1 determines the flow chart that adopts the pattern that interweaves in the embodiment of the present invention one;
The block diagram that Fig. 2 is interlaced device in the embodiment of the present invention four;
The block diagram that Fig. 3 is interlaced device in the embodiment of the present invention five;
The block diagram that Fig. 4 is interlaced device in the embodiment of the present invention six.
Embodiment
The interlace operation that the embodiment of the present invention be take in the HARQ transmitting procedure is example, but be not limited to this, other is related to interleaver and configures two or more patterns that interweaves, and when being interweaved, be adopted as respectively its configuration two or more patterns that interweave process or the device all similar with it.
Below in conjunction with accompanying drawing, the embodiment of the present invention is done further and described.
Embodiment mono-
With BPSK (Binary Phase Shift Keying, binary phase shift keying) modulation system is example, under the BPSK modulation system, only need an interleaver while carrying out interlace operation, in the present embodiment, configure two or more patterns that interweaves for an interleaver under the BPSK modulation system; And this interleaver adopt respectively these two or more interweave pattern to the input data carry out interlace operation.
Due in the HARQ transmission, the number of times transmitted is unfixing, when configuration interweaves pattern, can make the number of the pattern that interweaves equate with the number of times of HARQ transmission, for example, the situation that the number of times of corresponding HARQ instance transmission is 4, configure 4 patterns that interweave, the interlace operation carried out in corresponding each transmission respectively; Also can make the number of times of the number of the pattern that interweaves and HARQ transmission unequal, for example, the number of times of HARQ transmission is 8 times, in this case, also can only configure 4 patterns that interweave, and there is respectively corresponding relation in these 4 patterns that interweave with transmitting for 8 times.
In an example of the present embodiment one, think and interweave 4 of interleaver configurations under the BPSK modulation system pattern is corresponding respectively is transmitted as example 4 times, wherein, the corresponding patternIndex (drawing indexing interweaves) of each pattern that interweaves, be respectively 0,1,2,3.
The drawing indexing patterIndex that interweaves that each HARQ transmission adopts can be indicated by the E-DPCCH (E-DCH Dedicated Physical Control Channel, E-DCH Dedicated Physical Control Channel) of the required control information of carrying demodulation reception E-DPDCH.
Because the information in existing E-DPCCH carrying comprises RSN (Retransmission sequence number, re-transmission sequence number), therefore, the patterIndex of the pattern that interweaves that can indicate according to the RSN of each transmission this transmission to adopt,, can set up the mapping relations of RSN and patterIndex as shown in table 2:
Table 2
RSN Drawing indexing interweaves
0 0
1 1
2 2
3 3
Obviously, the value that the mapping relations of RSN and patterIndex not necessarily will be as corresponding as each in table 2 is equal, as long as there are corresponding mapping relations, the mapping relations of RSN and patterIndex also can be as shown in table 3:
Table 3
RSN Drawing indexing interweaves
0 1
1 3
2 0
3 2
The mapping relations of the RSN shown in table 3 and patterIndex of take are example, when an E-DCH transmission block transmits for the first time, be that RSN is 0 o'clock, by look-up table 3, can know, this time patterIndex corresponding to transmission is 1, in first transmission, the pattern that interweaves that utilizes patterIndex to be 1 carries out interlace operation so.The E-DCH transmission block retransmitting for the first time, when retransmitting and retransmitting for the third time for the second time by that analogy.
In another example of the present embodiment one, think to interweave 4 of interleaver configurations under the BPSK modulation system pattern is corresponding respectively is transmitted as example 8 times.In this case, can set up the mapping relations of RSN and patterIndex as shown in table 4:
Table 4
RSN Drawing indexing interweaves
0,5 2
1,7 3
2,4 0
3,6 1
When the mapping relations of RSN and patterIndex are as shown in table 4, E-DCH transmission block transmits or while retransmitting for the 5th time for the first time, be that RSN is 0 or 5 o'clock, by look-up table 4, can know, this time patterIndex corresponding to transmission is 2, in first transmission or retransmitting for the 5th time, the pattern that interweaves that utilizes patterIndex to be 2 carries out interlace operation so.Other each re-transmission by that analogy, known the pattern that interweaves that carries out interlace operation by look-up table 4.
Visible, in this example, need 3 Bit datas to mean RSN, yet, the RSN of HARQ means with two bits at present, only have 0,1,2,3 four number, therefore, in the present embodiment, a kind of method of determining the pattern that interweaves that each transmission should adopt is provided in addition, the RV transmitted by HARQ (Redundancy Version, redundancy versions) determines the pattern that interweaves that each transmission should adopt, and is specially:
When carrying out the transmission of an E-DCH transmission block, carry out the flow process of the pattern that interweaves of definite employing as shown in Figure 1, comprise the following steps:
Step S101, determine the RV index information that current transmission is corresponding;
In this step, specifically according to the RSN of current transmission, in conjunction with the size of the encoding rate of data to be transmitted, number TTIN and the HARQ treatment progress of TTI (Transmission Time Interval, Transmission Time Interval), count N aRQ, determine corresponding RV index information;
The initial transmission of an E-DCH transmission block, retransmit for the first time, retransmit heavy sequence number RSN for the second time and should be mutually 0,1,2; When number of retransmissions is more than or equal to three, RSN is 3.And E-DCH supports two kinds of TTI sizes, i.e. 2ms TTI and 10ms TTI, for 10ms TTI, TTI number TTIN equals CFN (Connection Frame Number, Connection Frame Number), for 2ms TTI, TTI number TTIN=5 * CFN+ number of sub frames.
According to the relation of RSN in table 5 and RV index (Index), can determine and once transmit corresponding RV.
Table 5
Figure BDA0000080389990000071
Figure BDA0000080389990000081
Wherein, N sys/ N e, data, jmean the encoding rate of data to be transmitted, visible, according to table 5, when RSN is 0,1,2, according to data to be transmitted N sys/ N e, data, jsize, can be unique determine a RV index, and, when RSN is 3, the expression number of retransmissions is greater than or equal to three, in this case, if N sys/ N e, data, jbe less than 1/2, can calculate the RV index according to formula (1):
Figure BDA0000080389990000082
Wherein
Figure BDA0000080389990000083
expression is asked for
Figure BDA0000080389990000084
remainder divided by 2, this result of calculation may be 0,1.
And if N sys/ N e, data, jbe greater than or equal to 1/2, can calculate the RV index according to formula (2):
Figure BDA0000080389990000085
Due to wherein
Figure BDA0000080389990000086
expression is asked for
Figure BDA0000080389990000087
remainder divided by 4, therefore, this result of calculation may be 0,1,2,3.
Visible, each transmission can a corresponding RV index, therefore, as long as set up the RV index and the mapping relations of the pattern that interweaves can be determined one for each transmission and interweave pattern.
Step S102, search the RV index and the mapping relations of the pattern that interweaves according to the RV index information, determines the pattern that interweaves that current transmission should adopt.
In the another one example of the present embodiment one, the mapping relations of RV index and the pattern that interweaves are as shown in table 6, and in specific implementation, the mapping relations of RV index and the pattern that interweaves can arrange as required:
Table 6
The RV index Drawing indexing interweaves
0 1
1 3
2 0
3 2
In this example, after the RV index of determining once transmission is 2, by look-up table 6, can knows that this drawing indexing that interweaves corresponding to transmission is 0, thereby determine the pattern that interweaves interweaved.
Visible, in this example, the index of the pattern that interweaves that the first transmission of an E-DCH transmission block is corresponding is 1, and the index that retransmits for the first time the corresponding pattern that interweaves of this E-DCH transmission block is 3, what this twice transmission adopted is the different patterns that interweaves, therefore, in two patterns that interweave, the different part in target location of the data that the definition initial position is identical, the data that each input position is identical, its outgoing position difference after interweaving, the obtained time diversity of soft merging gains better, particularly in non-high-speed mobile situation, also can obtain time diversity gain preferably.Equally, in order to obtain better time diversity gain, in the pattern that respectively interweaves, data definition that should initial position is identical is to different target locations.
When specific implementation, can configure simultaneously and preserve 4 different patterns that interweave for interleaver, but can bring certain expense like this.And due to two or more not concrete restrictions of pattern that interweave to configuration, therefore, the storage overhead brought in order to reduce storage to interweave pattern, in the present embodiment, can only preserve the pattern that interweaves, and be out of shape to generate other patterns that interweaves by pattern that this is interweaved.For example, suppose that in the present embodiment the interleaver adopted is all that size is the interleaver of R2 * C2=32 * 30, and the pattern that interweaves of preservation to be first shown in table 7 interweave pattern:
Table 7
Figure BDA0000080389990000091
, other patterns that interweave can obtain according to the distortion of the pattern that interweaves shown in table 7, and the mode of carrying out this distortion has a lot, for example:
Mode one
Second pattern that interweaves is the first backward that interweaves pattern, and second pattern that interweaves that pattern that interweaves shown in table 7 is carried out to corresponding deformation obtains is as shown in table 8:
Table 8
Figure BDA0000080389990000092
Mode two
Generating second while interweaving pattern, first first pattern that interweaves is being carried out to the backward arrangement, then the first half of the pattern that interweaves after backward is arranged and latter half exchange, second pattern that interweaves obtained is as shown in table 9:
Table 9
Figure BDA0000080389990000101
Mode three
Second pattern that interweaves is that the first the interweave first half of pattern and latter half exchanges, and the pattern that interweaves shown in table 7 being carried out to corresponding deformation, to obtain second pattern that interweaves as shown in table 10:
Table 10
Figure BDA0000080389990000102
Visible, because the pattern that interweaves obtained according to above-mentioned variety of way is to be out of shape and to obtain through simple processing on the basis of the pattern that interweaves shown in table 7, do not need other buffer memory to store this pattern that interweaves, saved storage overhead, and, because this deformation process is very simple, can't increase because of this deformation process the complexity of interleaving treatment.
When specific implementation, the pattern that interweaves of this generation can comprise a kind of or its combination in any in the pattern that interweaves that above several mode generates.
Below, take under the 4PAM modulation system and describe interweaving as example in the HARQ carried out, under the 4PAM modulation system, need two interleavers, wherein, each interleaver can be with reference to the said method configuration pattern that interweaves, and carries out interlace operation.Yet, interweave pattern and the storage overhead that brings in order to reduce storage, in two interleavers under the 4PAM modulation system, can be defined as according to the pattern that interweaves that is the first interleaver configuration the pattern that interweaves of another or the configuration of a plurality of interleaver.When specific implementation, the index of the pattern that interweaves of the second interleaver can be derived by the drawing indexing that interweaves of the first interleaver, thereby set up the mapping relations of the drawing indexing that interweaves of certain transmission (concrete corresponding RV index or RSN) and the second interleaver, the mode of this derivation has a lot, for example:
Mode one
Make the drawing indexing sum that interweaves of interweave drawing indexing and second interleaver of the first interleaver be 3, as shown in table 11:
Table 11
The drawing indexing that interweaves of the first interleaver The drawing indexing that interweaves of the second interleaver
0 3
1 2
2 1
3 0
The mapping relations of the RV index shown in associative list 6 and the drawing indexing that interweaves, suppose the mapping relations of the drawing indexing that interweaves that these mapping relations are RV index and the first interleaver, so, the mapping relations of the drawing indexing that interweaves of interweave drawing indexing and second interleaver of RV index, the first interleaver are as shown in table 12:
Table 12
The RV index The drawing indexing that interweaves of the first interleaver The drawing indexing that interweaves of the second interleaver
0 1 2
1 3 0
2 0 3
3 2 1
Thereby, when certain transmits, can know by the mapping relations shown in table 12 drawing indexing that interweaves of interweave drawing indexing and second interleaver of the first interleaver by the RV index.
Mode two
Making the drawing indexing that interweaves of interweave drawing indexing and second interleaver of the first interleaver is a kind of Special Mapping, as 0 and 1 mapping mutually, and 2 and 3 mappings mutually, as shown in table 13:
Table 13
The drawing indexing that interweaves of the first interleaver The drawing indexing that interweaves of the second interleaver
0 1
1 0
2 3
3 2
Mode three
Certainly, also can make the drawing indexing that interweaves of the first interleaver equate with the drawing indexing that interweaves of the second interleaver, as shown in table 14:
Table 14
The drawing indexing that interweaves of the first interleaver The drawing indexing that interweaves of the second interleaver
0 0
1 1
2 2
3 3
But, due under the 4PAM modulation system, adopt the interleaver that the identical size of two-way is R2 x 30, wherein R2 is for meeting
Figure BDA0000080389990000121
smallest positive integral.Input bit enters the two-way interleaver successively.U kenter first via interleaver, u k+1enter the second interleaver.Through after the interweaving of two-way interleaver, read bit from two interleavers successively and exported, be i.e. v kfrom first interleaver, v k+1from second interleaver, wherein k mod 2=1.If the index of the pattern that interweaves of the second interleaver equates with the index of the pattern that interweaves of the first interleaver, through after the interweaving of two interleavers, gain does not interweave between the input bit that the list entries index is k and k+1, reduce felt properties, therefore, when the index of the pattern that interweaves of the second interleaver derived in the index of the pattern that interweaves by the first interleaver, should avoid two interleavers adopting the identical pattern that interweaves when once transmitting, configure two or more interleavers with once in transmission, adopting the different patterns that interweaves.
When specific implementation, the method that is defined as the pattern that interweaves of another or the configuration of a plurality of interleaver according to the pattern that interweaves that is the first interleaver configuration can be not limited only to the mapping method of above-mentioned index, can also be generated as according to the one or more patterns that interweave that are the first interleaver configuration the pattern that interweaves of another or the configuration of a plurality of interleaver, its concrete generating mode can be referring to the mode of texturing of the above-mentioned pattern that interweaves, and the pattern difference that guarantees to interweave gets final product.
Embodiment bis-
While being interweaved, can also adopt following interleaving scheme under with the 4PAM modulation system:
Adopt two interleavers that identical size is R2 * 30, wherein R2 is for meeting
Figure BDA0000080389990000122
smallest positive integral.The bit that is k and k+1 by index is inputted the first interleaver, and the bit that index is k+2 and k+3 is inputted the second interleaver, i.e. u kand u k+1enter the first interleaver, u k+2and u k+3enter the second interleaver.Through after the interweaving of two interleavers, can read bit from two interleavers successively and be incorporated in twos line output, the data of also can be successively from two interleavers, reading two or more bits are carried out combination.Be combined into example with the data of reading two bits from two interleavers successively and described, be i.e. v kand v k+1from the first interleaver, v k+2and v k+3from the second interleaver, k mod 4=1 wherein.
Visible, in the present embodiment, by the input bit sequence take 2 enter respectively two interleavers as one group, therefore through after the interweaving respectively of two interleavers, having obtained the gain that interweaves between 2 continuous bits, is also that 4PAM modulates between 2 bits corresponding to next constellation point and obtained the gain that interweaves.
Take a bit sequence that length is 60, its index is followed successively by: 1,2 ..., 60, while adopting 4PAM, during the technical scheme that adopts the present embodiment to provide, index is { 1,2,5,6,9,10,13,14,17,18,21,22,25,26,29,30,33,34,37,38,41,42,45,46, the sequence of 49,50,53,54,57,58} enters the first interleaver; Index is that { bit of 3,4,7,8,11,12,15,16,19,20,23,24,27,28,31,32,35,36,39,40,43,44,47,48,51,52,55,56,59,60} enters the second interleaver.
If two interleavers all pattern that interweaves shown in employing table 7 are interweaved, the index of the output bit sequence of the first interleaver is so: { Isosorbide-5-Nitrae 1,21,10,30,50,6,26,46,17,37,57,2,22,42,13,33,53,9,29,49,38,18,58,25,5,14,45,54,34}.
The index of the output bit sequence of the second interleaver is: { 3,43,23,12,32,52,8,28,48,19,39,59,4,24,44,15,35,55,11,31,51,40,20,60,27,7,16,47,56,36}.
, the output bit of two interleavers is carried out in conjunction with after the index of the bit sequence that obtains be: { Isosorbide-5-Nitrae 1,3,43,21,10,23,12,30,50,32,52,6,26,8,28,46,17,48,19,37,57,39,59,2,22,4,24,42,13,44,15,33,53,35,55,9,29,11,31,49,38,51,40,18,58,20,60,25,5,27,7,14,45,16,47,54,34,56,36}.
Visible, in the present embodiment, the data that will set successively bit are inputted respectively two or more interleavers and are interweaved, and this sets bit is two or more bits; And according to this setting bit, the bit sequence of interleaver output is merged.This scheme adopted, can fully interweave 2 continuous bits to come.
Suppose that reading bit from two interleavers successively is incorporated into line output in twos, the index of the bit sequence obtained is: { 1,3,41,43,21,23,10,12,30,32,50,52,6,8,26,28,46,48,17,19,37,39,57,59,2,4,22,24,42,44,13,15,33,35,53,55,9,11,29,31,49,51,38,40,18,20,58,60,25,27,5,7,14,16,45,47,54,56,34,36}.
Visible, read bit from two interleavers successively and be incorporated in twos line output, 2 continuous bits fully can be interweaved and come equally.
After merging obtains bit sequence, bit sequence after this merging is mapped on planisphere, because 2 continuous bits have interweaved out fully, therefore, when the bit sequence by after this merging is mapped on planisphere, during the 4PAM modulation, on constellation point, between 2 bits of correspondence, obtained the gain that interweaves preferably.
In the present embodiment, be not limited to the situation that only adopts two interleavers, these two or more interleavers can adopt two or more interleavers, as long as be take two or more bits and merged from the output of each interleaver respectively as one group.And the output sequence of this each interleaver is output successively not necessarily, also can sequentially be exported with setting, that is, the output bit can be both: V k, V k+1, V k+2, V k+3be perhaps: V k, V k+2, V k+1, V k+3deng.
When specific implementation, be not limited to and take 2 bits as one group of input interleaver, can be also to take 3 or 3 above bits to enter successively the first interleaver and the second interleaver as one group, in this case, when the output bit sequence to each interleaver is merged, also should take 3 or 3 above bits to be merged as one group.
Take 3 bits as one group be example, make u k, u k+1and u k+2enter the first interleaver, u k+3, u k+4and u k+5enter the second interleaver, wherein, k mod 6=1.Through after the interweaving of two interleavers, read bit from two interleavers successively and merge output, be specially v k, v k+1and v k+2from the first interleaver, v k+3, v k+4and v k+5from the second interleaver.Processing can fully interweave 2 continuous bits to come equally like this, thereby has obtained the gain that interweaves preferably between 2 bits of correspondence on constellation point while making the 4PAM modulation.
In the present embodiment, whether identically do not limit the pattern that interweaves that the first interleaver and the second interleaver adopt.
The present embodiment is not confined under the 4PAM modulation system, as long as this setting bit is greater than or equal to a bit that constellation point is corresponding in the planisphere shone upon.For example, under the 4PAM modulation system, corresponding 2 bits of constellation point, this setting bit should be greater than or equal to 2.
Embodiment tri-
While being interweaved under with the 4PAM modulation system, can also adopt following interleaving scheme: adopt the interleaver that two identical sizes are R2 * 30, wherein R2 is for meeting smallest positive integral.The input bit sequence was cut apart in twos before each interleaver of input, entered successively two interleavers.U kenter the first interleaver, u k+1enter the second interleaver, wherein k mod 2=1.Through after the interweaving of two interleavers, two bits of take are merged from two interleavers outputs respectively as one group.
Take a bit sequence that length is 60, its index is followed successively by: 1, 2, ..., 60, while adopting 4PAM, during the technical scheme that adopts the present embodiment to provide, index is { 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, the sequence of 59} enters the first interleaver, index is { 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, the bit of 60} enters the second road interleaver.
If two interleavers all pattern that interweaves shown in employing table 7 are interweaved, so through after the interweaving of first via interleaver, the corresponding index of output bit is: { 1, 41, 21, 11, 31, 51, 7, 27, 47, 17, 37, 57, 3, 23, 43, 13, 33, 53, 9, 29, 49, 39, 19, 59, 25, 5, 15, 45, 55, 35}, through after the interweaving of the second road interleaver, the corresponding index of output bit is: { 2, 42, 22, 12, 32, 52, 8, 28, 48, 18, 38, 58, 4, 24, 44, 14, 34, 54, 10, 30, 50, 40, 20, 60, 26, 6, 16, 46, 56, 36}.
Due in the present embodiment, the two-way interleaver be take respectively two bits and is merged as one group of output, , the index of the bit sequence obtained after the output bit of two interleavers is merged is: { 1, 41, 2, 42, 21, 11, 22, 12, 31, 51, 32, 52, 7, 27, 8, 28, 47, 17, 48, 18, 37, 57, 38, 58, 3, 23, 4, 24, 43, 13, 44, 14, 33, 53, 34, 54, 9, 29, 10, 30, 49, 39, 50, 40, 19, 59, 20, 60, 25, 5, 26, 6, 15, 45, 16, 46, 55, 35, 56, 36}.
Visible, in above-mentioned example, by take two bits, as one group, from the output of two interleavers, merged respectively, 2 continuous bits are fully interweaved and come.When specific implementation, be not limited to and take two bits as one group, also can take two above bits as one group, the bit number in actual a group can be set as required.For example, three bits of also can take are merged from two interleaver outputs respectively as one group, same two interleavers of take in above-mentioned example are example, the pattern that interweaves shown in same employing table 7 is interweaved, so, take three bits when one group is merged from the output of two interleavers respectively, the index of the bit sequence obtained after the output bit of two interleavers is merged is: { 1, 41, 21, 2, 42, 22, 11, 31, 51, 12, 32, 52, 7, 27, 47, 8, 28, 48, 17, 37, 57, 18, 38, 58, 3, 23, 43, 4, 24, 44, 13, 33, 53, 14, 34, 54, 9, 29, 49, 10, 30, 50, 39, 19, 59, 40, 20, 60, 25, 5, 15, 26, 6, 16, 45, 55, 35, 46, 56, 36}, visible, similarly, take three bits when one group is merged from the output of two interleavers respectively, also 2 continuous bits fully can be interweaved and come.
In the present embodiment, be not limited to the situation that only adopts two interleavers, these two or more interleavers can adopt two or more interleavers, as long as be take two or more bits and merged from the output of each interleaver respectively as one group.And the output sequence of this each interleaver is output successively not necessarily, also can sequentially be exported with setting, that is, the output bit can be both: V k, V k+1, V k+2, V k+3be perhaps: V k, V k+3, V k+1, V k+2deng, but in the present embodiment, this sequentially should not be V k, V k+2, V k+1, V k+3, otherwise lost, take two or more bits in the present embodiment as one group of meaning of being merged of output.
Adopt the present embodiment technical scheme, equally, after merging obtains bit sequence, bit sequence after this merging is mapped on planisphere, because 2 continuous bits have interweaved out fully, therefore, when the bit sequence by after this merging is mapped on planisphere, during the 4PAM modulation, on constellation point, between 2 bits of correspondence, obtained the gain that interweaves preferably.
The present embodiment is not confined under the 4PAM modulation system, as long as the bit number in every group is greater than or equal to a bit that constellation point is corresponding in the planisphere shone upon.For example, under the 4PAM modulation system, corresponding 2 bits of constellation point, the bit number in every group should be greater than or equal to 2.
Embodiment tetra-
Interlaced device in the present embodiment, as shown in Figure 2, comprise interleaver and configuration module, wherein:
Configuration module, be used to interleaver to configure two or more patterns that interweaves;
Interleaver, for adopt respectively these two or more interweave pattern to the input data carry out interlace operation.
This configuration module, when specific implementation, can be arranged in interleaver and also can be arranged on the interleaver outside.
In this configuration module, can comprise the second memory cell, for save as two or more patterns that interweave of interleaver configuration simultaneously.
But interweave pattern and the storage overhead that brings in order to reduce storage, in this interlaced device, save as this two or more pattern that interweaves in the time of can be different, but only preserve one of them pattern that interweaves, therefore, this configuration module can comprise the first memory cell and dispensing unit, wherein:
The first memory cell, for saving as this interleaver configuration first pattern that interweaves;
Dispensing unit, generate the different with it patterns that interweaves and configure to this interleaver for first pattern that interweaves of preserving according to the first memory cell.
This interlaced device can comprise two or more interleavers, wherein:
Configuration module configures two or more patterns that interweaves for one of them interleaver, and is defined as the pattern that interweaves of another or the configuration of a plurality of interleaver according to the pattern that interweaves for the configuration of this interleaver.
Because the interlaced device in the present embodiment can be applied in the HARQ transmitting procedure, therefore, interlaced device can comprise the 3rd memory cell, for preserving HARQ redundancy versions and this two or more mapping relations of interweaving between pattern;
This interleaver is determined corresponding redundancy versions according to RSN, according to this redundancy versions, determines that the pattern that interweaves accordingly carries out interlace operation.
Correspondence utilizes RSN and the mapping relations of the drawing indexing that interweaves to determine the situation of the pattern that interweaves, and this interlaced device can comprise the 4th memory cell, for preserving RSN and this two or more mapping relations of interweaving between pattern;
This interleaver determines that according to RSN the pattern that interweaves accordingly carries out interlace operation.
Embodiment five
The embodiment of the present invention five provides another interlaced device, and as shown in Figure 3, comprise and cut apart module, merging module and two or more interleavers, wherein:
Cut apart module, for according to setting bitslicing input data, also exporting to respectively two or more interleavers;
Interleaver, for carrying out interlace operation and the bit sequence after interweaving exported to the merging module the input data;
Merge module, for according to this setting bit, the bit sequence of two or more interleaver outputs being merged.
This device can also comprise mapping block, for the bit sequence that will merge module output, is mapped to planisphere.
This device can also comprise control module, and for obtaining this setting bit, this setting bit is greater than or equal to a bit that constellation point is corresponding in this planisphere, and this setting bit is exported to and merged module and cut apart module.
This merging module can also sequentially be merged the bit sequence of described interleaver output according to setting.
Embodiment six
The embodiment of the present invention six provides another interlaced device, and as shown in Figure 4, comprise two or more interleavers and merge module, wherein:
Interleaver, for carrying out interlace operation and the bit sequence after interweaving exported to the merging module the input data;
Merge module, take two or more bits for the bit sequence of interleaver output and merged as one group.
This device can also comprise mapping block, for the bit sequence that will merge module output, is mapped to planisphere.
This merging module can also sequentially be merged the bit sequence of interleaver output according to setting.
In sum, the technical scheme that adopts the present embodiment to provide, can improve the felt properties of interleaving process.
In one embodiment, a kind of method of data interlacing comprises:
The data that to set successively bit are inputted respectively two or more interleavers and are interweaved, and described setting bit is two or more bits; And the bit sequence of described interleaver output is merged.
In one embodiment, the bit sequence after described merging is mapped on planisphere.
In one embodiment, described setting bit is greater than or equal to a bit that constellation point is corresponding in described planisphere.
In one embodiment, described interlace operation carries out under 4PAM pulse amplitude modulation mode.
In one embodiment, the described data that will set successively bit are inputted respectively two or more interleavers and interweaved and specifically comprise: the bit that is k and k+1 by index is inputted the first interleaver, the bit that index is k+2 and k+3 is inputted the second interleaver, wherein, k is the natural number divided by more than 41.
In one embodiment, a kind of method of data interlacing comprises:
Data are inputted respectively to two or more interleavers to be interweaved; And take two or more bits is merged from the output of described interleaver respectively as one group.
In one embodiment, the bit sequence after described merging is mapped on planisphere.
In one embodiment, the bit number in described a group is greater than or equal to a bit that constellation point is corresponding in described planisphere.
In one embodiment, described interlace operation carries out under 4PAM pulse amplitude modulation mode.
In one embodiment, provide a kind of interlaced device, described interlaced device comprises cuts apart module, merging module and two or more interleavers, wherein:
The described module of cutting apart, for also exporting to respectively described two or more interleavers according to setting bitslicing input data;
Described interleaver, for carrying out interlace operation and the bit sequence after interweaving exported to described merging module the input data;
Described merging module, merged for the bit sequence by described two or more interleaver outputs.
In one embodiment, described device also comprises mapping block, for the bit sequence by described merging module output, is mapped to planisphere.
In one embodiment, described device also comprises control module, and for obtaining described setting bit, described setting bit is greater than or equal to a bit that constellation point is corresponding in described planisphere.
In one embodiment, described interlaced device comprises two or more interleavers and merging module, wherein:
Described interleaver, for carrying out interlace operation and the bit sequence after interweaving exported to described merging module the input data;
Described merging module, take two or more bits for the bit sequence of described interleaver output and merged as one group.
In one embodiment, described device also comprises mapping block, for the bit sequence by described merging module output, is mapped to planisphere.
In one embodiment, provide a kind of deinterleaving method of data, comprise the following steps:
Be that an interleaver configures two or more patterns that interweaves; And
Described interleaver adopt respectively described two or more interweave pattern to the input data carry out interlace operation.
In one embodiment, describedly for configuring two or more patterns that interweave, interleaver specifically comprises: be first described interleaver configuration first pattern that interweaves, and generate the different with it patterns that interweaves and configure to described interleaver according to this first pattern that interweaves.
In one embodiment, the pattern that interweaves of described generation comprises a kind of or its combination in any in following three kinds of patterns that interweave:
This first pattern that interweaves is carried out backward and arranges the pattern that interweaves obtain;
First this first pattern that interweaves is carried out to the backward arrangement, then the pattern that interweaves that obtains of the first half of the pattern that interweaves after backward is arranged and latter half exchange;
This first first half and latter half that interweaves pattern is exchanged to the pattern that interweaves obtained.
In one embodiment, in the pattern that respectively interweaves, the data definition that initial position is identical is to different target locations.
In one embodiment, be defined as the pattern that interweaves of another or the configuration of a plurality of interleaver according to the pattern that interweaves for the configuration of described interleaver.
In one embodiment, configure two or more interleavers and adopting the different patterns that interweaves in once transmitting.
In one embodiment, described interlace operation carries out in mixed automatic retransfer request HARQ transmitting procedure.
In one embodiment, set up HARQ redundancy versions and the described mapping relations that two or more interweave between pattern; When carrying out transfer of data, determine corresponding redundancy versions according to re-transmission sequence number RSN, determine that according to this redundancy versions the pattern that interweaves accordingly carries out interlace operation.
In one embodiment, set up RSN and the described mapping relations that two or more interweave between pattern; When carrying out transfer of data, according to RSN, determine that the pattern that interweaves accordingly carries out interlace operation.
In one embodiment, provide a kind of interlaced device, described interlaced device comprises an interleaver and configuration module, wherein:
Described configuration module, be used to described interleaver to configure two or more patterns that interweaves;
Described interleaver, for adopt respectively described two or more interweave pattern to the input data carry out interlace operation.
In one embodiment, described configuration module also comprises the first memory cell and dispensing unit, wherein:
Described the first memory cell, for saving as described interleaver configuration first pattern that interweaves;
Described dispensing unit, generate the different with it patterns that interweaves and configure to described interleaver for first pattern that interweaves of preserving according to described the first memory cell.
In one embodiment, described configuration module also comprises the second memory cell, for save as two or more patterns that interweave of described interleaver configuration simultaneously.
In one embodiment, described interlaced device comprises two or more interleavers, wherein:
Described configuration module configures two or more patterns that interweaves for one of them interleaver, and is defined as the pattern that interweaves of another or the configuration of a plurality of interleaver according to the pattern that interweaves for the configuration of described interleaver.
In one embodiment, described interlaced device comprises the 3rd memory cell, for preserving mixed automatic retransfer request HARQ redundancy versions and the described mapping relations that two or more interweave between pattern;
Described configuration module is determined corresponding redundancy versions according to re-transmission sequence number RSN, and determines according to this redundancy versions the pattern that interweaves accordingly.
In one embodiment, described interlaced device comprises the 4th memory cell, for preserving RSN and the described mapping relations that two or more interweave between pattern;
Described configuration module determines according to RSN the pattern that interweaves accordingly.
Obviously, those skilled in the art can carry out various changes and modification and not break away from the spirit and scope of the present invention the present invention.Like this, if within of the present invention these are revised and modification belongs to the scope of the claims in the present invention and equivalent technologies thereof, the present invention also is intended to comprise these changes and modification interior.

Claims (15)

1. the deinterleaving method of data, is characterized in that, comprises the following steps:
Cut apart module according to setting bitslicing input data and exporting to respectively two or more interleavers, described interleaver configures two or more patterns that interweaves, described two or more interweave pattern for described interleaver adopt respectively described two or more interweave pattern to the input data carry out interlace operation;
Described two or more interleavers carry out interlace operation and the bit sequence after interweaving are exported to the merging module the input data;
Merging module is merged the bit sequence of two or more interleaver outputs according to this setting bit.
2. the method for claim 1, is characterized in that, described interleaver configures two or more patterns that interweaves, and specifically comprises:
Be first described interleaver configuration first pattern that interweaves, and interweave that pattern generates and the described first different pattern that interweaves of pattern that interweaves according to described first, configure described generation for described interleaver from the described first different pattern that interweaves of pattern that interweaves.
3. method as claimed in claim 2, is characterized in that, described generation comprise a kind of or its combination in any in following three kinds of patterns that interweave from the described first different pattern that interweaves of pattern that interweaves:
Described first pattern that interweaves is carried out backward and arranges the pattern that interweaves obtain;
First described first pattern that interweaves is carried out to the backward arrangement, then the pattern that interweaves that obtains of the first half of the pattern that interweaves after backward is arranged and latter half exchange;
This first first half and latter half that interweaves pattern is exchanged to the pattern that interweaves obtained.
4. as the described method of arbitrary claim in claims 1 to 3, it is characterized in that, in the pattern that respectively interweaves, the identical data definition of initial position is in different target locations.
5. as the described method of arbitrary claim in claims 1 to 3, it is characterized in that, be defined as the pattern that interweaves of another or other a plurality of interleaver configurations according to the pattern that interweaves for the configuration of described interleaver.
6. method as claimed in claim 5, is characterized in that, configures two or more interleavers and adopting the different patterns that interweaves in once transmitting.
7. as the described method of arbitrary claim in claims 1 to 3, it is characterized in that, described interlace operation carries out in mixed automatic retransfer request HARQ transmitting procedure.
8. method as claimed in claim 7, is characterized in that, described method also comprises:
Set up HARQ redundancy versions and the described mapping relations that two or more interweave between pattern;
Described two or more interweave pattern for described interleaver adopt respectively described two or more interweave pattern to the input data carry out interlace operation, comprising:
Described two or more pattern that interweaves is determined corresponding redundancy versions for described interleaver according to re-transmission sequence number RSN, according to described redundancy versions, determines that described two or more pattern that interweaves carries out interlace operation.
9. method as claimed in claim 7, is characterized in that, described method also comprises:
Set up RSN and the described mapping relations that two or more interweave between pattern;
Described two or more interweave pattern for described interleaver adopt respectively described two or more interweave pattern to the input data carry out interlace operation, comprising:
Described two or more pattern that interweaves determines that according to RSN described two or more pattern that interweaves carries out interlace operation for described interleaver.
10. the device for interweaving, is characterized in that, comprising:
Configuration module, be used to an interleaver to configure two or more patterns that interweaves, described two or more interweave pattern for described interleaver adopt respectively described two or more interweave pattern to the input data carry out interlace operation;
Described device also comprises:
Cut apart module, for according to setting bitslicing input data, also exporting to respectively two or more described interleavers;
Described interleaver, for carrying out interlace operation and the bit sequence after interweaving exported to the merging module the input data;
Merge module, for according to this setting bit, the bit sequence of two or more described interleaver outputs being merged.
11. device, is characterized in that as described in claim 10, described configuration module comprises the first memory cell and dispensing unit, wherein:
Described the first memory cell, for saving as first of the described interleaver configuration pattern that interweaves;
Described dispensing unit, generate the different with it patterns that interweaves and configure to described interleaver for first pattern that interweaves of preserving according to described the first memory cell.
12. device, is characterized in that as described in claim 10, described configuration module comprises the second memory cell and dispensing unit,
Described the second memory cell, for save as two or more patterns that interweave of described interleaver configuration simultaneously;
Described dispensing unit is two or more patterns that interweave that described interleaver configures for two or more patterns that interweave for described interleaver configuration of preserving according to described the second memory cell.
13. as the described device of arbitrary claim in claim 10-12, it is characterized in that,
Described configuration module also is defined as the pattern that interweaves of another or the configuration of a plurality of interleaver for the pattern that interweaves according to for the configuration of described interleaver.
14. as the described device of arbitrary claim in claim 10-12, it is characterized in that,
Described configuration module is mixed automatic retransfer request HARQ redundancy versions and the described mapping relations that two or more interweave between pattern for preserving according to the 3rd memory cell also, and re-transmission sequence number RSN determines corresponding redundancy versions, and determine according to this redundancy versions the pattern that interweaves accordingly.
15. as the described device of arbitrary claim in claim 10-12, it is characterized in that,
Described configuration module is RSN and the described mapping relations that two or more interweave between pattern for preserving according to the 4th memory cell also, and determine according to re-transmission sequence number RSN the pattern that interweaves accordingly.
CN 201110218453 2007-03-14 2007-03-14 Data interleaving method and apparatus thereof Active CN102227104B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 201110218453 CN102227104B (en) 2007-03-14 2007-03-14 Data interleaving method and apparatus thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 201110218453 CN102227104B (en) 2007-03-14 2007-03-14 Data interleaving method and apparatus thereof

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
CN2007100868372A Division CN101242234B (en) 2007-02-07 2007-03-14 Data interweaving method and device

Publications (2)

Publication Number Publication Date
CN102227104A CN102227104A (en) 2011-10-26
CN102227104B true CN102227104B (en) 2013-12-18

Family

ID=44808063

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 201110218453 Active CN102227104B (en) 2007-03-14 2007-03-14 Data interleaving method and apparatus thereof

Country Status (1)

Country Link
CN (1) CN102227104B (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1812305A (en) * 2005-01-28 2006-08-02 华为技术有限公司 Interleaving method for reducing interference by synchronous channel signal
WO2006095877A1 (en) * 2005-03-11 2006-09-14 Matsushita Electric Industrial Co., Ltd. Mimo transmitting apparatus, and data retransmitting method in mimo system
WO2006104104A1 (en) * 2005-03-29 2006-10-05 Matsushita Electric Industrial Co., Ltd. Mimo transmitting apparatus, mimo receiving apparatus, and retransmitting method

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1496633A4 (en) * 2002-04-12 2010-10-20 Panasonic Corp Multi-carrier communication device and multi-carrier communication method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1812305A (en) * 2005-01-28 2006-08-02 华为技术有限公司 Interleaving method for reducing interference by synchronous channel signal
WO2006095877A1 (en) * 2005-03-11 2006-09-14 Matsushita Electric Industrial Co., Ltd. Mimo transmitting apparatus, and data retransmitting method in mimo system
WO2006104104A1 (en) * 2005-03-29 2006-10-05 Matsushita Electric Industrial Co., Ltd. Mimo transmitting apparatus, mimo receiving apparatus, and retransmitting method

Also Published As

Publication number Publication date
CN102227104A (en) 2011-10-26

Similar Documents

Publication Publication Date Title
CN1572067B (en) Method and apparatus implementing retransmission in a communication system providing h-arq
CN1427568B (en) Wireless receiving/transmitting apparatus and method for effectively repeating high-speed information pocket data
CN105515719B (en) A kind of data transmission method and device
US9071402B2 (en) Selection of retransmission settings for HARQ in WCDMA and LTE networks
CN100393011C (en) Equipment and method for transmitting and receiving data in CDMA mobile communication system
CN101867443B (en) Rate matching method and device
CN101183919B (en) Self-adaptive mixture automatic request retransmission method
CN101217352B (en) A buffering setting method of phase rate matching
CN101765992A (en) Methods and apparatus for rate matching to improve hybrid arq operations
KR20020096197A (en) Method and apparatus for transmitting and receiving in cdma mobile communication system
KR20060053180A (en) A multiplexing scheme for unicast and broadcast/multicast traffic
CN101442383B (en) Bit priority mapping method for high-step modulation
US7210089B2 (en) Communication system employing turbo codes and a hybrid automatic repeat request scheme
JP2012501568A (en) Symbol mapping apparatus and method
CN108400844A (en) Method, apparatus, communication equipment and the communication system of information processing
CN101699781A (en) Encoding method and device of correct/error response message and rank indication singling
CN100578998C (en) High-speed descending sharing channel coding multiplexing method and system
CN1855802B (en) Memory efficient streamlined transmitter with a multiple instance hybrid arq
CN101242234B (en) Data interweaving method and device
CN101267211A (en) Data interweaving method and device
CN101047482B (en) Mixed automatic retransmission requiring method based on decode reliability
CN101621363B (en) Bit reordering method between multiple symbols and system using same
CN101931490B (en) Feedback signal coding method and device
CN101237440B (en) A data interweaving method and device
CN1925382B (en) Method for mixing automatic request retransmission

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
EE01 Entry into force of recordation of patent licensing contract

Application publication date: 20111026

Assignee: Apple Computer, Inc.

Assignor: Huawei Technologies Co., Ltd.

Contract record no.: 2015990000755

Denomination of invention: Data interweaving method and device

Granted publication date: 20131218

License type: Common License

Record date: 20150827

LICC Enforcement, change and cancellation of record of contracts on the licence for exploitation of a patent or utility model