CN102221642A - Power factor sampling method and power factor compensation equipment - Google Patents
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Abstract
The invention relates to a power factor sampling method and power factor compensation equipment, which aims at solving the problem of larger deviation on power factor parameter detection when a larger higher harmonic component exists in a power grid. The power factor compensation equipment comprises a microprocessor as well as a signal sampling circuit, a display circuit and a drive circuit connected with the microprocessor. The invention is not interfered by harmonic waves, does not need the support of a voltage synchronizing signal, can work stably, can additionally obtain the harmonic components of voltages and currents without complex Fourier calculation, and has extremely simple hardware circuits and a low cost.
Description
Technical field
The present invention relates to power equipment and make the field, in particular, the invention relates to a kind of power factor method of sampling and the power factor compensation equipment that improve the electrical network quality.
Background technology
Power factor (PF) Sampling techniques in the power factor of electric network controller have experienced two stages at present, at Power Electronic Technique mezzanine level still, the mains by harmonics problem is not obvious, the quality of power supply is better, the wave form distortion of current/voltage is generally less, the Sampling techniques of power factor are also comparatively simple, and the zero phase difference of crossing that promptly detects the voltage and current signal directly calculates; Development along with Power Electronic Technique, large power power electronic appliance is widely applied in the electrical network, harmonic problem is also serious day by day, the voltage and current cycle signal zero-cross point is subjected to harmonic interference also obvious day by day, cause traditional detection method can not accurately sample real power factor, go out another kind of detection means at this stage development, promptly respectively to the disperse A/D conversion of voltage and current signal, gather the voltage and current signal a cycle inter-sync, be divided into the N point, the real effective of calculating voltage and electric current calculates power factor accurately by COS=P/S respectively; But still there are some problems here, the one, the N point sampling is based on the frequency sampling of voltage synchronizing signal, but be subjected to harmonic interference, frequency sampling is influenced, the remote effect device stability, the 2nd, on the judgement lead-lag, there is certain complicacy, because the voltage and current signal need be carried out low-pass filtering treatment, filtering harmonic components is wherein judged the phase relation between signal more respectively, and low pass must cause departing from of signal phase difference after handling, and influences the error that power factor is calculated conversely.
Patent Office of the People's Republic of China discloses a CN101459339A document on June 17th, 2009, name is called power factor compensating controller, and this controller comprises power circuit, electric current and voltage sample circuit, CPU treatment circuit, LED display circuit, compensation controlling output circuit, switching value imput output circuit, RS485 communicating circuit; The voltage signal of electric current and voltage sample circuit sampling and current signal are after the A/D digital-to-analog conversion, the quantized value of output temperature signal in the switching value signal of switching value imput output circuit input and screen is sent to the CPU treatment circuit and handles, handle the back output voltage, electric current, frequency, active power, reactive power, meritorious harmonic wave percentage amounts, power factor, temperature signal is sent to other external unit by the RS485 communicating circuit, and the CPU treatment circuit also carries out the external compensation capacitor switching by switching value imput output circuit output external capacitive cabinet inner blower control signal and by the compensation controlling output circuit.The shortcoming of this controller is that the power factor value of detection has bigger deviation when there is big higher hamonic wave composition in electrical network, thus cause power factor compensation than large deviation, also more complicated of equipment simultaneously, cost is higher.
Summary of the invention
The present invention makes the power factor parameter detecting that problem than large deviation is arranged when there is big higher hamonic wave composition in electrical network in order to solve, a kind of power factor method of sampling is provided, and the equipment of realizing power factor compensation with this method is provided, can overcome the deviation that power factor detects with simple hardware device.
The technical solution adopted for the present invention to solve the technical problems is: a kind of power factor method of sampling of the present invention comprises the steps:
A. obtain current signal I from electrical network, voltage signal U;
B. be that 1 sine wave signal M multiplies each other with I, U signal respectively and obtains I1, U1 signal with amplitude;
C. with after I1, the U1 signal two rank low-pass filtering again 2 times of gain amplifiers obtain IP1, UP1 signal;
D. IP1, UP1 signal are multiplied each other with M respectively again and obtain IP, UP signal;
E. with amplitude be 1, multiplying each other with I, U signal respectively with the sine wave signal N of M phase differential 90 degree obtains I2, U2 signal;
F. with after I2, the U2 signal two rank low-pass filtering again 2 times of gain amplifiers obtain IQ1, UQ1 signal;
G. IQ1, UQ1 signal are multiplied each other with N respectively again and obtain IQ, UQ signal;
H. IP and IQ addition are obtained the IJB signal, UP and UQ addition are obtained the UJB signal;
I. calculate Ф I=arctg (IQ1/IP1), Ф U=arctg (UQ1/UP1); Ф U-Ф I is the phase differential of first-harmonic between power network current I, two signals of voltage U;
J. calculate IC=(I2-IJB
2)
1/2, UC=(U2-UJB
2)
1/2IC, UC are the harmonic component of power network current I, two signals of voltage U.
General Sampling techniques are based on the synchronizing signal of voltage zero-cross, start the A/D conversion when voltage zero-cross, and this method is to be benchmark X-axis (being Ф u=0) with the voltage signal, as previously mentioned, because the existence of harmonic wave makes voltage zero-crossing signal be interfered; In order to address this problem, a kind of method should be sought and the A/D conversion can be allowed to start at any time, and do not need the support of zero cross signal, this method is to be the benchmark X-axis with arbitrarily angled, the voltage and current signal on X-Y plane also with arbitrarily angled rotation, different with the computing method of common COS=P/S, this method is that the phase differential (Ф u-Ф i) that extracts voltage and current first-harmonic composition is the basis, except the real effective that obtains power factor and electric current and voltage, also can additionally obtain the harmonic component value of voltage and current, calculate and need not to carry out complicated Fourier in CPU inside; Be analyzed as follows:
With arbitrarily angled is benchmark X-axis (being to start the A/D sampling any time), and line voltage u can be decomposed into:
--------------in the formula of-----(1): up is the component of fundamental voltage on X-axis to u=up+uq+uh; Uq is the component of fundamental voltage on Y-axis; Uh is a harmonic voltage.Formula (1) can be expressed as with fourier progression expanding method:
U=
=
UP1cos (ω t+ Ф u)+UQ1sin (ω t+ Ф u)+
--------------UP1 and UQ1 are respectively the amplitude of the component of voltage fundamental on X, Y-axis in the formula of----(2); Formula (2) both sides can get with multiply by cos ω t
ucosωt=?
(1+cos2ωt)+
sin2ωt+
{cos[(n+1)?ωt+Фn]+cos[(n-1)?ωt+Фn]} ----------------(3)
We can obtain the component up amplitude UP1 of fundamental voltage on X-axis half from formula (3).With the alternating component in the low pass filter filters out formula (3), with one times of gain expansion, just obtain UP1, multiply by standard cosine signal cos ω t again, can obtain up:
up=UP1cosωt -------------------(4)
Formula (2) both sides can get with multiply by sin ω t
usinωt=?
sin2ωt+
(1-cos2ωt)+
Sin[(n+1) ω t+ Ф n]-sin[(n-1) ω t+ Ф n]------------we can obtain the component uq amplitude UQ1 of fundamental voltage on Y-axis half from formula (5) in----(5).With the alternating component in the low pass filter filters out formula (5), with one times of gain expansion, just obtain UQ1, multiply by standard sine signal sin ω t again, can obtain uq:
uq=UQ1sinωt -------------------(6)
And then can obtain harmonic voltage:
uh=u-(up+uq) --------------------(7)
The processing current signal uses the same method:
--------------in the formula of-----(8): ip is the component of fundamental current on X-axis to i=ip+iq+ih; Iq is the component of fundamental current on Y-axis; Ih is a harmonic current.Formula (8) can be expressed as with fourier progression expanding method:
I=
=
IP1cos (ω t+ Ф i)+IQ1sin (ω t+ Ф i)+
--------------IP1 and IQ1 are respectively the amplitude of the component of current first harmonics on X, Y-axis in the formula of----(9); Formula (9) both sides can get with multiply by cos ω t
icosωt=?
(1+cos2ωt)+
sin2ωt+
{cos[(n+1)?ωt+Фn]+cos[(n-1)?ωt+Фn]} ----------------(10)
We can obtain the component ip amplitude IP1 of fundamental current on X-axis half from formula (10).With the alternating component in the low pass filter filters out formula (10), with one times of gain expansion, just obtain IP1, multiply by standard cosine signal cos ω t again, can obtain ip:
ip=IP1cosωt -------------------(11)
Formula (9) both sides can get with multiply by sin ω t
isinωt=?
sin2ωt+
(1-cos2ωt)+
iq=IQ1sinωt -------------------(13)
And then can obtain harmonic current:
ih=i-(ip+iq) --------------------(14)
Can obtain voltage signal U, current signal I respectively from voltage transformer (VT), Current Transformer Secondary side thus, M, N are 90
0Phase differential, amplitude are 1 orthogonal sinusoidal wave signal, need not requirement and voltage or electric current same-phase; The voltage and current signal processing flow is the same, is that example describes with the electric current:
Current signal I and M multiply each other, and through obtaining the identical direct current signal IP1 of first-harmonic X-axis component peak value with I behind second-order low-pass filter and the 2 times of gain amplifiers, itself and M signal multiply each other once more and obtain the component waveform IP of I in X-axis; In like manner can get I component waveform IQ and its corresponding IQ1 in Y-axis, IP and IQ addition promptly get the fundamental waveform IJB of I;
In like manner can get UP1, UQ1 and the fundamental waveform UJB of voltage signal U.Because IJB and UJB are the power frequency component that does not contain harmonic components, the method of computing is just easy to be many, arctangent computation by IP1 and IQ1 can obtain the phasing degree Ф I of IJB on X-Y plane, be Ф I=arctg (IQ1/IP1), in like manner can obtain the phasing degree Ф U of UJB on X-Y plane, Ф U=arctg (UQ1/UP1); Ф U-Ф I is the phase differential of first-harmonic between two signals, has also just obtained power factor value accurately; Vector plot as shown in Figure 1.
Secondly, (7) and (14) formula of using is easy to obtain the harmonic component of electric current and voltage, need not to calculate through Fourier.
The invention provides the equipment of realizing power factor compensation with this method, comprise microprocessor and the signal sample circuit, display circuit, the driving circuit that link to each other with microprocessor.Sample circuit is responsible for obtaining voltage, current signal from electrical network, and carries out Signal Pretreatment; The signal that microprocessor is finished dealing with sample circuit is done further to calculate according to method provided by the present invention, can obtain the parameter values such as harmonic component of power factor of electric network, voltage, electric current; Display circuit will be sampled, result of calculation shows; Microprocessor compensates the input or the excision of capacitor according to sampling, result of calculation control Driver Circuit.
As preferably, microprocessor is a C8051F410 type microprocessor.C8051F410 type microprocessor has stable performance, cheap advantage.
As preferably, sample circuit comprises operational amplifier A, operational amplifier B, operational amplifier C; Input+the end of operational amplifier A links to each other with power network current sampled signal I by resistance R 1, and the input-end of operational amplifier A links to each other with the output terminal of operational amplifier A, and the output terminal of operational amplifier A links to each other with C8051F410 type microprocessor P1.0 end; Input+end of operational amplifier B links to each other with line voltage sampled signal U by resistance R 2, and input-end of operational amplifier B links to each other with the output terminal of operational amplifier B, and the output terminal of operational amplifier B links to each other with C8051F410 type microprocessor P1.1 end; Input+end of operational amplifier C links to each other with C8051F410 type microprocessor REF end, input-end of operational amplifier C links to each other with the output terminal of operational amplifier C, the output terminal of operational amplifier C links to each other with the input+end of operational amplifier A by the parallel circuit of capacitor C1, resistance R 3, the output terminal of operational amplifier C links to each other with input+end of operational amplifier B by the parallel circuit of capacitor C2, resistance R 4, and the output terminal of operational amplifier C links to each other with ground by capacitor C3.What sample circuit was obtained from electrical network is AC signal, and microprocessor can only receive direct current signal, draws the reference source voltage signal as the direct current biasing signal from the REF pin of microprocessor for this reason; Operational amplifier A, B, C be as signal follower, and the parallel circuit of the parallel circuit of capacitor C1, resistance R 3 and capacitor C2, resistance R 4 can remove burr in the signal as low-pass filter circuit.
As preferably, operational amplifier A, operational amplifier B, operational amplifier C are LM324A type operational amplifiers.LM324A type operational amplifier can be easily from market purchasing to, cheap.
As preferably, display circuit comprises CH452 type eight segment encode display driver chips and the eight segment encode displays that link to each other with CH452 type eight segment encode display driver chips, and DCLK, the DIN of CH452 type eight segment encode display driver chips, LOAD pin link to each other with P2.4, P2.5, the P2.6 pin of C8051F410 type microprocessor respectively.
As preferably, driving circuit is a relay, and the coil of relay links to each other with the digital output end of C8051F410 type microprocessor, and the contact of relay links to each other with the contactor of switching building-out capacitor.
As preferably, relay has 12, and the coil of each relay links to each other with the digital output end P0.0-P0.7 and the P1.4-P1.7 of C8051F410 type microprocessor respectively, and the contact of each relay links to each other with the contactor of each switching building-out capacitor.
The invention has the beneficial effects as follows: power factor is calculated and the judgement of lead-lag is undertaken by the voltage and current fundametal compoment, is not subjected to harmonic interference; Do not need the support of voltage synchronizing signal, working stability; The additional harmonic component that can obtain voltage and current, and do not need to calculate through complicated Fourier; Hardware circuit is very simplified, and is with low cost.
Description of drawings
Fig. 1 is a kind of vector plot of the present invention;
Fig. 2 is a kind of electrical schematic diagram of power factor compensation equipment of the present invention.
Among the figure: 1. C8051F410 type microprocessor, 2. sample circuit, 3. display circuit, 4. driving circuit, 5.CH452 type eight segment encode display driver chips, 6. eight segment encode displays.
Embodiment
Below by specific embodiment, and in conjunction with the accompanying drawings technical scheme of the present invention is described in further detail.
Embodiment:
A kind of power factor method of sampling of present embodiment may further comprise the steps:
K. obtain current signal I from electrical network, voltage signal U;
L. be that 1 sine wave signal M multiplies each other with I, U signal respectively and obtains I1, U1 signal with amplitude;
M. with after I1, the U1 signal two rank low-pass filtering again 2 times of gain amplifiers obtain IP1, UP1 signal;
N. IP1, UP1 signal are multiplied each other with M respectively again and obtain IP, UP signal;
O. with amplitude be 1, multiplying each other with I, U signal respectively with the sine wave signal N of M phase differential 90 degree obtains I2, U2 signal;
P. with after I2, the U2 signal two rank low-pass filtering again 2 times of gain amplifiers obtain IQ1, UQ1 signal;
Q. IQ1, UQ1 signal are multiplied each other with N respectively again and obtain IQ, UQ signal;
R. IP and IQ addition are obtained the IJB signal, UP and UQ addition are obtained the UJB signal;
S. calculate Ф I=arctg (IQ1/IP1), Ф U=arctg (UQ1/UP1); Ф U-Ф I is the phase differential of first-harmonic between power network current I, two signals of voltage U;
T. calculate IC=(I2-IJB
2)
1/2, UC=(U2-UJB
2)
1/2IC, UC are the harmonic component of power network current I, two signals of voltage U.
The equipment of a kind of power factor compensation of realizing with this method referring to Fig. 2, comprises C8051F410 type microprocessor 1, the sample circuit 2, display circuit 3, the driving circuit 4 that link to each other with C8051F410 type microprocessor 1; Sample circuit 2 comprises LM324A type operational amplifier A, operational amplifier B, operational amplifier C, input+the end of operational amplifier A links to each other with power network current sampled signal I by resistance R 1, input-the end of operational amplifier A links to each other with the output terminal of operational amplifier A, and the output terminal of operational amplifier A links to each other with the P1.0 end of C8051F410 type microprocessor 1; Input+end of operational amplifier B links to each other with line voltage sampled signal U by resistance R 2, and input-end of operational amplifier B links to each other with the output terminal of operational amplifier B, and the output terminal of operational amplifier B links to each other with the P1.1 end of C8051F410 type microprocessor 1; Input+end of operational amplifier C links to each other with the REF end of C8051F410 type microprocessor 1, input-end of operational amplifier C links to each other with the output terminal of operational amplifier C, the output terminal of operational amplifier C links to each other with the input+end of operational amplifier A by the parallel circuit of capacitor C1, resistance R 3, the output terminal of operational amplifier C links to each other with input+end of operational amplifier B by the parallel circuit of capacitor C2, resistance R 4, and the output terminal of operational amplifier C links to each other with ground by capacitor C3.
Driving circuit 4 comprises 12 auxiliary reclays, one end of the coil of each auxiliary reclay links to each other with the P0.0-P1.4 pin of C8051F410 type microprocessor 1 respectively, the other end ground connection of the coil of each auxiliary reclay, the contact of each auxiliary reclay is controlled the contactor of each switching building-out capacitor respectively.
Above embodiment is one of preferred plan of the present invention, is not that the present invention is done any pro forma restriction, also has other variant and remodeling under the prerequisite that does not exceed the technical scheme that claim puts down in writing.
Claims (8)
1. a power factor method of sampling is characterized in that: comprise the steps:
Obtain current signal I from electrical network, voltage signal U;
With amplitude is that 1 sine wave signal M multiplies each other with I, U signal respectively and obtains I1, U1 signal;
With after I1, the U1 signal two rank low-pass filtering again 2 times of gain amplifiers obtain IP1, UP1 signal;
IP1, UP1 signal multiplied each other with M respectively again obtain IP, UP signal;
With amplitude be 1, multiplying each other with I, U signal respectively with the sine wave signal N of M phase differential 90 degree obtains I2, U2 signal;
With after I2, the U2 signal two rank low-pass filtering again 2 times of gain amplifiers obtain IQ1, UQ1 signal;
IQ1, UQ1 signal multiplied each other with N respectively again obtain IQ, UQ signal;
IP and IQ addition are obtained the IJB signal, UP and UQ addition are obtained the UJB signal;
Calculate Ф I=arctg (IQ1/IP1), Ф U=arctg (UQ1/UP1); Ф U-Ф I is the phase differential of first-harmonic between power network current I, two signals of voltage U, power factor=COS (Ф U-Ф I);
Calculate IRMS=(Σ In
2/ n)
1/2, IRMS is the real effective of I, n is a sampling number; Calculate URMS=(Σ Un
2/ n)
1/2, URMS is the real effective of U, n is a sampling number;
Calculate IC=(IRMS
2-IJB
2)
1/2, UC=(URMS
2-UJB
2)
1/2IC, UC are the harmonic component of power network current I, two signals of voltage U.
2. a power factor is sampled and compensation equipment, it is characterized in that: comprise microprocessor and the signal sample circuit, display circuit, the driving circuit that link to each other with microprocessor.
3. a kind of power factor sampling according to claim 2 and compensation equipment, it is characterized in that: described microprocessor is a C8051F410 type microprocessor.
4. according to claim 2 or 3 described a kind of power factor sampling and compensation equipments, it is characterized in that: described sample circuit comprises operational amplifier (A), operational amplifier (B), operational amplifier (C); Input+the end of described operational amplifier (A) links to each other with power network current sampled signal I by resistance (R1), input-the end of described operational amplifier (A) links to each other with the output terminal of operational amplifier (A), and the output terminal of operational amplifier (A) links to each other with C8051F410 type microprocessor P1.0 end; Input+the end of described operational amplifier (B) links to each other with line voltage sampled signal U by resistance (R2), input-the end of described operational amplifier (B) links to each other with the output terminal of operational amplifier (B), and the output terminal of operational amplifier (B) links to each other with C8051F410 type microprocessor P1.1 end; Input+the end of described operational amplifier (C) links to each other with C8051F410 type microprocessor REF end, input-the end of operational amplifier (C) links to each other with the output terminal of operational amplifier (C), the output terminal of operational amplifier (C) links to each other with the input+end of operational amplifier (A) by the parallel circuit of capacitor (C1), resistance (R3), the output terminal of operational amplifier (C) links to each other with the input+end of operational amplifier (B) by the parallel circuit of capacitor (C2), resistance (R4), and the output terminal of operational amplifier (C) links to each other with ground by capacitor (C3).
5. a kind of power factor sampling according to claim 4 and compensation equipment, it is characterized in that: described operational amplifier (A), operational amplifier (B), operational amplifier (C) are LM324A type operational amplifiers.
6. according to claim 2 or 3 described a kind of power factor sampling and compensation equipments, it is characterized in that: described display circuit comprises CH452 type eight segment encode display driver chips and the eight segment encode displays that link to each other with CH452 type eight segment encode display driver chips, and DCLK, the DIN of CH452 type eight segment encode display driver chips, LOAD pin link to each other with P2.4, P2.5, the P2.6 pin of C8051F410 type microprocessor respectively.
7. according to claim 2 or 3 described a kind of power factor sampling and compensation equipments, it is characterized in that: described driving circuit is a relay, the coil of described relay links to each other with the digital output end of C8051F410 type microprocessor, and the contact of relay links to each other with the contactor of switching building-out capacitor.
8. a kind of power factor sampling according to claim 7 and compensation equipment, it is characterized in that: described relay has 12, the coil of each relay links to each other with the digital output end P0.0-P0.7 and the P1.4-P1.7 of C8051F410 type microprocessor respectively, and the contact of each relay links to each other with the contactor of each switching building-out capacitor.
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| CN108107263A (en) * | 2017-11-14 | 2018-06-01 | 武汉市路灯管理服务中心 | A kind of public lighting circuit load attribute data acquisition device and determination methods |
| CN113467320A (en) * | 2021-07-21 | 2021-10-01 | 西安龙飞电气技术有限公司 | Weak signal detection algorithm based on gain compensation |
| CN114252836A (en) * | 2021-11-23 | 2022-03-29 | 国网浙江省电力有限公司营销服务中心 | Detection method of current transformer sampling and state detection circuit |
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