CN102194972B - 发光装置封装元件 - Google Patents

发光装置封装元件 Download PDF

Info

Publication number
CN102194972B
CN102194972B CN2010102415561A CN201010241556A CN102194972B CN 102194972 B CN102194972 B CN 102194972B CN 2010102415561 A CN2010102415561 A CN 2010102415561A CN 201010241556 A CN201010241556 A CN 201010241556A CN 102194972 B CN102194972 B CN 102194972B
Authority
CN
China
Prior art keywords
light
emitting device
pad
void
base material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN2010102415561A
Other languages
English (en)
Other versions
CN102194972A (zh
Inventor
王忠裕
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yuanxin Optoelectronics Co ltd
Epistar Corp
Original Assignee
Taiwan Semiconductor Manufacturing Co TSMC Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiwan Semiconductor Manufacturing Co TSMC Ltd filed Critical Taiwan Semiconductor Manufacturing Co TSMC Ltd
Publication of CN102194972A publication Critical patent/CN102194972A/zh
Application granted granted Critical
Publication of CN102194972B publication Critical patent/CN102194972B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/483—Containers
    • H01L33/486—Containers adapted for surface mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64—Heat extraction or cooling elements
    • H01L33/647—Heat extraction or cooling elements the elements conducting electric current to or from the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48464—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area also being a ball bond, i.e. ball-to-ball
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/49105—Connecting at different heights
    • H01L2224/49107—Connecting at different heights on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00012—Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Led Device Packages (AREA)

Abstract

本发明提供一种发光装置(LED)封装元件，该封装元件包含一发光装置芯片及一承载芯片。此承载芯片包含一第一连接焊盘及一第二连接焊盘，位于此承载芯片的一表面上且以倒装芯片接合方式与此发光装置芯片接合，此承载芯片也包含一第三连接焊盘及一第四连接焊盘，位于此承载芯片的上述表面上且各自与第一连接焊盘及第二连接焊盘电性连接。此第一连接焊盘及第二连接焊盘位于承载芯片面对发光装置芯片的同侧上。此承载芯片包含至少一连接至此第一及第二连接焊盘的基材通孔。本发明的发光装置封装元件具有良好的发光效率及散热效率。

Description

发光装置封装元件
技术领域
本发明涉及发光装置(LED)封装元件，且尤其涉及一种含基材通孔(though-substrate via；TSV)的LED封装结构。
背景技术
近年来，如发光二极管(light-emitting diodes；LED)、激光二极管及紫外光光学检测器等光学装置已被广泛使用。III族的氮化物，例如氮化镓(GaN)及其相关合金，已证实适用于形成上述光学装置。III族的氮化物具有高能带间隙及高电子饱和速率，也使其成为高温与高速的功率电子装置应用中的极佳选择。
由于一般成长温度下的氮的高平衡压力，因此不容易得到氮化镓的块状结晶。因此，氮化镓膜层与各别的发光二极管通常形成于能符合氮化镓特性的其他基材上。蓝宝石(sapphire；Al2O3)为常用的基材材料。图1显示发光装置(LED)封装元件的剖面图。发光装置2包含多层形成于蓝宝石基材4上的以氮化镓为主(GaN-based)的膜层。蓝宝石基材4还装设于导线架(leadframe)6上。电极8、10透过金线12使发光装置2电性连接至导线架6。
然而，经观察，蓝宝石具有低的热传导率(thermal conductivity)。因此，由发光装置2所产生的热能无法有效地透过蓝宝石基板4逸散。反而，热能需要透过发光装置2的顶端及金线12散出。然而，既然金线12必需延伸至导线架6而长度较长，透过金线12的散热效率也不佳。此外，电极10占据了芯片区域，而导致发光装置的光输出区域未能最佳化。
发明内容
为克服上述现有技术的缺陷，本发明提供一种发光装置封装元件，包括：一发光装置芯片；以及一承载芯片，包含：一第一连接焊盘及一第二连接焊盘，位于此承载芯片的一表面上且以倒装芯片接合方式与此发光装置芯片接合；一第三连接焊盘及一第四连接焊盘，位于此承载芯片的此表面上且各自与此第一连接焊盘及此第二连接焊盘电性连接；及至少一基材通孔(TSV)，连接至此第一及此第二连接焊盘。
本发明还提供一种发光装置封装元件，包括：一散热器；一导线架，位于此散热器上，且热耦接(thermally coupled)此散热器；一承载芯片，位于此导线架上，其中此承载芯片包含复数个虚置基材通孔于其中；一第一热界面材料，位于此承载芯片及此导线架之间，其中此第一热界面材料使此导线架电性绝缘于此承载芯片中所有的虚置基材通孔；一第一连接焊盘及一第二连接焊盘，位于此承载芯片的一表面上，其中此第一连接焊盘及此第二连接焊盘打线连接至此导线架；以及一发光装置芯片，以倒装芯片接合方式接合于此承载芯片上，其中此发光装置芯片的两电极电性连接至此第一连接焊盘及此第二连接焊盘。
本发明的发光装置封装元件具有良好的发光效率及散热效率。
为让本发明的上述和其他目的、特征、和优点能还明显易懂，下文特举出优选实施例，并配合附图，作详细说明如下：
附图说明
图1显示形成于蓝宝石基材上的传统发光装置的剖面图。
图2至图6显示依照本发明的一实施例的含发光装置的封装元件于各种中间制造阶段的剖面图。
其中，附图标记说明如下：
2～发光装置 4～蓝宝石基材
6～导线架 8、10～电极
12～金线 20～基材
22～发光装置 24～未掺杂的氮化镓层
26～n型氮化镓层 28～多重量子阱
30～p型氮化镓层 32～反射板
34～顶部电极 36、40～焊料凸块
36A～虚置焊料凸块 36B～有源焊料凸块
38～连接焊盘 42～切割斜角
44～发光装置芯片 60、60’～承载晶片
62～基材 63～切割道
64～基材通孔 66～连接焊盘
66A～虚置连接焊盘 66B、66C～有源连接焊盘
68～欧姆线 72～底部填胶
74～硅胶透镜 78～导线架
79～热界面材料层 80～导线
82～散热器 84～内部空气通道
86～热界面材料 100～晶片
具体实施方式
本发明接下来将会提供许多不同的实施例以说明本发明中不同的特征。各特定实施例中的构成及配置将会在以下作详细说明以阐述本发明的精神，但这些实施例并非用于限定本发明。
本发明在此揭示一种新颖的发光装置(light-emitting device；LED)封装元件及其制造方法，并将举例本发明实施例的制造中间过程，也将讨论这些实施例的变化。在本发明各种举例的图示及实施例中，相似元件符号表示为相似元件。
图2显示为晶片100，其包含形成于基材20上的发光装置22。在一实施例中，基材20由蓝宝石(透明的Al2O3)形成，或者，也可由其他性质与发光装置22所使用的膜层(包含III族、V族元素或也称为III-V化合物半导体材料)相近的材料形成。基材20也可为碳化硅基材、覆有碳化硅层的硅基材、硅锗基材或其他可适用的半导体基材。
在本实施例中，未掺杂的氮化镓(u-GaN；un-doped GaN)层24形成于基材20上，且可能与其接触。在一实施例中，未掺杂的氮化镓层24实质上无氮及镓以外的其他元素存在。发光装置22形成于未掺杂的氮化镓层24上，且可能与其接触。在本实施例中，每个发光装置22皆包含n型氮化镓层(掺杂n型杂质的氮化镓)26、多重量子阱(multiple quantum well；MQW)28、p型氮化镓层(掺杂p型杂质的氮化镓)、反射板(reflector)30及顶部电极(也为连接焊盘)34。反射板32可由例如金属形成。多重量子阱28可由例如氮化铟镓(InGaN)形成，并用以作为发光的有源层。上述膜层26、28、30、32、34的形成乃公知技术，故在此不重复赘述。在本实施例中，膜层26、28、30的形成方法包含外延成长。可以理解的是，发光装置22可具有多种设计型态，图2仅显示所有可得的变化例中的其中一种示范例。例如，膜层26、28及30的材料皆可不同于前述的材料，且可包含三元的(ternary)III-V化合物半导体材料，例如GaAsP、GaPN、AlInGaAs、GaAsPN、AlGaAs或其类似物。并且，n型氮化镓层26及p型氮化镓层28的位置可作替换。
每个发光装置22皆还包含连接焊盘(bond pads)38，用以连接n型氮化镓层26。因此，连接焊盘34及38用于施予电压至各别的发光装置22，使各别的发光装置22激发放光。在一实施例中，在发光装置22运作(发光)时，每个发光装置22中至少一电极34有电流流经，但也有一或多个电极34为虚置电极，其在施予电压时不会有电流流经。
焊料凸块36(包含有源焊料凸块36B及虚置焊料凸块36A)、40形成于发光装置22上。焊料凸块36及40可使用常用的焊料，例如无铅焊料、共晶焊料(eutectic solders)或其类似物。在形成焊料凸块36及40后，将晶片100分割成复数个发光装置芯片(LED chip)44，其中每个发光装置芯片44皆含有一或多个发光装置22。在此实施例中，每个发光装置芯片44含有多个设置于同一基材20上的发光装置，这些在同一发光装置芯片中的发光装置22称为LED显示单元(LED tiles)。自晶片100分割出发光装置芯片44后，可在发光装置芯片44的边缘形成切割斜角(bevel cuts)(未显示于图2中，请参见图4)，以使边缘与其所相对的基材20表面形成斜角(slantangle，不等于90°)。切割斜角42可减少所形成的封装结构的应力。
参见图3，提供承载基材60。承载基材60包含基材62，其可为半导体基材，例如硅基材或介电基材。基材通孔(through-substrate via；TSV)64形成于基材62中，且电性连接位于基材62相反侧的元件。基材通孔64可由铜或其他金属形成，例如钨或前述的合金。连接焊盘66(包含66A、66B及66C)形成在承载基材60的一侧上并与基材通孔64相连。
虽然可对基材通孔64施予电压，基材通孔64为虚置基材通孔，非用以导电。在本说明书中，既然虚置基材通孔用于散热，则虚置基材通孔64也可称为热基材通孔(thermal TSVs)。同样地，各别的发光装置芯片44发光时(在发光装置芯片44接合该承载芯片上后)，有电流流经的连接焊盘66称为有源连接焊盘66B或66C，无电流流经的连接焊盘称为虚置连接焊盘66A。欧姆线68可视需要埋设在承载晶片60中。欧姆线68可相互连接各个连接焊盘，以使连接焊盘可用于调整(regualte)电流流经将要接合在承载晶片60上的发光装置芯片44。或者，不形成欧姆线，以电阻极小的金属线取代之。
参见图4，自晶片100分割出来的多个发光装置芯片44以倒装芯片接合方式接合至承载晶片60上。在接合工艺中，回焊焊料凸块36及40以连接(join)连接焊盘34及38。可视需要填充底部填胶72至发光装置芯片44及承载晶片60之间的空隙中。切割斜角42可减少填入底部填胶72的困难度。
在发光装置芯片44接合至承载晶片60之后，发光芯片装置44可覆盖(垂直重叠)有源连接焊盘66B。然而，发光装置芯片44未覆盖连接焊盘66C。换句话说，连接焊盘66C位在发光装置芯片44垂直延伸的边界之外，且未被底部填胶所覆盖(如有填充)。
参见图5，将硅胶透镜(silicone lenses)塑模(mold)于发光装置芯片44上。硅胶透镜74的塑模为公知技术，故在此不重复赘述。每个硅胶透镜74皆可覆盖所对应的发光装置芯片44。在未填充底部填胶72的实施例中，也可将硅胶(silicone)填充至发光装置芯片44及承载晶片60之间的空隙中，发挥与底部填胶相同的功能。连接焊盘66C为暴露的，未被硅胶透镜74所覆盖。
接着，可沿着切割道63(scribe line)分割承载晶片60，以使发光装置封装元件分离成多个独立的封装体。因此，承载晶片60分离成多个承载芯片60’，且每个承载芯片60’与至少一发光装置芯片44接合。
如图5所示，此封装体结构包含可用于打线连接的连接焊盘66C。图6显示已进行打线连接后的封装体的实施例，其中如图5所示的封装元件还可装设于导线架上。连接焊盘66C可透过导线80连接至导线架78。因此，发光装置芯片44透过导线80电性连接至导线架78。导线80可为金线，或由其他金属材料形成，例如银、铝及其类似物。
承载芯片60’可借由热界面材料(thermal interface material；TIM)层79与导线架78黏接。热界面材料层79可有具有良好导热能力的介电材料形成。在本实施中，热界面材料层79的热传导系数可大于33W/mK，且可介于33W/mK至318W/mK之间。在一实施例中，热界面材料79由有机膏体(organic paste)或纯的合金或金属形成，其可填入至导线架78中，并在承载芯片60’设置于导线架78后，加热回焊及固化。
图6还显示将封装元件装设至散热器(heat sink)82上。在一实施例中，热界面材料86连接散热器82及导线架78，热界面材料86可使用近似于热界面材料层79的材料。散热器82可包含内部空气通道(internal air ducts)84以增加散热器82的散热面积。再者，散热器82可用于支撑设置于其上的封装元件，并可电性绝缘于电流输入/输出单元(current I/Os)。因此，由发光装置芯片44所产生的热可发散至承载芯片60’，及发散至散热器82。可以看出的是，发光装置芯片44至散热器82的通道中，无导热能力不佳的材料存在。因此，在发光装置芯片44及散热器82之间的热阻(thermal resistance)低，使得图6所示的封装元件具有高散热效率。上述封装元件因而适于应用于高功率发光装置，其散热效果对于装置发挥最佳效果极为重要。
经发现，当电压施予至线80及连接焊盘66C时，虚置焊料凸块36A无任何电流流经。然而，虚置焊料凸块36A可帮助传导发光装置芯片44所产生的热通过承载芯片60’至散热器82。
如图6所示的封装元件可称为混合式封装元件。既然发光装置芯片44首先以倒装芯片接合方式接合在承载芯片60’上，且所形成的结构还接合至其他电路元件上，例如以导线连接至导线架。此封装设计可使光仅朝一方向发出(如图6的顶部)，而热由相反方向逸散(如图6的底部)。因此，如本发明各种实施例所述的发光装置封装元件具有良好的发光效率及散热效率，且优于传统发光装置封装体，该传统发光装置封装体的散热器中为导热性差的材料。例如，由发光装置芯片44所产生的热可由多个虚置焊料凸块36A及热基材通孔64发散至承载芯片60’中。因此，如图6所示的发光装置封装元件散热能力得以改善。此外，由发光装置芯片44所发出的光自基材20发出(本实施例中基材20为透明的)，且不会被任何线或连接焊盘所阻挡。因此，相较于部分的光会被封装体元件所阻挡的传统发光装置封装体，光输出效率得以改善。
虽然本发明已以优选实施例揭示如上，然而其并非用以限定本发明，本领域技术人员，在不脱离本发明的精神和范围内，当可作还动、替代与润饰。再者，本发明的保护范围并未局限于说明书内所述特定实施例中的工艺、机器、制造、物质组成、装置、方法及步骤，本领域技术人员可从本发明揭示内容中理解现行或未来所发展出的工艺、机器、制造、物质组成、装置、方法及步骤，只要可以在此处所述实施例中实施大体相同功能或获得大体相同结果皆可使用于本发明中。因此，本发明的保护范围包括上述工艺、机器、制造、物质组成、装置、方法及步骤。另外，每一权利要求构成个别的实施例，且本发明的保护范围也包括各个权利要求及实施例的组合。

Claims (10)

1.一种发光装置封装元件，包括：
一发光装置芯片；以及
一承载芯片，包含：
一第一连接焊盘及一第二连接焊盘，位于该承载芯片的一表面上且以倒装芯片接合方式与该发光装置芯片接合；
一第三连接焊盘及一第四连接焊盘，位于该承载芯片的该表面上且各自与该第一连接焊盘及该第二连接焊盘电性连接；
至少一基材通孔，连接至该第一及该第二连接焊盘；及
至少一虚置基材通孔，位于该承载芯片中，其中在该发光装置芯片发光时，无电流流经该虚置基材通孔。
2.如权利要求1所述的发光装置封装元件，还包含一透镜，覆盖该发光装置芯片及一部分的该承载基材，且未覆盖该第三连接焊盘及该第四连接焊盘。
3.如权利要求1所述的发光装置封装元件，还包含一第一连接线及一第二连接线，各自打线连接该第一连接焊盘及第二连接焊盘至该第三连接焊盘及该第四连接焊盘。
4.如权利要求3所述的发光装置封装元件，还包含：
一导线架，连接至该第一连接线及该第二连接线；及
一热界面材料，位于该承载芯片及该导线架之间并将其连接，其中该热界面材料使该导线架电性绝缘于该承载芯片中所有的基材通孔。
5.如权利要求1所述的发光装置封装元件，还包含一散热器连接至该承载芯片上，其中该散热器及该发光装置芯片位于该承载芯片的相反侧。
6.如权利要求1所述的发光装置封装元件，其中该虚置基材通孔包含一连接至一虚置焊料凸块的第一终端，及一电性绝缘的第二终端，其中该虚置焊料凸块连接该虚置基材通孔及该发光装置芯片，且在该发光装置芯片发光时，无电流流经该虚置焊料凸块。
7.如权利要求1所述的发光装置封装元件，其中该承载芯片包含一欧姆线，电性耦接该第一连接焊盘及该第三连接焊盘。
8.一种发光装置封装元件，包括：
一散热器；
一导线架，位于该散热器上，且热耦接该散热器；
一承载芯片，位于该导线架上，其中该承载芯片包含复数个虚置基材通孔于其中；
一第一热界面材料，位于该承载芯片及该导线架之间，其中该第一热界面材料使该导线架电性绝缘于该承载芯片中所有的虚置基材通孔；
一第一连接焊盘及一第二连接焊盘，位于该承载芯片的一表面上，其中该第一连接焊盘及该第二连接焊盘打线连接至该导线架；以及
一发光装置芯片，以倒装芯片接合方式接合于该承载芯片上，其中该发光装置芯片的两电极电性连接至该第一连接焊盘及该第二连接焊盘，其中在该发光装置芯片发光时，无电流流经该复数个虚置基材通孔。
9.权利要求8所述的发光装置封装元件，其中该散热器内部包含空气通道。
10.权利要求8所述的发光装置封装元件，其中该复数个虚置基材通孔透过虚置焊料凸块与该发光装置芯片上的电极接合，其中在该发光装置芯片发光时，无电流流经该虚置焊料凸块。
CN2010102415561A 2010-03-02 2010-07-29 发光装置封装元件 Active CN102194972B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/715,872 US8183580B2 (en) 2010-03-02 2010-03-02 Thermally-enhanced hybrid LED package components
US12/715,872 2010-03-02

Publications (2)

Publication Number Publication Date
CN102194972A CN102194972A (zh) 2011-09-21
CN102194972B true CN102194972B (zh) 2013-06-19

Family

ID=44530543

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2010102415561A Active CN102194972B (zh) 2010-03-02 2010-07-29 发光装置封装元件

Country Status (3)

Country Link
US (1) US8183580B2 (zh)
CN (1) CN102194972B (zh)
TW (1) TWI458140B (zh)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101630152B1 (ko) * 2010-02-24 2016-06-14 엘지디스플레이 주식회사 하이브리드 발광다이오드 칩과 이를 포함하는 발광다이오드 소자 및 이의 제조방법
TW201225246A (en) * 2010-12-06 2012-06-16 Ind Tech Res Inst Multi-chip stack structure
CN102800798B (zh) * 2011-10-26 2016-06-08 清华大学 一种led封装结构及其封装方法
CA2854771A1 (en) * 2013-06-21 2014-12-21 J2 Light Inc. Lighting system and method to control a lighting system
US9496297B2 (en) * 2013-12-05 2016-11-15 Optiz, Inc. Sensor package with cooling feature and method of making same
CN108091721A (zh) * 2017-12-11 2018-05-29 阜阳师范学院 一种用于硅基光电集成电路芯片中的光电探测器及制备方法
US11978839B2 (en) * 2019-02-03 2024-05-07 Quanzhou Sanan Semiconductor Technology Co., Ltd. Light-emitting device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101032034A (zh) * 2004-06-30 2007-09-05 克里公司 用于封装发光器件的芯片级方法和芯片级封装的发光器件
CN101577304A (zh) * 2008-05-05 2009-11-11 台湾积体电路制造股份有限公司 发光二极管封装结构

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4044265B2 (ja) * 2000-05-16 2008-02-06 三菱電機株式会社 パワーモジュール
US20040188696A1 (en) 2003-03-28 2004-09-30 Gelcore, Llc LED power package
TWI294694B (en) 2005-06-14 2008-03-11 Ind Tech Res Inst Led wafer-level chip scale packaging
US7539022B2 (en) * 2005-10-04 2009-05-26 Phoenix Precision Technology Corporation Chip embedded packaging structure
US7989270B2 (en) * 2009-03-13 2011-08-02 Stats Chippac, Ltd. Semiconductor device and method of forming three-dimensional vertically oriented integrated capacitors

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101032034A (zh) * 2004-06-30 2007-09-05 克里公司 用于封装发光器件的芯片级方法和芯片级封装的发光器件
CN101577304A (zh) * 2008-05-05 2009-11-11 台湾积体电路制造股份有限公司 发光二极管封装结构

Also Published As

Publication number Publication date
TWI458140B (zh) 2014-10-21
CN102194972A (zh) 2011-09-21
TW201131829A (en) 2011-09-16
US8183580B2 (en) 2012-05-22
US20110215361A1 (en) 2011-09-08

Similar Documents

Publication Publication Date Title
CN102194971B (zh) 发光装置封装元件及其制造方法
CN102194987B (zh) 发光装置封装元件
US8610136B2 (en) Thermally optimised LED chip-on-board module
US7683396B2 (en) High power light emitting device assembly utilizing ESD protective means sandwiched between dual sub-mounts
CN102194972B (zh) 发光装置封装元件
TW535307B (en) Package of light emitting diode with protective diode
US8735934B2 (en) Semiconductor light-emitting apparatus and method of fabricating the same
TWI549322B (zh) 一種結合磊晶結構與封裝基板爲一體之整合式ｌｅｄ元件及其製作方法
JP2009059883A (ja) 発光装置
CN102231378B (zh) 一种led封装结构及其制备方法
TWI395346B (zh) 發光元件的封裝結構
CN103928577A (zh) 一种板式led的封装方法及采用该方法封装的led
CN102226995B (zh) 一种led封装结构及其制备方法
CN102214652B (zh) 一种led封装结构及其制备方法
CN101587925A (zh) 发光元件的封装结构及其制造方法
CN220710342U (zh) 一种高密度热电分离贴片式的csp光源
US10825974B2 (en) Light-emitting diode package and method of manufacture
GB2551154B (en) Light-emitting diode package and method of manufacture
TW202407998A (zh) 用於多晶片發光裝置的晶圓級製造
KR20110130075A (ko) Ｌｅｄ 칩의 냉각구조

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
C41 Transfer of patent application or patent right or utility model
TR01 Transfer of patent right

Effective date of registration: 20160425

Address after: Hsinchu City, Taiwan, China

Patentee after: EPISTAR Corp.

Address before: Hsinchu City, Taiwan, China

Patentee before: Yuanxin Optoelectronics Co.,Ltd.

Effective date of registration: 20160425

Address after: Hsinchu City, Taiwan, China

Patentee after: Yuanxin Optoelectronics Co.,Ltd.

Address before: Hsinchu City, Taiwan, China

Patentee before: Taiwan Semiconductor Manufacturing Co.,Ltd.