CN102156618B - Memory device with multiple connectors and method for transmitting data - Google Patents

Memory device with multiple connectors and method for transmitting data Download PDF

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Publication number
CN102156618B
CN102156618B CN201010111814.4A CN201010111814A CN102156618B CN 102156618 B CN102156618 B CN 102156618B CN 201010111814 A CN201010111814 A CN 201010111814A CN 102156618 B CN102156618 B CN 102156618B
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connector
memory storage
transmission
data
interface
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CN102156618A (en
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李栋
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Aigo Electronic Technology Co Ltd
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Aigo Electronic Technology Co Ltd
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Abstract

The invention discloses a memory device with multiple connectors and a method for transmitting data. The memory device comprises multiple connectors, a memory unit, a power control unit, a port detection unit, a port selection unit and a protocol selection unit, wherein the power control unit is used for providing power for each module of the memory device; the port detection unit is connected with the multiple connectors respectively, and used for transmitting speed measurement data packets to the multiple connectors respectively, detecting transmission speed of each connector according to the returned speed measurement data packet and selecting a specified connector by using the speed measurement result; the port selection unit is used for selecting the specified connector to be communicated with an external device; and the protocol selection unit is used for selecting a transmission protocol corresponding to the specified connector as the transmission protocol of a data channel. The data channel connected with the specified connector is selected by the memory device as the data channel for reading and writing of the memory unit. In the invention, the connector with the highest transmission speed is selected through time for receiving and transmitting the speed measurement data packets, so that each interface is effectively utilized, and the speed of transmitting the data of the memory device is increased.

Description

There is the memory storage of multiple connector and the method for transmission data thereof
Technical field
The present invention relates to a kind of method of memory storage and memory storage transmission data, particularly relate to a kind of memory storage with multiple different agreement connector, and this memory storage selects from the connector of different agreement a connector to realize the method for data transmission with host apparatus.
Background technology
Under prior art, the USB2.0 connector with plug-and-play feature is very universal on various digital equipment.Along with the increase of digital product memory capacity, the data rate of USB2.0 connector can not meet the needs of people gradually.
In order to solve the bottleneck of USB2.0 connector data transmission, there is the connector of USB3.0, and use the ESATA connector of SATA agreement.USB3.0 standard can support the message transmission rate up to 4.8Gbps, and data rate is more than 10 times of USB2.0.And ESATA standard can reach the 3Gbs even speed of 6Gbs, also considerably beyond the message transmission rate of USB2.0 connector.
From products application, there is the connector that the two-in-one connector of USB2.0 and USB3.0, USB 2.0 and ESATA are two-in-one, and company's machine that USB2.0, USB3.0, ESATA are three-in-one, various product also starts to occur.
Memory storage and host apparatus use three-in-one connector, or the connector of more than three kinds agreements, how do memory storage and host apparatus select most suitable connector from the connector of more than three kinds? it is problem demanding prompt solution.
Therefore, prior art has difficulties, and needs further improvement and development.
Summary of the invention
The object of the present invention is to provide a kind of there is multiple connector memory storage and the method for transmission data, when memory storage is connected with same external device by multiple connector, most suitable connector can be selected to carry out data transmission.
Technical scheme of the present invention is as follows:
There is a memory storage for multiple connector, comprise multiple connector, storage unit, and be the power control unit of each module for power supply of memory storage, wherein, also comprise:
Port detecting unit, is connected with described multiple connector respectively; Send measurement data bag respectively to multiple connector, detect the transmission speed of each connector according to the measurement data bag returned, utilize the result that tests the speed to select to specify connector;
Port selection unit, selects described appointment connector to be communicated with external device;
Agreement selection unit, selects the host-host protocol of specifying host-host protocol corresponding to connector as data channel.
The data channel that described memory storage selects the data channel of specifying connector to connect to read and write as storage unit.
Described memory storage, wherein, described appointment connector is the connector that the slowest connector of the fastest connector of transmission speed, transmission speed or transmission speed are the most stable.
Described memory storage, wherein, described port detecting unit utilizes speed measuring module to pass through to receive and dispatch the time of measurement data bag, detects the transmission speed of each connector.
Described memory storage, wherein, described speed measuring module comprises: computation subunit, calculates the transmission speed of the measurement data bag by the connector that tests the speed; Relatively subelement, the speed of more each connector transmission data.
Described memory storage, wherein, described port detecting unit, port selection unit and agreement selection unit are arranged in the microprocessor of described memory storage, and described microprocessor connects multiple connector and storage unit respectively.
Described memory storage, wherein, described speed measuring module, port detecting unit or microprocessor comprise transmission submodule and receive submodule.
Described memory storage, wherein, described speed measuring module or port detecting unit repeatedly send to multiple connector the measurement data bag varied in size respectively, calculate mean value or weighted mean value that connector repeatedly transmits the measurement data bag time, select measurement data pack receiving and transmitting time average or the minimum connector of weighted mean value to be the fastest connector of transmission speed.
Described memory storage, wherein, in the storage unit that described speed measuring module is stored in memory storage or the second storage unit.
Described memory storage, wherein, described second storage unit is FLASH, and described FLASH is connected with described port detecting unit.
Described memory storage, wherein, after described memory storage is powered, described speed measuring module, port detecting unit or microprocessor send a measurement data bag to connector at set intervals.
Described memory storage, wherein, described port detecting unit or microprocessor send packet to connected multiple connector, judge the connector realizing physical connection.
Described memory storage, wherein, described port detecting unit or microprocessor detect connected connector by chip circuit connection state and whether realize physical connection.
Described memory storage, wherein, the described connector realizing physical connection has multiple, whether what described port detecting unit or microprocessor detection were connected with described multiple connector realizing physical connection is same device, if same device, send measurement data bag to multiple connector realizing physical connection.
Described memory storage, wherein, described speed measuring module, port detecting unit or microprocessor comprise the judgement submodule selecting connector.
Described memory storage, wherein, described appointment connector is selected complete, before described appointment connector is communicated with, described port detecting unit or microprocessor judges go out current data passage and there is data transmission, and the host-host protocol transmitting data different with the agreement of selected connector time, the data end of transmission transmitted waited for by described memory storage.
Described memory storage, wherein, described appointment connector is communicated with for signal communication.
Described memory storage, wherein, described microprocessor or port detecting unit comprise speed measuring module.
Described memory storage, wherein, described microprocessor comprises the control module of control store unit read-write.
Described memory storage, wherein, described multiple connector comprises USB2.0 interface, USB3.0 interface, ESATA interface, infrared interface, 1394 interfaces, blue tooth interface, WIFI interface.
Described memory storage, the Qi Zhen Southern Pass, described USB2.0 interface, USB3.0 interface and ESATA interface are three-in-one plug or socket.
Described memory storage, wherein, described USB3.0 interface or ESATA interface are the fastest connectors of selected transmission data, and described USB3.0 or ESATA interface uses power supply terminal in USB2.0 interface respectively as power end.
A method for memory storage transmission data, for memory storage and external device transmission data, comprises the following steps:
After memory storage is powered, memory storage sends measurement data bag respectively by each connector;
After memory storage obtains the measurement data bag returned, obtained the transmission speed of each connector by the transmitting-receiving time of each connector according to measurement data bag, select to pass and specify connector;
Memory storage is communicated with external device specifying connector, selects to specify the host-host protocol corresponding to connector to be the host-host protocol that between memory storage and external device, data are transmitted, and then carries out the data transmission of memory storage and external device.
Described method, wherein, described memory storage, by sending the mode of packet to each connector, detects each connector and whether realizes physical connection.
Described method, wherein, described memory storage receives and sends measurement data bag respectively by multiple data realizing physical connection at set intervals.
Described method, wherein, after selected appointment connector, described memory storage judges whether data channel exists data transmission:
If, memory storage judges that whether the host-host protocol transmitting data is identical with the host-host protocol of selected connector further, if different, after the data end of transmission transmitted waited for by memory storage, connector signal will be specified to be communicated with, and the host-host protocol enabled and specify connector corresponding;
If not, or the host-host protocol transmitting data is identical with specifying the host-host protocol of connector, and memory storage does not do switching and the protocol conversion of connector.
Described method, wherein, described appointment connector is company's machine that the slowest connector of the fastest connector of transmission data speed, transmission speed or transmission speed are the most stable.
Compared with prior art, provided by the invention have the memory storage of multiple connector and the method for transmission data thereof, measurement data bag is sent by each connector to external device by the port detecting unit of memory storage, memory storage and external device transmit the interface of data the most to go out to specify connector by the selection of time of transmitting-receiving measurement data bag, effectively utilize each connector, improve the speed of memory storage transmission data.
Accompanying drawing explanation
Fig. 1 is the functional block diagram of memory storage of the present invention first embodiment;
Fig. 2 is the functional block diagram of memory storage of the present invention second embodiment;
Fig. 3 is the functional block diagram of memory storage of the present invention 3rd embodiment;
Fig. 4 is the functional block diagram of memory storage of the present invention 4th embodiment;
Fig. 5 is the functional block diagram of memory storage of the present invention 5th embodiment;
Fig. 6 is the functional block diagram that the present invention has first embodiment of the host apparatus of multiple connector;
Fig. 7 is the functional block diagram that the present invention has second embodiment of the host apparatus of multiple connector;
Fig. 8 is the functional block diagram that the present invention has the 3rd embodiment of the host apparatus of multiple connector;
Fig. 9 is the functional block diagram that the present invention has the 4th embodiment of the host apparatus of multiple connector;
Figure 10 is the process flow diagram that connector first embodiment selected by memory storage of the present invention;
Figure 11 is the process flow diagram that connector second embodiment selected by memory storage of the present invention;
Figure 12 is the process flow diagram that connector the 3rd embodiment selected by memory storage of the present invention;
Figure 13 host apparatus of the present invention selects the process flow diagram of connector method.
Embodiment
Below in conjunction with accompanying drawing, preferred embodiment of the present invention is described in further detail.
The memory storage with multiple connector provided by the invention comprises the connector of the various host-host protocol such as USB2.0 interface 111, USB3.0 interface 112 and ESATA interface 113, infrared interface, 1394 interfaces, blue tooth interface, WIFI interface.Described USB2.0 interface 111, USB3.0 interface 112 and ESATA interface 113 3 interfaces can be arranged on same plug or socket, can also be that described USB2.0 interface 111 and USB3.0 interface 112 are arranged on same plug or socket, can also be that described USB2.0 interface 111 and ESATA interface 113 interface are arranged on same plug or socket, concrete set-up mode limit.Multiple interfaces is arranged on same plug or socket, the memory storage that the present invention has this interface is carrying out data transmission with external device, the interface that can automatically select data rate the fastest carries out data transmission, or the transmission speed of each connector is presented, manually, the connector of the various protocols that Appropriate application memory storage has, to provide the data transmission efficiency of memory storage.
First embodiment of memory storage of the present invention, namely memory storage 100 as shown in Figure 1, described memory storage 100 comprises USB2.0 interface 111, USB3.0 interface 112 and ESATA interface 113, described three kinds of interfaces are connected on the port detecting unit 121 of described memory storage, the port detecting unit 121 of described memory storage detects connected connector and whether realizes physical connection in external device, a step of the going forward side by side speed measuring module be stored in memory storage second storage unit 140, packet is sent to external device, the speed of three connector transmission data is measured according to the time of transceiving data bag, select the excuse of specifying connector as described memory storage 100 and external device data channel.Described appointment connector can be the fastest connector of transmission speed, or the connector that transmission speed is the slowest, or the connector that transmission speed is the most stable, as long as can learn according to the result that tests the speed, here do not limit, the present invention with the connector selecting transmission speed the fastest for specify connector.
Described port detecting unit 121 according to the time of transmitting-receiving measurement data bag, can obtain the fastest of which connector transmission data, the information of connector the fastest for transmission data speed is sent to port selection unit 122.Data channel corresponding to the fastest connector of transmission data speed connects by described port selection unit 122, and agreement selection unit 123 is by the host-host protocol of the transport protocol conversion of data channel corresponding to the fastest connector of transmission data speed.The storage unit 130 of described memory storage 100 is connected with described agreement selection unit 123, described storage unit 130 also comprises the control module 131 of control store unit read-write process, and described storage unit 130 can be hard disk, FLASH or FLASH array, SSD etc.Described memory storage also comprises power control unit 150, powers for the modules for memory storage, and the connecting line that described power control unit 150 is powered all is not shown in figure.Described second memory module 140 can be the FLASH be connected with port detecting unit.
It is the host-host protocol of each data channel that agreement selection unit 123 of the present invention is also responsible for the protocol conversion that described storage unit 130 uses, such as when described storage unit 130 is connected with SATA data line with described agreement selection unit 123, data between described agreement selection unit 123 and described storage unit 130 can be carried out the conversion between disk read-write form and SATA agreement by described agreement selection unit 123.This is that prior art repeats no more.
The present invention has second embodiment of the memory storage of multiple connector, i.e. memory storage 200, as shown in Figure 2, with the difference of described memory storage 100, the port detecting unit 121 of described memory storage 200, port selection unit 122 and agreement selection unit 123 are arranged in the microprocessor 120 of memory storage 200.The port detecting unit 121 of described microprocessor 120 detects in its multiple connector which realizes physical connection, if the connector realizing physical connection has multiple, just further detects described multiple connector and whether connects same external device.If described port detecting unit 121 detects described multiple connector realizing physical connection connect same external device, described microprocessor 120 sends instruction, makes described port detecting unit 121 send measurement data bag respectively by the connector realizing physical connection to external device.After described port detecting unit 121 receives the measurement data bag that described external device returns, the data rate being measured that connector by the time of transmitting-receiving measurement data bag is the fastest, and the information of connector the fastest for this data rate is sent to described port selection unit 122.The information of connector the fastest for data rate is sent to described agreement selection unit 123 by described port selection unit 122.
Described agreement selection unit 123 is by the host-host protocol of the transport protocol conversion in data channel between described connector and described microprocessor 120 corresponding to the fastest connector of transmission speed; Host-host protocol in data channel between described microprocessor 120 and storage unit 130 can also be changed by described agreement selection unit 123 simultaneously, namely being responsible for the protocol conversion that described storage unit 130 uses is the host-host protocol of each data channel, and this is also prior art.The protocol conversion function of described agreement selection unit 123 also can be realized by described microprocessor 120.
The present invention has the 3rd embodiment of the memory storage of multiple connector, i.e. memory storage 300, as shown in Figure 2, be with the difference of described memory storage 200, described microprocessor 120 has very strong arithmetic capability, and the control module controlling described storage unit 130 read-write operation is arranged in described microprocessor 120 by the microprocessor 120 of described memory storage 300.Described memory storage 300 is connected with the second storage unit 140 storing speed measuring module.The microprocessor 120 of described memory storage 300 can detect which connector in multiple connector by port detecting unit 121 chip circuit connection state achieves physical connection, the described port detecting unit of further control calls the speed measuring module stored in FLASH140, sends measurement data bag with speed measuring module by multiple connector realizing physical connection respectively to the host apparatus be connected with described memory storage 300.Described port detecting unit 121 receives the measurement data bag that external device returns, and goes out the message transmission rate of each connector, and select the fastest connector of transmission data with described speed measuring module according to the Time Calculation of each connector transmission data.The information of connector the fastest for transmission data is sent to described port selection unit 122 and agreement selection unit 123 by the microprocessor 120 of described memory storage 300 respectively.Described port selection unit 122 is responsible for the specified interface of physical connection to realize signal communication, and the connector that namely transmission speed is the fastest realizes signal communication.
The microprocessor 120 of described memory storage 300 controls the read-write operation of described storage unit 130 by control module 131.Described control module 131 can also be arranged between described microprocessor 120 and storage unit 130, memory storage 400 as shown in Figure 4.
The present invention has the 5th embodiment, i.e. memory storage 500 of the memory storage of multiple connector, and as shown in Figure 5, the FLASH140 storing speed measuring module is set to one by the microprocessor 120 of described memory storage 500.The microprocessor 120 of described memory storage 500 directly can also control the read-write operation of described storage unit 130.
The present invention has multiple connector memory storage and selects the method for connector to have three embodiments, and first embodiment as shown in Figure 10.After described memory storage is powered, described memory storage is detected which connector in multiple connector and is realized physical connection, and concrete can be performed by the port detecting unit of described memory storage or microprocessor.After determining to realize the connector of physical connection, whether what the port detecting unit of memory storage or microprocessor detected that multiple connectors of realizing physical connection connect is same external device.If what multiple connectors of memory storage connected is same external device, the port detecting unit of described memory storage or microprocessor send measurement data bag to this external device.The port detecting unit of described memory storage or microprocessor receive the measurement data bag that described external device returns, the measurement data bag that described external device returns can be the measurement data bag that described memory storage sends, also may be the newly-generated packet of described external device, not limit here.The port detecting unit of described memory storage or microprocessor, by receiving the time of packet, select the connector that transmission data are the fastest.The connector that connector switches to data rate the fastest by described memory storage, and Data Transport Protocol is converted to the host-host protocol corresponding to the fastest connector of data rate.
Second embodiment of connector method selected by described memory storage, as shown in figure 11.The difference of described second method and first method is, after described memory storage is powered, its port detecting unit or microprocessor send packets respectively by all connectors of described memory storage, according to the packet sent, described port detecting unit or micro-process judge which connector of memory storage realizes physical connection.The port detecting unit of described memory storage and microprocessor utilize speed measuring module to send measurement data bag to external device afterwards, by the connector selecting data rate the fastest.
The 3rd embodiment of connector method selected by described memory storage, and as shown in figure 12, the third method of connector selected by described memory storage, describes the solution that may go wrong in transmission in detail, specific as follows:
After described memory storage is powered, the port detecting unit of memory storage or microprocessor send measurement data bag by all connector of memory storage respectively to the port detecting unit of external device every the set time.External device returns measurement data bag to the port detecting unit of described memory storage or microprocessor.The port detecting unit of described memory storage or microprocessor select the fastest connector of data rate according to measurement data bag by the transmission time of different connector.The information of connector the fastest for transmission speed is sent to port selection unit and agreement selection unit by described port detecting unit or microprocessor.Whether the port detecting unit of memory storage or microprocessor judges data channel exist data transmission, if not, and the data channel at the port selection unit number of ports of described memory storage reportedly defeated fastest connector place; If, the agreement selection unit of described memory storage judges that whether the agreement transmitting data is identical with the agreement of selected connector, if different, the end of transmission transmitting data waited for by described memory storage, after, memory storage carries out the switching of connector and the conversion of Data Transport Protocol again, if identical, described memory storage does not do the switching of connector and the conversion of Data Transport Protocol.
When described USB2.0 interface 111, USB3.0 interface 112 and ESATA interface 113 are arranged on same plug or socket, if described three interfaces all realize physical connection, described memory storage selects described USB3.0 interface 112 to be fastest data transmission interface, and described USB3.0 interface 112 can use the power supply terminal of the power supply terminal in described USB2.0 interface 111 as USB3.0 interface 112.Equally, described memory storage selects described ESATA interface 113 to be fastest data transmission interface, and described ESATA interface 113 can use the power supply terminal of the power supply terminal in described USB2.0 interface 111 as ESATA interface 113.
The port detecting unit of memory storage of the present invention or microprocessor are often just once detected its interface at regular intervals, and the whole time period that detecting persistent storage is powered.The detecting time of port detecting unit and microprocessor can also change within a few minutes that memory storage powers by the present invention, such as, within 3 minutes, because translation interface is the most frequently used when bringing into use memory storage, to carry out the detecting of connector in 3 after memory storage is powered minute and automatically to select, to save the resource of described microprocessor, provide the process quick-frozen of described memory storage microprocessor.
The speed measuring module of memory storage of the present invention can be stored in described FLASH140, when described port detecting unit 121 carries out velocity test, transfers the speed measuring module in described FLASH140.Described speed measuring module also can not be stored in described FLASH140, and the port detecting unit 121 being set directly at described memory storage is inner, or it is inner to be arranged on described memory storage microprocessor 120.
The host apparatus with multiple connector provided by the invention has multiple connector, comprises the connector of the various host-host protocols such as USB2.0 interface 211, USB3.0 interface 212, ESATA interface 213, infrared interface, 1394 interfaces, blue tooth interface, WIFI interface.。Three kinds of connectors on described host apparatus, such as USB2.0 interface 211, USB3.0 interface 212, ESATA interface 213, can be plug or the socket of three kinds of interface unifications, can be the two-in-one plug of USB2.0 interface 211 and USB3.0 interface 212 or socket, can be the two-in-one plug of USB2.0 interface 211 and ESATA interface or socket, the set-up mode of three kinds of connectors on described host apparatus limit.Described host apparatus of the present invention can be that desktop computer, notebook computer, hand-held palm PC, audio/video player etc. can as the devices of host apparatus, and concrete form does not limit.
First embodiment of host apparatus of the present invention, i.e. host apparatus 600, as shown in Figure 6.Described host apparatus 600 comprises CPU (central processing unit) 220, be connected to the microprocessor 230 on described CPU220, described microprocessor 230 is also referred to as the first microprocessor of host apparatus 600, and described microprocessor 230 connects internal memory and display controller.Described microprocessor 230 also connects the another one microprocessor 240 of host apparatus 600, described microprocessor 240 is also referred to as the second microprocessor of host apparatus 600, described microprocessor 240 connects the storage unit 250 of host apparatus 600, the USB2.0 interface 211 of described host apparatus 600, USB3.0 interface 212, ESATA interface 213 are connected on the port detecting unit 241 of described host apparatus, and the port detecting unit 241 of described host apparatus is connected on described microprocessor 240 by port selection unit 242.Described host apparatus also comprises power control unit 260, and described power control unit 260 is that the modules of host apparatus is powered, and not shown power control unit 260 is the connecting line of whole module for power supply.
The port detecting unit 241 of described host apparatus or microprocessor 240 can realize physical connection by which connector of chip circuit connection state identification.The connector that described host apparatus is arranged is three-in-one connector, namely when a connector integrates USB2.0 interface 211, USB3.0 interface 212 and ESATA interface 213 3 kinds of connectors, when the described three-in-one connector of host apparatus 600 and the three-in-one interface of external device realize physical connection, described port detecting unit 241 or microprocessor 240 or CPU220 can identify whether the three-in-one interface on described host apparatus realizes physical connection automatically.
By the port detecting unit 241 of described host apparatus or microprocessor 240 or CPU220, described host apparatus 600, when identifying that described three kinds of connectors realize physical connection, judges whether the external device of described three kinds of connector physical connections is same external devices.When the external device of described three kinds of connector physical connections is same external device, the port detecting unit 241 of described host apparatus sends packet respectively by described three connectors to external device.The time of the packet that described port detecting unit 241 or microprocessor 240 are returned by external device, judge the speed of described three connectors transmission data, and therefrom select to specify connector as the excuse of described host apparatus 600 and external device data channel.Described appointment connector can be the fastest connector of transmission speed, or the connector that transmission speed is the slowest, or the connector that transmission speed is the most stable, as long as can learn according to the result that tests the speed, here do not limit, the present invention with the connector selecting transmission speed the fastest for specify connector.
The port detecting unit 121 of described host apparatus 600 according to the time of transmitting-receiving measurement data bag, can draw the connector that transmission data are the fastest.The information of connector the fastest for transmission data is sent to the port selection unit 242 of described host apparatus by the port detecting unit 241 of described host apparatus, transmits the interface of the fastest connector of data as data channel by the port selection unit 242 of described host apparatus using selecting.The connector that described microprocessor 240 or CPU220 connect various agreement can realize the transport protocol conversion of different connector automatically, after the connector that selected transmission data are the fastest, described microprocessor 240 or CPU220 complete the task of data channel transmitted data protocol conversion automatically.
Second embodiment of host apparatus of the present invention, i.e. host apparatus 700, as shown in Figure 7.The difference of described host apparatus 700 and host apparatus 600 is, the port detecting unit 241 of described host apparatus and port selection unit 242 are arranged at described microprocessor 240 simultaneously, described microprocessor 240 can be the South Bridge chip of host apparatus, and described microprocessor 230 can be the north bridge chips of host apparatus.
3rd embodiment, i.e. host apparatus 800 of host apparatus of the present invention, as shown in Figure 8.Described host apparatus 800 is with the difference of described host apparatus 600, eliminates microprocessor 230, the internal memory of host apparatus and display controller is connected directly between on described CPU220, and described microprocessor 240 is directly connected with described CPU220.Described host apparatus 800 also can save north bridge chips, the port detecting unit 241 of host apparatus and port selection unit 242 are arranged at South Bridge chip, direct and the described CPU220 of this South Bridge chip is connected, multiple connectors of described host apparatus are connected on described host apparatus South Bridge chip, and South Bridge chip also connects storage unit 250.A microprocessor 230 is eliminated in the embodiment of described host apparatus 800, save the space of host apparatus 800 inside, along with the enhancing of CPU computing power, the function of microprocessor 230 can be replaced by described CPU220, make the integrated level of host apparatus inner member higher, be conducive to the cost saving host apparatus.
North bridge chips is responsible for the data transmission of CPU and internal memory, and South Bridge chip is responsible for the communication between I/O bus, and comprise keyboard, the access of mouse and the conversion of respective data transfer agreement, this is that prior art repeats no more here.
4th embodiment, i.e. host apparatus 900 of host apparatus of the present invention, as shown in Figure 9.The difference of described host apparatus 900 and host apparatus 800 is, eliminate microprocessor 240 further, described internal memory, display controller and storage unit 250 is connected on described CPU220, described multiple connector is connected on described port detecting unit 241, and described port detecting unit 241 is connected on described CPU220 by port selection unit 242.After port detecting unit 241 which connector recognized in multiple connector of described host apparatus realizes physical connection, described port detecting unit 241 sends measurement data bag respectively by the connector of physical connection to external device.After described port detecting unit 241 receives the packet that external device returns, described port detecting unit goes out the speed of each connector transmission data according to the Time Calculation of transmitting-receiving measurement data bag.Described port detecting unit 241 or CPU select the fastest interface of transmission data, by the port selection unit 242 of described host apparatus, the connector of data channel is switched to the fastest connector of transmission data, and is completed the host-host protocol be converted to by host-host protocol in data channel corresponding to the fastest connector of described transmission data by CPU220.
The port detecting unit 241 of described host apparatus and port selection unit 242 can also be integrated in described CPU220 by the present invention, the microprocessor 240 and/or 230 of described host apparatus can also be integrated in described CPU220, namely South Bridge chip and/or north bridge chips be integrated in described CPU220.
Described port detecting unit 241 is after having detected that multiple data connect and realize physical connection with external device, all can send packet respectively by each connector realizing physical connection to external device at regular intervals, namely carry out the velocity test of a connector at regular intervals, carry out the selection of the connector that a time data rate is the fastest at regular intervals, effective guarantee host apparatus carries out data transmission by the fastest data channel all the time.
In host device port detecting unit 241 of the present invention, can speed measuring module be set, described speed measuring module can also be arranged in South Bridge chip or host apparatus CPU, when described port detecting unit 121 carries out velocity test, transfer the velocity test that the speed measuring module in described South Bridge chip or host apparatus CPU carries out.
The connector that the port detecting unit 121 of memory storage of the present invention and the port detecting unit 241 of host apparatus select transmission speed the fastest, comprises following choice criteria:
The first, port detecting unit sends and sends single appointment size by multiple connector, the measurement data bag of such as 4k, and more each connector returns the time of measurement data bag, and what select measurement data pack receiving and transmitting shortest time is the fastest connector of transmission speed.
The second, port detecting unit sends the measurement data bag repeatedly being sent multiple appointment size by multiple connector respectively, such as send 4k measurement data bag to each connector, and then send 8k measurement data bag, more each connector returns the time of different measurement data bag, calculate the mean value that connector repeatedly transmits the measurement data bag time, select the minimum connector of measurement data pack receiving and transmitting time average to be the fastest connector of transmission speed.
Three, port detecting unit sends the measurement data bag being sent multiple appointment size by multiple connector respectively, such as send 4k measurement data bag to each connector, and then send 8k measurement data bag, more each connector returns the time of different measurement data bag, calculate the weighted mean value that connector repeatedly transmits the measurement data time, select the minimum connector of measurement data pack receiving and transmitting weighted mean value to be the fastest connector of transmission speed.
The fastest standard of transmission speed is selected to be not limited to above description, above choice criteria can be performed by the port detecting unit 241 of the port detecting unit 121 of described memory storage and host apparatus, or is performed by the speed measuring module of described memory storage and the speed measuring module of host apparatus.
The speed measuring module of memory storage of the present invention and the speed measuring module of host apparatus comprise: clock unit, for calculating the time of receiving and dispatching the time bag that tests the speed; Computation subunit, the time of the time bag that tests the speed according to each connector transmitting-receiving, calculates the transmission speed of the measurement data bag by the connector that tests the speed; Also compare subelement, the speed of more each connector transmission data, the choice criteria of the comparison rule the fastest connector of transmission speed as previously discussed, repeats no more here.Described speed measuring module can also be stored in the storage unit of described memory storage and the storage unit of host apparatus, and be such as stored in an independent partitions of each storage unit, described port detecting unit can call the speed measuring module in storage unit.
The transmission speed of each connector that calculating sub module can calculate by speed measuring module of the present invention is presented on the display screen of memory storage, or on the display screen of host apparatus, selected by modes such as the button on memory storage or host apparatus, button or touch-screens by artificial, select to specify connector, and will the information of connector be specified to return to described speed measuring module, port detecting unit or microprocessor.
The speed measuring module of memory storage of the present invention or host apparatus, port detecting unit or microprocessor can also comprise the transmission submodule sending measurement data bag and the reception submodule receiving sub-measurement data bag, and described transmission submodule and reception submodule can also be connected the clock for calculating the measurement data pack receiving and transmitting time.
Consistent with described memory storage, on host apparatus, when described USB2.0 interface 211, USB3.0 interface 212 and ESATA interface 213 are arranged on same plug or socket, if described three interfaces are with realizing physical connection, described host apparatus selects described USB3.0 interface 212 to be fastest data transmission interface, and described USB3.0 interface 212 can use the power supply terminal of the power supply terminal in described USB2.0 interface 211 as USB3.0 interface 212.Equally, described host apparatus selects described ESATA interface 213 to be fastest data transmission interface, and described ESATA interface 213 can use the power supply terminal of the power supply terminal in described USB2.0 interface 211 as ESATA interface 213.
Host apparatus of the present invention can when its multiple connector be connected to same external device, the way selection of Negotiation speed test transmits the fastest connector of data carries out data transmission passage as host apparatus and external device, the effective work efficiency improving host apparatus.
Host apparatus of the present invention selects the specific embodiment of the fastest connector method, as shown in figure 13, comprises the following steps:
First, host apparatus detects that its multiple connector realizes physical connection; Then judge whether the two or more connector realizing physical connection connects same external device.
If it is different external devices respectively that two or more connector connects, each connector and each external device are realized the UNICOM of data-signal by described host apparatus respectively with prior art.
If what two or more connector connected is same external device, host apparatus can send measurement data bag by multiple connector respectively to external device every special time.External device returns measurement data bag by each connector to described host apparatus, the described measurement data bag returned can be described host apparatus send measurement data bag, also can be described external device according to the measurement data bag of the host apparatus received newly-generated packet.The speed of each connector transmission data is tested by mode connector being sent to packet.The port detecting unit of described host apparatus can be used for receiving and sending measurement data bag, according to the time of measurement data pack receiving and transmitting, calculates the speed of each connector transmission data.
The port detecting unit of described host apparatus or South Bridge chip or CPU select the fastest connector of transmission data speed, and the information of connector the fastest for transmission data is sent to port selection unit.
After have selected the fastest connector of transmission data, the South Bridge chip of described host apparatus and/or CPU judge whether the data channel of current connection exists data transmission.
If there is not data transmission in data channel, the port selection unit of described host apparatus connects the data channel corresponding to connector of data rate most, and Data Transport Protocol is switched to the Data Transport Protocol corresponding to the fastest connector of data rate by the south bridge process chip of described host apparatus and/or CPU afterwards.
If data channel exists data transmission, the south bridge process chip of described host apparatus and/or CPU judge that whether the host-host protocol transmitting data is identical with the selected host-host protocol transmitted corresponding to the fastest connector of data.
If the host-host protocol transmitting data is identical with the corresponding host-host protocol of selected connector, then host apparatus does not do port switching and protocol conversion.
If the host-host protocol transmitting data is different with the corresponding host-host protocol of selected connector, after described host apparatus waits for the data end of transmission transmitted, the data channel of port selection unit number of ports reportedly corresponding to defeated fastest connector of described host apparatus, then complete protocol conversion, finally carry out data transmission with fastest connector.
Host apparatus of the present invention connects same external device to illustrate that host apparatus is selected to transmit the fastest connector of data speed as selected connector from three-in-one connector with three-in-one connector on host apparatus simultaneously, on host apparatus, two-in-one interfaces connects the connector selection of same external device simultaneously, or four-in-one interface connects the connector selection of same external device on host apparatus simultaneously, the system of selection of host apparatus of the present invention and host apparatus is identical not limiting here.Described connector is not limited to USB2.0 interface, USB3.0 interface and ESATA interface
Agreement selecting arrangement provided by the invention comprises port detecting unit, arranges speed measuring module in port detecting unit.
Described agreement selecting arrangement second embodiment is with the difference of first embodiment, also comprises: the first connector, is respectively used to connect the connector on host apparatus South Bridge chip or CPU; First power interface, is respectively used to connect the power interface on host apparatus South Bridge chip or CPU; Second connector, connects the connector of the various agreements of host apparatus, second source interface, connects the power interface in the various agreement connectors of host apparatus.
The difference of same first embodiment of the 3rd embodiment of described agreement selecting arrangement is, also comprises: the first data connecting line, is respectively used to the data terminal connecting connector on host apparatus South Bridge chip or CPU; First electric power connection line, is respectively used to the power supply terminal of the power interface connected on host apparatus South Bridge chip or CPU; Second data connecting line, connects the data terminal of the connector of the various agreements of host apparatus, second source connecting line, connects the power supply terminal of the power interface in the various agreement connectors of host apparatus.
The difference of same 3rd embodiment of the 4th embodiment of described agreement selecting arrangement is, described first data connecting line replaces with the first data terminal, first electric power connection line replaces with the first power supply terminal, second data connecting line replaces with the second data terminal, and second source connecting line is second source terminal.
Described agreement selecting arrangement can be added between active computer South Bridge chip and various protocols connector, and the function of active computer is got a promotion, and with low cost.
Should be understood that, the above-mentioned statement for present pre-ferred embodiments is comparatively detailed, and therefore can not think the restriction to scope of patent protection of the present invention, scope of patent protection of the present invention should be as the criterion with claims.

Claims (26)

1. there is a memory storage for multiple connector, comprise multiple connector, storage unit, and be the power control unit of each module for power supply of memory storage, it is characterized in that, also comprise:
Port detecting unit, is connected with described multiple connector respectively; Send measurement data bag respectively to multiple connector, detect the transmission speed of each connector according to the measurement data bag returned, utilize the result that tests the speed to select to specify connector;
Port selection unit, selects described appointment connector to be communicated with external device;
Agreement selection unit, selects the host-host protocol of specifying host-host protocol corresponding to connector as data channel;
The data channel that described memory storage selects the data channel of specifying connector to connect to read and write as storage unit.
2. memory storage according to claim 1, is characterized in that, described appointment connector is the connector that the slowest connector of the fastest connector of transmission speed, transmission speed or transmission speed are the most stable.
3. memory storage according to claim 2, is characterized in that, described port detecting unit utilizes speed measuring module to pass through to receive and dispatch the time of measurement data bag, detects the transmission speed of each connector.
4. memory storage according to claim 3, is characterized in that, described speed measuring module comprises: computation subunit, calculates the transmission speed of the measurement data bag by the connector that tests the speed; Relatively subelement, the speed of more each connector transmission data.
5. memory storage according to claim 1, is characterized in that, described port detecting unit, port selection unit and agreement selection unit are arranged in the microprocessor of described memory storage, and described microprocessor connects multiple connector and storage unit respectively.
6. memory storage according to claim 5, is characterized in that, described port detecting unit or microprocessor comprise transmission submodule and receive submodule.
7. memory storage according to claim 6, it is characterized in that, described speed measuring module or port detecting unit repeatedly send to multiple connector the measurement data bag varied in size respectively, calculate mean value or weighted mean value that connector repeatedly transmits the measurement data bag time, select measurement data pack receiving and transmitting time average or the minimum connector of weighted mean value to be the fastest connector of transmission speed.
8. memory storage according to claim 7, is characterized in that, in the storage unit that described speed measuring module is stored in memory storage or the second storage unit.
9. memory storage according to claim 8, is characterized in that, described second storage unit is FLASH, and described FLASH is connected with described port detecting unit.
10. memory storage according to claim 6, is characterized in that, after described memory storage is powered, described speed measuring module, port detecting unit or microprocessor send a measurement data bag to connector at set intervals.
11. memory storages according to claim 6, is characterized in that, described port detecting unit or microprocessor send packet to connected multiple connector, judge the connector realizing physical connection.
12. memory storages according to claim 6, is characterized in that, described port detecting unit or microprocessor detect connected connector by chip circuit connection state and whether realize physical connection.
13. memory storages according to claim 12, it is characterized in that, the described connector realizing physical connection has multiple, whether what described port detecting unit or microprocessor detection were connected with the described multiple connector realizing physical connection is same device, if same device, send measurement data bag to the multiple connector realizing physical connection.
14. memory storages according to claim 6, is characterized in that, described speed measuring module, port detecting unit or microprocessor comprise the judgement submodule selecting connector.
15. memory storages according to claim 6, it is characterized in that, described appointment connector is selected complete, before described appointment connector is communicated with, described port detecting unit or microprocessor judges go out current data passage and there is data transmission, and the host-host protocol transmitting data different with the agreement of selected connector time, the data end of transmission transmitted waited for by described memory storage.
16. memory storages according to claim 15, is characterized in that, described appointment connector is communicated with for signal communication.
17. memory storages according to claim 15, is characterized in that, described microprocessor or port detecting unit comprise speed measuring module.
18. memory storages according to claim 15, is characterized in that, described microprocessor comprises the control module of control store unit read-write.
19. memory storages according to claim 1, is characterized in that, described multiple connector comprises USB2.0 interface, USB3.0 interface, ESATA interface, infrared interface, 1394 interfaces, blue tooth interface, WIFI interface.
20. memory storages according to claim 19, is characterized in that, described USB2.0 interface, USB3.0 interface and ESATA interface are three-in-one plug or socket.
21. memory storages according to claim 20, it is characterized in that, described USB3.0 interface or ESATA interface are the fastest connectors of selected transmission data, and described USB3.0 or ESATA interface uses power supply terminal in USB2.0 interface respectively as power end.
The method of 22. 1 kinds of memory storage transmission data, for memory storage and external device transmission data, comprises the following steps:
After memory storage is powered, memory storage sends measurement data bag respectively by each connector;
After memory storage obtains the measurement data bag returned, obtained the transmission speed of each connector by the transmitting-receiving time of each connector according to measurement data bag, select to pass and specify connector;
Memory storage is communicated with external device specifying connector, selects to specify the host-host protocol corresponding to connector to be the host-host protocol that between memory storage and external device, data are transmitted, and then carries out the data transmission of memory storage and external device.
23. methods according to claim 22, is characterized in that, described memory storage, by sending the mode of packet to each connector, detects each connector and whether realizes physical connection.
24. methods according to claim 23, is characterized in that, described memory storage every
A period of time receives and sends measurement data bag respectively by the multiple data realizing physical connection.
25. methods according to claim 24, is characterized in that, after selected appointment connector, described memory storage judges whether data channel exists data transmission:
If, memory storage judges that whether the host-host protocol transmitting data is identical with the host-host protocol of selected connector further, if different, after the data end of transmission transmitted waited for by memory storage, connector signal will be specified to be communicated with, and the host-host protocol enabled and specify connector corresponding;
If not, or the host-host protocol transmitting data is identical with specifying the host-host protocol of connector, and memory storage does not do switching and the protocol conversion of connector.
26. methods according to claim 25, is characterized in that, described appointment connector is company's machine that the slowest connector of the fastest connector of transmission data speed, transmission speed or transmission speed are the most stable.
CN201010111814.4A 2010-02-11 2010-02-11 Memory device with multiple connectors and method for transmitting data Expired - Fee Related CN102156618B (en)

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