CN102136970B - LXI-based parallel multi-channel reconfigurable instrument - Google Patents
LXI-based parallel multi-channel reconfigurable instrument Download PDFInfo
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Abstract
The invention discloses an LXI-based parallel multi-channel reconfigurable instrument, comprising a substrate, an instrument function board, a field programmable gate array (FPGA) logical circuit, a test program set and a Web server, wherein the substrate and the instrument function board are the main components of the reconfigurable instrument and arranged in an instrument case together; the substrate is mainly used for realizing a software function and a hardware logical circuit of the system; and the instrument function board is mainly used for realizing the conversion between analog signals and digital signals. Based on the LXI standard design, the instrument is convenient for secondary development; the instrument has a multi-channel parallel test capacity, and each channel can flexibly change the function of the instrument; and the instrument can be used without installing software and can be operated and configured on line only by a browser.
Description
Technical field
The present invention relates to a kind of parallel multi-channel restructural instrument based on LXI, belong to the automatic test field, relate in particular to the universal test field based on the LXI bus.
Background technology
The development tool of electronic system can be divided into two kinds of methods: hardware approach and software approach.On the one hand, the exploitation hardware system can customize for specific goal task, and operational efficiency is high, however the long construction cycle, and the distinct disadvantage such as larger development cost and lower flexibility (reusability) have limited its development.Software systems can be good at solving the deficiency of hardware system, but in the High Speed System of large data throughout, message transmission rate and computation rate often become the bottleneck of software systems.On the other hand, the exploitation of software systems be unable to do without its hardware system that relies on, so the support that the function limitation of software systems provides in hardware system.Hardware system and software systems pluses and minuses separately impel people to propose the thought of software and hardware integration, and the circuit reconfiguration technique is one of current the most effective solution route in real time.
Although the concept of reconfigurable system (Reconfigurable System) just proposes as far back as 20 century 70s, owing to there not being the desirable reasons such as reconfigurable device, the research of this respect does not have very large breakthrough.Since the nineties in 20th century, along with developing rapidly of large scale integrated circuit, at hardware aspect, the crucial part FPGA that the development restructural is processed is obtaining larger development aspect structure and the scale.The maximum feature of reconfigurable system is under the electronic system operating state, dynamically changes hardware circuit by software, to adapt to different concrete application.
In the automatic test test, the function of traditional instrument is by manufacturer's design and definition, and the user can only use set instrumental function.It has greatly reduced the use flexibility of instrument on the one hand; On the other hand, different instruments all has independent, complete hardware system and software systems, not only causes the wasting of resources, has increased system bulk, and has improved whole cost.
Summary of the invention
The objective of the invention is to use very flexible and the low technical problem of design reuse degree in order to solve traditional instrument, a kind of parallel multi-channel restructural instrument based on LXI is proposed, the integrated instrumental functions such as universal instrument, oscilloscope, DC power supply, signal generator, and the present invention by Implementation of Embedded System a kind of instrument framework based on the LXI standard, the use of standard has improved versatility and the reusability of instrument.
Parallel multi-channel restructural instrument based on LXI of the present invention comprises substrate, instrumental function plate, fpga logic circuit, test program set and Web server;
The instrumental function plate comprises A/D modular converter, D/A modular converter and frequency/phase measurement module; The A/D modular converter is connected the input modulate circuit with the frequency/phase measurement module, the D/A modular converter connects the output modulate circuit; Analog signal amount in the test signal inputs to the input modulate circuit of instrumental function plate, then converts digital output to substrate through the A/D modular converter; Frequency signal inputs to the input modulate circuit of instrumental function plate, and the frequency/phase measurement module is converted into the square wave of Transistor-Transistor Logic level, exports substrate to; The digital quantity that substrate exports the instrumental function plate to converts analog signal to through the D/A modular converter, then by the output of output modulate circuit;
The instrumental function plate is connected digital I/O connector and connects with substrate;
Substrate comprises ARM9 core board, FPGA, CPLD, power management, ethernet network interface and USB interface, also is provided with in addition the RS232C serial ports for debugging; Power management provides voltage to substrate and instrumental function plate, and the upper strata of FPGA links to each other with the ARM9 core board by data/address/control bus, and bottom links to each other with the instrumental function plate by digital I/O connector; After system powered on, the configuration module of CPLD read the hardware circuit configuration information from the FLASH memory automatically, the logical circuit of configuration FPGA inside; Under electrifying condition, if the user need to change instrumental function, send order to the ARM9 core board from host computer, reconfigure fpga logic circuit among the FPGA by ARM9 core board notice CPLD again; The corresponding instrumental function of each I/O mouth on the instrument bus is redefined by the user;
The fpga logic circuit realizes that in FPGA test program set and Web server are to realize in the built-in Linux slave computer operating system based on the ARM9 core board;
The bottom instrument sequential logical circuit of fpga logic circuit is responsible for communicating by letter with A/D modular converter, the D/A modular converter of instrumental function plate, and the Bus Interface Unit on its upper strata is responsible for communicating by letter with the ARM9 core board; The function of FPGA internal RAM is that data are deposited and data buffering, and the function of SFR is that the control command that the ARM9 core board is sent is resolved, and RAM and SFR take the mode of unified addressing, and unified Bus Interface Unit by the upper strata manages it;
The bottom of test program set communicates by driver and fpga logic circuit, and its upper strata communicates by SOCKET agreement and host computer; Test program set is mainly realized: one, with the fpga logic circuit communication of bottom, the information that is included in the measured signal in the logical circuit is done further to resolve, be converted into the measured value relevant with instrumental function; The instruction of two, host computer being sent is distributed to different instruments, then instruction is resolved to the control information that can be identified by FPGA; Three, the C/S model of communication Network Based provides a SOCKET server, is used for carrying out alternately with the SOCKET client of host computer;
The user is by the webpage of the browser access LXI instrument of host computer operating system, and this webpage is realized by embedded web server; Web server adopts the BOA server increase income to realize, SOCKET client based on FLASH that Web server is also built-in, be used for and the SOCKET server of test program set between data communication; And the data format of this SOCKET is all write with the programmable instrument command standard that meets the LXI standard; The user reaches the purpose of software on-line reorganization by the test program set of page download, replacing and configure instrument.
The invention has the advantages that:
(1) based on the LXI standard design, is convenient to secondary development;
(2) instrument possesses the multi-channel parallel power of test, the function of each passage flexibly changing instrument;
(3) use of instrument need not mounting software, as long as can operating instrument and instrument carried out Configuration Online by browser.
Description of drawings
Fig. 1 is master-plan block diagram of the present invention;
Fig. 2 is hardware overall structure schematic diagram of the present invention;
Fig. 3 is the theory diagram that instrumental function template die analog signal is measured passage and analog signal output passage;
Fig. 4 is the substrate theory diagram;
Fig. 5 is software configuration schematic diagram of the present invention;
Among the figure:
1-substrate 2-instrumental function plate 3-FPGA logical circuit
4-test program set 5-Web server 6-interface board
201-A/D modular converter 202-D/A modular converter 203-frequency/phase measurement module
Embodiment
The present invention is described in further detail below in conjunction with drawings and Examples.
The present invention is a kind of parallel multi-channel restructural instrument based on LXI, and shown in 1, hardware components mainly comprises substrate 1 and instrumental function plate 2, and software section mainly comprises fpga logic circuit 3, test program set 4 and Web server 5.
Hardware overall structure of the present invention as shown in Figure 2, wherein substrate 1 and instrumental function plate 2 are critical piece of the present invention, the two is installed in the instrument container jointly.The former mainly realizes software function and the hardware logic electric circuit of system, and the latter mainly realizes the mutual conversion between analog signal and the digital signal.
In order to be user-friendly to, the user can be according to the interface requirement of test signal, designed, designed interface board 6, and instrumental function plate 2 links to each other with interface board 6 by 68 pin cabinet cables, and test signal inputs to instrumental function plate 2 by interface board 6.
Instrumental function plate 2 as shown in Figure 2, comprise A/D modular converter 201, D/A modular converter 202 and frequency/phase measurement module 203, A/D modular converter 201 is connected with the frequency/phase measurement module and is connected the input modulate circuit, D/A modular converter 202 connects the output modulate circuit, analog signal amount in the test signal inputs to the input modulate circuit of instrumental function plate 2 by interface board 6, then convert digital output to substrate 1 through A/D modular converter 201, frequency signal inputs to the input modulate circuit of instrumental function plate 2 by interface board 6, frequency/phase measurement module 203 is converted into the square wave of Transistor-Transistor Logic level, export substrate 1 to, the digital quantity that substrate 1 exports instrumental function plate 2 to converts analog signal to through D/A modular converter 202, then by the output modulate circuit, export interface board 6 to.
Concrete, instrumental function plate 2 among the present invention comprises 4 A/D modular converters 201,4 D/A modular converters 202,2 frequency/phase measurement modules 203,4 A/D modular converters 201 consist of 4 tunnel analog signals with the input modulate circuit and measure passage, 4 D/A modular converters 202 consist of 4 road analog signal output passages with the output modulate circuit, 2 frequency/phase measurement modules 203 consist of 2 tunnel frequency detecting designated lanes with the input modulate circuit, and analog signal measurement passage wherein and the schematic block circuit diagram of analog signal output passage are as shown in Figure 3.
Analog signal is measured passage and is comprised input modulate circuit and A/D modular converter 201 (ADC), and the analog signal measuring range is-10V～10V.The input modulate circuit comprises overcurrent protection, input pattern selector switch, programmable amplifier and low-pass filtering; all tested test signals enter the input modulate circuit of instrumental function plate 2 with difference modes, have reduced the interference that other signals produce tested test signal in the circuit.When this analog signal is measured passage as signal measurement or calibration function, input the positive terminal that analog selector switch responsively is linked into the calibration voltage of the positive terminal of tested test signal or DAC programmable amplifier; On the other hand, when this analogue measurement channel selecting is difference, single-ended or AISENSE measurement pattern, analog selector switch correspondingly the end of oppisite phase of input signal, or AISENSE be linked into the backward end of programmable amplifier.Programmable amplifier adopts AD8250, and this chip has good input, output characteristic, can carry out 1,2,5,10 times of amplification to its multiplication factor, can select by two control pins.Tested measuring-signal is converted to single-ended signal through programmable amplifier, is input to the ADC chip through low pass filter again.ADC adopts the AD7898 of 12 bit resolutions, and high sampling rate is 220kHz, and the high speed SPI serial line interface that the data communication device that samples is at last crossed in the digital I/O connector outputs among the FPGA of substrate 2.
The analog signal output passage comprises D/A modular converter 202 (DAC) and output modulate circuit.The DAC chip adopts the AD5620 of 12 bit resolutions, and it exports settling time is 8us, and has outside reference source AD780 that the 2.5V normal voltage is provided.The output area of DAC is 0～2.5V, the output modulate circuit comprises electric current and voltage selector switch, switch-capacitor filtering, voltage amplification, calibration selector switch, V/I transducer (voltage turns electric current), selects analog switch can select output voltage or output current through electric current and voltage.When output voltage, output signal makes the signal cunning that flattens through switch-capacitor filtering, is amplified to-output area of 10V～10V finally by the overvoltage amplifying circuit; When output current, by V/I transducer (voltage turns electric current) voltage is converted to the corresponding magnitude of current.Switch-capacitor filtering adopts the MAX7424 low-pass filter, and its filtered band is 1Hz～30kHz, and the cut-off frequency of filter can be by the control of clock input pin.。
For the measurement of frequency signal, instrumental function plate 2 adopts special-purpose frequency measurement channels.In this passage, measured signal is at first amplified through feedback amplifier, then enters comparator LM311N shaping and obtains square-wave signal, stablizes square-wave signal and converts Transistor-Transistor Logic level to by SN740 again, finally exports FPGA to by digital I/O connector.
Hardware reconfiguration is mainly realized by the FPGA on the substrate 1.Substrate 1 comprises ARM9 core board, FPGA, CPLD, power management as shown in Figure 2, ethernet network interface and USB interface.Instrumental function plate 2 is connected with substrate by two 64-pin plates to board connector connection (being the digital I/O connector among Fig. 3), being conducive to the user follows according to different tested objects and the different instrumental function plate 2 of performance requirement design, and need not change other instrument components, improved flexibility and the reusability of system.The present invention is on the hardware structure of substrate 1, and adopting ARM9 core board+FPGA is core, and comprehensively the former high-performance, low-power consumption and latter's parallel processing, the configurable separately advantage of algorithm consist of the carrier of soft and hardware reconfigurable system.On software architecture, based on ARM9 core board 101 operation embedded OSs, can develop and manage the network service correlation function easily, realize the LXI interface of instrument.In addition, also have power management on the substrate 1, give substrate 1 and instrumental function plate 2 provide 4 kinds of common voltage :+12V ,-12V, 5V, 3.3V.On Interface design, except ethernet network interface, substrate 1 has kept USB interface and RS232C serial ports, makes things convenient for instrument testing and function upgrading in the future.
The schematic block circuit diagram of substrate 1 as shown in Figure 4, wherein the position of FPGA is in the center of restructural instrument, its upper strata links to each other with the ARM9 core board by data/address/control bus, bottom links to each other with instrumental function plate 2 by digital I/O connector.For example, when system was used as function of multimeter, FPGA at first processed the data that ADC collects, and is then read by data/address bus by ARM9; And for example, when system was used for the signal generator function, ARM9 will be by the corresponding FPGA of total line traffic control, the control sequential of output DAC, thus control DAC exports corresponding analog quantity.
FPGA is based on the volatibility device of SRAM technology, supports real-time circuit reconstruct, and the hardware circuit information of its inside can be lost after power down, therefore needs external memory device.After system powered on, the configuration module of CPLD read the hardware circuit configuration information from FLASH automatically, the logical circuit of configuration FPGA inside.Under electrifying condition, if the user need to change instrumental function, as long as send order to ARM9 from host computer, reconfigure fpga logic circuit 3 by ARM9 notice CPLD again.In addition, because FPGA is connected connection by two 64-pin numeral I/O connectors with the test function plate, so the corresponding instrumental function of each I/O mouth on the instrument bus all can be redefined by the user.Redefining of the reconstruct of fpga logic circuit 3 and digital I/O interface makes the function of instrument hardware that corresponding change also occur, the final on-line reorganization of realizing the instrument hardware function.
Fig. 5 is the software architecture diagram of this instrument, comprises fpga logic circuit 3, test program set 4 and Web server 5.Wherein fpga logic circuit 3 is realized in FPGA, and test program set 4 and Web server 5 are to realize in the built-in Linux slave computer operating system based on ARM9.
The bottom instrument sequential logical circuit of fpga logic circuit 3 is responsible for the chip communications such as A/D, D/A with instrumental function plate 2, and the Bus Interface Unit on its upper strata is responsible for communicating by letter with the ARM9 core board.In addition, the function of FPGA internal RAM is that data are deposited and data buffering, and the function of SFR (Specific Functional Register, special function register) is that the control command that ARM9 sends is resolved.RAM and SFR take the mode of unified addressing, and unified Bus Interface Unit by the upper strata manages it.
The bottom of test program set 4 communicates by driver and fpga logic circuit 4, and its upper strata communicates by SOCKET (socket) agreement and host computer.One, and the fpga logic circuit communication of bottom test program set 4 is main realizes following three functions:, the information that is included in the measured signal in the logical circuit is done further to resolve, be converted into the measured value relevant with instrumental function (such as the magnitude of voltage of universal instrument); The instruction of two, host computer being sent is distributed to different instrument (such as universal instrument, oscilloscope etc.), then instruction is resolved to the control information that can be identified by FPGA; Three, the C/S model of communication Network Based provides a SOCKET server, is used for carrying out alternately with the SOCKET client of host computer.
The user can pass through the webpage of the browser access LXI instrument of host computer operating system, and this webpage is realized by embedded web server 5.Web server adopts the BOA server of increasing income to realize that BOA is the small-sized http server of a single task, is fit to very much be applied in the embedded system.The dynamic web page effect of BOA server realizes by " CGI " (CGI, Common Gateway Interface) technology, and it is for providing alternately interface between the multidate information of webpage and the test program set 4.Except the BOA server, SOCKET client based on FLASH that Web server 5 is also built-in, be used for and the SOCKET server of test program set 4 between data communication.And the data format of this SOCKET is all write with the programmable instrument command standard (SCPI, Standard Command forProgrammable Instrument) that meets the LXI standard, helps the user to carry out secondary development.In addition, the user can pass through the test program set 4 of page download, replacing and configure instrument, reaches the purpose of software on-line reorganization.
Claims (8)
1. based on the parallel multi-channel restructural instrument of LXI, it is characterized in that, comprise substrate, instrumental function plate, fpga logic circuit, test program set and Web server;
The instrumental function plate comprises A/D modular converter, D/A modular converter and frequency/phase measurement module; The A/D modular converter is connected the input modulate circuit with the frequency/phase measurement module, the D/A modular converter connects the output modulate circuit; Analog signal amount in the test signal inputs to the input modulate circuit of instrumental function plate, then converts digital output to substrate through the A/D modular converter; Frequency signal inputs to the input modulate circuit of instrumental function plate, and the frequency/phase measurement module is converted into the square wave of Transistor-Transistor Logic level, exports substrate to; The digital quantity that substrate exports the instrumental function plate to converts analog signal to through the D/A modular converter, then by the output of output modulate circuit;
The instrumental function plate is connected digital I/O connector and connects with substrate;
Substrate comprises ARM9 core board, FPGA, CPLD, power management, ethernet network interface and USB interface, also is provided with in addition the RS232C serial ports for debugging; Power management provides voltage to substrate and instrumental function plate, and the upper strata of FPGA links to each other with the ARM9 core board by data/address/control bus, and bottom links to each other with the instrumental function plate by digital I/O connector; After system powered on, the configuration module of CPLD read the hardware circuit configuration information from the FLASH memory automatically, the logical circuit of configuration FPGA inside; Under electrifying condition, if the user need to change instrumental function, send order to the ARM9 core board from host computer, reconfigure fpga logic circuit among the FPGA by ARM9 core board notice CPLD again; The corresponding instrumental function of each I/O mouth on the instrument bus is redefined by the user;
The fpga logic circuit realizes that in FPGA test program set and Web server are to realize in the built-in Linux slave computer operating system based on the ARM9 core board;
The bottom instrument sequential logical circuit of fpga logic circuit is responsible for communicating by letter with A/D modular converter, the D/A modular converter of instrumental function plate, and the Bus Interface Unit on its upper strata is responsible for communicating by letter with the ARM9 core board; The function of FPGA internal RAM is that data are deposited and data buffering, and the function of SFR is that the control command that the ARM9 core board is sent is resolved, and RAM and SFR take the mode of unified addressing, and unified Bus Interface Unit by the upper strata manages it; SFR represents the special function register;
The bottom of test program set communicates by driver and fpga logic circuit, and its upper strata communicates by SOCKET agreement and host computer; Test program set is mainly realized: one, with the fpga logic circuit communication of bottom, the information that is included in the measured signal in the logical circuit is done further to resolve, be converted into the measured value relevant with instrumental function; The instruction of two, host computer being sent is distributed to different instruments, then instruction is resolved to the control information that can be identified by FPGA; Three, the C/S model of communication Network Based provides a SOCKET server, is used for carrying out alternately with the SOCKET client of host computer;
The user is by the webpage of the browser access LXI instrument of host computer operating system, and this webpage is realized by embedded web server; Web server adopts the BOA server increase income to realize, SOCKET client based on FLASH that Web server is also built-in, be used for and the SOCKET server of test program set between data communication; And the data format of this SOCKET is all write with the programmable instrument command standard that meets the LXI standard; The user reaches the purpose of software on-line reorganization by the test program set of page download, replacing and configure instrument.
2. the parallel multi-channel restructural instrument based on LXI according to claim 1 is characterized in that substrate and instrumental function plate are installed in the instrument container jointly.
3. the parallel multi-channel restructural instrument based on LXI according to claim 1 is characterized in that, instrumental function plate connecting interface plate, and test signal inputs to the instrumental function plate by interface board.
4. the parallel multi-channel restructural instrument based on LXI according to claim 1, it is characterized in that, the instrumental function plate comprises 4 A/D modular converters, 4 D/A modular converters, 2 frequency/phase measurement modules, 4 A/D modular converters consist of 4 tunnel analog signals with the input modulate circuit and measure passage, 4 D/A modular converters consist of 4 road analog signal output passages with the output modulate circuit, and 2 frequency/phase measurement modules consist of 2 tunnel frequency detecting designated lanes with the input modulate circuit.
5. the parallel multi-channel restructural instrument based on LXI according to claim 4 is characterized in that, analog signal is measured passage and comprised input modulate circuit and A/D modular converter, and the analog signal measuring range is-10V～10V; The input modulate circuit comprises overcurrent protection, input pattern selector switch, programmable amplifier and low-pass filtering, all tested test signals enter the input modulate circuit of instrumental function plate with difference modes, when this analog signal is measured passage as signal measurement or calibration function, input analog selector switch response, the calibration voltage of the positive terminal of tested test signal or DAC is linked into the positive terminal of programmable amplifier; On the other hand, when this analogue measurement channel selecting is difference, single-ended or AISENSE measurement pattern, analog selector switch correspondingly the end of oppisite phase of input signal, or AISENSE be linked into the backward end of programmable amplifier; Programmable amplifier adopts AD8250, and tested measuring-signal is converted to single-ended signal through programmable amplifier, is input to the ADC chip through low pass filter again; ADC adopts the AD7898 of 12 bit resolutions, and high sampling rate is 220kHz, and the data communication device that samples is at last crossed among the FPGA that the high-speed figure I/O connector outputs to substrate.
6. the parallel multi-channel restructural instrument based on LXI according to claim 4 is characterized in that, the analog signal output passage comprises D/A modular converter and output modulate circuit; The DAC chip adopts the AD5620 of 12 bit resolutions, and it exports settling time is 8us, and has outside reference source AD780 that the 2.5V normal voltage is provided; The output area of DAC is 0～2.5V, and the output modulate circuit comprises electric current and voltage selector switch, switch-capacitor filtering, voltage amplification, calibration selector switch, V/I transducer, selects analog switch can select output voltage or output current through electric current and voltage; When output voltage, output signal makes the signal cunning that flattens through switch-capacitor filtering, is amplified to-output area of 10V～10V finally by the overvoltage amplifying circuit; When output current, by the V/I transducer voltage is converted to the corresponding magnitude of current; Switch-capacitor filtering adopts the MAX7424 low-pass filter, and its filtered band is 1Hz～30kHz, and the cut-off frequency of filter can be by the control of clock input pin.
7. the parallel multi-channel restructural instrument based on LXI according to claim 4, it is characterized in that, in the frequency detecting designated lane, measured signal is at first amplified through feedback amplifier, then enter comparator LM311N shaping and obtain square-wave signal, stablize square-wave signal and convert Transistor-Transistor Logic level to by SN740 again, finally export FPGA to by digital I/O connector.
8. the parallel multi-channel restructural instrument based on LXI according to claim 1, it is characterized in that, redefining of fpga logic circuit and digital I/O connector interface makes the function of instrument hardware that corresponding change also occur, and realizes the on-line reorganization to the instrument hardware function.
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| CN102521958B (en) * | 2011-12-20 | 2014-11-26 | 陕西海泰电子有限责任公司 | B type LXI multifunctional data acquisition instrument |
| CN103257910B (en) * | 2013-04-26 | 2016-08-03 | 北京航空航天大学 | Can be used for the embedded reconfigurable general-utility test platform of LXI of on-the-spot test |
| CN103308880B (en) * | 2013-07-08 | 2016-02-10 | 北京新航智科技有限公司 | A kind of calibration steps of multichannel analog amount current input module of production in enormous quantities |
| CN103561116B (en) * | 2013-11-20 | 2016-09-21 | 哈尔滨工业大学 | Use the method that restructural PXI serial communication card realizes remote reconstruction |
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| CN115550336A (en) * | 2022-09-16 | 2022-12-30 | 宁夏隆基宁光仪表股份有限公司 | NB-IoT meter test communication method, system and test equipment based on Web |
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