CN102136723A - Secondary inversion peak absorption circuit - Google Patents
Secondary inversion peak absorption circuit Download PDFInfo
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- CN102136723A CN102136723A CN2011100988582A CN201110098858A CN102136723A CN 102136723 A CN102136723 A CN 102136723A CN 2011100988582 A CN2011100988582 A CN 2011100988582A CN 201110098858 A CN201110098858 A CN 201110098858A CN 102136723 A CN102136723 A CN 102136723A
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Abstract
The invention discloses a secondary inversion peak absorption circuit. One end of an electrolytic capacitor is connected with the anode of a DC (Direct Current) bus; the other end of the electrolytic capacitor is connected with the anode end of a diode; the cathode of the diode is connected with the cathode of the DC bus; an emitter of an IGBT (Insulated Gate Bipolar Transistor) is connected with between the electrolytic capacitor and the diode; a collector of the IGBT is connected with a resistor which is connected with the anode of the DC bus; a grid of the IGBT is connected with a 7th pin of a comparator, a 5th pin of the comparator is connected with the anode of the DC bus, and a 6th pin of the comparator is connected with a set voltage. The invention has a reasonable structure and can effectively limit the peak voltage in a safe range.
Description
Technical field
The present invention relates to a kind of electric welding machine and absorb circuit with secondary inversion spike.
Background technology
The IGBT half-bridge circuit is adopted in the secondary inversion, speed when guaranteeing zero crossing, the switching speed of IGBT is very fast, because the effect of the inductor in the welding circuit, when current zero-crossing point, can produce due to voltage spikes, welding current is big more, and this peak voltage is high more, can damage the IGBT module when peak voltage surpasses certain value.
Summary of the invention
The object of the present invention is to provide a kind of rational in infrastructurely, the secondary inversion spike that peak voltage can be limited in the safe range absorbs circuit.
Technical solution of the present invention is:
A kind of secondary inversion spike absorbs circuit, it is characterized in that: comprise electrochemical capacitor, one end of electrochemical capacitor is connected with the positive pole of dc bus, the other end of electrochemical capacitor is connected with the diode cathode end, the diode cathode end is connected with the negative pole of dc bus, the emitter of IGBT pipe is connected between electrochemical capacitor and the diode, the collector electrode connecting resistance of IGBT pipe, resistance is connected with the positive pole of dc bus, the grid of IGBT pipe connects the 7th pin of comparator, the 5th pin of comparator is connected with the positive pole of dc bus, and the 6th pin of comparator connects setting voltage.
Described electrochemical capacitor is formed by a plurality of capacitors in series.
The present invention is rational in infrastructure, can effectively peak voltage be limited in the safe range.
Description of drawings
The invention will be further described below in conjunction with drawings and Examples.
Fig. 1 is the structural representation of one embodiment of the invention.
Embodiment
A kind of secondary inversion spike absorbs circuit, comprise electrochemical capacitor, one end of electrochemical capacitor is connected with the positive pole of dc bus, the other end of electrochemical capacitor is connected with the positive terminal of diode V2, diode V2 negative pole end is connected with the negative pole of dc bus, the emitter of IGBT pipe V1 is connected between electrochemical capacitor and the diode V2, the collector electrode connecting resistance R1 of IGBT pipe, resistance R 1 is connected with the positive pole of dc bus, the grid of IGBT pipe connects the 7th pin of comparator U1, the 5th pin of comparator U1 is connected with the positive pole of dc bus, and the 6th pin of comparator U1 connects setting voltage.Described electrochemical capacitor is in series by three capacitor C1 ~ C3.
Operation principle of the present invention is:
Dc bus+, the peak voltage at-two ends absorbs by capacitor C 1 ~ C3 and diode V2, and capacitor C 1 ~ C3 is jumbo electrochemical capacitor, and diode V2 is a fast recovery diode, mainly is in order to prevent that the charging voltage on the electric capacity from influencing the operate as normal of circuit.By the voltage on 5 pin monitoring capacitor C, 1 ~ C3 of comparator U1, when the magnitude of voltage VSET of the setting of 6 pin that surpass comparator U1, the 7 pin output high level signal of comparator U1, IGBT is managed V1 open, high-power resistance R1 just is parallel to the two ends of capacitor C 1 ~ C3 like this, makes capacitor discharge, when the voltage on the electric capacity is reduced to VSET because of the discharge of resistance, IGBT pipe V1 turn-offs, and the work that goes round and begins again so just can be controlled voltage on the dc bus in the scope of safety.
Claims (2)
1. a secondary inversion spike absorbs circuit, it is characterized in that: comprise electrochemical capacitor, one end of electrochemical capacitor is connected with the positive pole of dc bus, the other end of electrochemical capacitor is connected with the diode cathode end, the diode cathode end is connected with the negative pole of dc bus, the emitter of IGBT pipe is connected between electrochemical capacitor and the diode, the collector electrode connecting resistance of IGBT pipe, resistance is connected with the positive pole of dc bus, the grid of IGBT pipe connects the 7th pin of comparator, the 5th pin of comparator is connected with the positive pole of dc bus, and the 6th pin of comparator connects setting voltage.
2. secondary inversion spike according to claim 1 absorbs circuit, and it is characterized in that: described electrochemical capacitor is formed by a plurality of capacitors in series.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2011100988582A CN102136723A (en) | 2011-04-20 | 2011-04-20 | Secondary inversion peak absorption circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2011100988582A CN102136723A (en) | 2011-04-20 | 2011-04-20 | Secondary inversion peak absorption circuit |
Publications (1)
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CN102136723A true CN102136723A (en) | 2011-07-27 |
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Family Applications (1)
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CN2011100988582A Pending CN102136723A (en) | 2011-04-20 | 2011-04-20 | Secondary inversion peak absorption circuit |
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CN (1) | CN102136723A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105024581A (en) * | 2015-08-07 | 2015-11-04 | 上海沪工焊接集团股份有限公司 | Peak absorption circuit and IGBT full-bridge inverter circuit |
WO2017016302A1 (en) * | 2015-07-27 | 2017-02-02 | 中兴通讯股份有限公司 | Power failure preventing method, circuit, and apparatus |
US9787184B2 (en) | 2014-09-09 | 2017-10-10 | Hon Hai Precision Industry Co., Ltd. | Multiple-phase power circuit |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07284272A (en) * | 1994-04-08 | 1995-10-27 | Nichicon Corp | Smoothing circuit |
CN101527517A (en) * | 2009-04-10 | 2009-09-09 | 南京航空航天大学 | Twin-stage type matrix converter with direct-current excitation regulation and voltage frequency transformation |
CN101826720A (en) * | 2010-05-27 | 2010-09-08 | 中南大学 | Clamping absorption integrated circuit for two-stage matrix converter |
CN202009230U (en) * | 2011-04-20 | 2011-10-12 | 南通三九焊接机器制造有限公司 | Secondary inverting peak absorbing circuit |
-
2011
- 2011-04-20 CN CN2011100988582A patent/CN102136723A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07284272A (en) * | 1994-04-08 | 1995-10-27 | Nichicon Corp | Smoothing circuit |
CN101527517A (en) * | 2009-04-10 | 2009-09-09 | 南京航空航天大学 | Twin-stage type matrix converter with direct-current excitation regulation and voltage frequency transformation |
CN101826720A (en) * | 2010-05-27 | 2010-09-08 | 中南大学 | Clamping absorption integrated circuit for two-stage matrix converter |
CN202009230U (en) * | 2011-04-20 | 2011-10-12 | 南通三九焊接机器制造有限公司 | Secondary inverting peak absorbing circuit |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9787184B2 (en) | 2014-09-09 | 2017-10-10 | Hon Hai Precision Industry Co., Ltd. | Multiple-phase power circuit |
WO2017016302A1 (en) * | 2015-07-27 | 2017-02-02 | 中兴通讯股份有限公司 | Power failure preventing method, circuit, and apparatus |
CN106711981A (en) * | 2015-07-27 | 2017-05-24 | 中兴通讯股份有限公司 | Power-down prevention method, circuit and device |
CN105024581A (en) * | 2015-08-07 | 2015-11-04 | 上海沪工焊接集团股份有限公司 | Peak absorption circuit and IGBT full-bridge inverter circuit |
CN105024581B (en) * | 2015-08-07 | 2018-03-09 | 上海沪工焊接集团股份有限公司 | IGBT full bridge inverters |
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Application publication date: 20110727 |