CN102118224A - Method and device for treating soft bit values - Google Patents
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- CN102118224A CN102118224A CN2010106219688A CN201010621968A CN102118224A CN 102118224 A CN102118224 A CN 102118224A CN 2010106219688 A CN2010106219688 A CN 2010106219688A CN 201010621968 A CN201010621968 A CN 201010621968A CN 102118224 A CN102118224 A CN 102118224A
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Abstract
The invention relates to a method and a device for treating soft bit values. The method for treating soft bit values comprises the following steps: gaining the soft bit values according to a gain coefficient and limiting the amplitude of the gained soft bit values; summing the absolute values of a plurality of soft bit values and judging if the soft bit values having preset lengths meet a setting condition; and adjusting the gain coefficient according to the sum of the absolute values of the soft bit values when the soft bit values having preset lengths meet the setting condition. According to the invention, by judging a preset threshold, a preset length or preset scope and the soft bit values having the preset lengths, and using different step values, the gain coefficient of the soft bit values is adjusted in the self-adaption feedback mode through the step values, wherein the preset threshold, the preset threshold/preset scope or the preset length are only related to a code rate, thereby being capable of adjusting the soft bit values at the right time, increasing the decoding efficiency, reducing the influence of channel change on demodulation decoding, and having wide application range.
Description
Technical field
The present invention relates to media data processing method, particularly relate to the bit soft value processing method and the device of symbol de-maps output.
Background technology
In the communication technology, because the increase of communication data storage media density and data transmission bauds, channel condition may worsen, and more how mistake may take place.Therefore, wire/wireless communication should use error correction method or the error correcting code with high error-correcting performance usually in communication channel.
In general, be that bit-level data s is mapped to complex symbol S at transmitting terminal by modulation, wherein s can comprise m data, for example a0, a1 ... am, the size of complex symbol S can be M, and M=2m.Concrete mapping mode has a variety of, different modulation systems to determine symbol error rate and bit error rate.Accordingly, at receiving terminal, demodulator obtains the bit decision of data s according to the complex symbol S that receives.The symbol level signal is received at receiving terminal by the transmission and the channel (comprising various transmission meanss and various channel) of communication system, through channel equalization or interference-cancelled signals detection etc., always the equivalent transmission channel of signal can be expressed as: r=h*S+n.Wherein, h is known fully or has been received the gain coefficient that device estimates that n represents remaining interference and noise.
As a rule, have two kinds of different approach to obtain judgement, a kind of is to carry out hard decision according to the least square Euclidean distance between h*S and r to obtain estimated value, and this judgement need be set up the quantized value of deciding thresholding and thresholding usually when reality is carried out; In addition, in cascade system, because the decoder of follow-up error control coding needs the information of bit-level usually, therefore, can adopt another kind of mode usually, promptly soft decision demodulation for example calculates the log-likelihood ratio of each bit, or is called bit soft value.
After obtaining bit soft value, in theory, it can be directly inputted into corresponding decoder, to obtain decode results.Yet, in reality realized, there was different decay in different channels to signal, and the decoder processing has certain bit wide requirement to the input data, if the required live part of decoding of bit soft value can't drop in the desired bit wide scope of decoder, then decoding performance can reduce.
At present, the existing conventional method adopts usually and earlier bit soft value is gained, and again it is carried out amplitude limit, thereby makes the bit wide requirement of the device of coincidence decoding as a result of amplitude limit, and on this basis the amplitude limit result is deciphered.Use that this method gains to bit soft value and during amplitude limit, bigger to the dependence of channel estimating; When deviation appearred in channel estimating, probably the processing to bit soft value produced bigger influence, and decoding that can't be by the later stage, error correction etc. detect or get rid of.In addition, because to be subjected to channel effect bigger, therefore lack a kind of comparatively general method and apparatus that bit soft value is handled.
Summary of the invention
The technical problem that the present invention solves provides a kind of bit soft value processing method and device, can be widely used in multiple demodulation method and the device, and reduce the influence of channel variation to demodulation coding.
For solving the problems of the technologies described above, the invention provides a kind of bit soft value processing method, comprising: according to gain coefficient, bit soft value is gained, and the bit soft value after the gain is carried out amplitude limit; A plurality of bit soft value absolute values are sued for peace, and whether the bit soft value of judging preseting length meets and imposes a condition; When the bit soft value of preseting length meets when imposing a condition,, described gain coefficient is adjusted according to the bit soft value absolute value sum that is obtained.
In addition, the present invention also provides a kind of bit soft value processing unit, comprising: gain amplitude limit unit receives bit soft value, and by gain coefficient described bit soft value is gained, and the bit soft value after the gain is carried out amplitude limit; Identifying unit is sued for peace to a plurality of bit soft value absolute values, and whether the bit soft value of judging preseting length meets and impose a condition; The gain coefficient adjustment unit when the bit soft value of preseting length meets when imposing a condition, according to obtaining described absolute value and value in the described identifying unit, is adjusted described gain coefficient.
Compared with prior art, the present invention has the following advantages: according to the bit soft value absolute value with value or mean value and setting threshold, or with the length of bit soft value and the comparative result of preseting length, adopt different step values, and in the mode of self adaptation feedback the gain coefficient of bit soft value is adjusted by this step value, wherein, setting threshold, preseting length or step value are only relevant with the coding/decoding code check and do not rely on channel estimating, thereby can not only adjust bit soft value in good time, improve decoding efficiency, and reduced the influence of channel variation, had extensive applicability demodulation coding.
Description of drawings
By the more specifically explanation of the preferred embodiments of the present invention shown in the accompanying drawing, above-mentioned and other purpose, feature and advantage of the present invention will be more clear.Reference numeral identical in whole accompanying drawings is indicated identical part.Painstakingly do not draw accompanying drawing, focus on illustrating purport of the present invention by actual size equal proportion convergent-divergent.
Fig. 1 is the schematic flow sheet of a kind of execution mode of bit soft value processing method of the present invention;
Fig. 2 is the schematic flow sheet of a step S2 shown in Figure 1 execution mode;
Fig. 3 is the schematic flow sheet of the another kind of execution mode of step S2 shown in Figure 1;
Fig. 4 is the structural representation of a kind of execution mode of bit soft value processing unit of the present invention;
Fig. 5 is the structural representation of a kind of execution mode of identifying unit shown in Figure 4;
Fig. 6 is the structural representation of the another kind of execution mode of identifying unit shown in Figure 4;
Fig. 7 is the structural representation of a kind of execution mode of gain coefficient adjustment unit shown in Figure 4;
Fig. 8 is the structural representation of a kind of specific embodiment of bit soft value processing unit of the present invention.
Embodiment
A lot of details have been set forth in the following description so that fully understand the present invention.But the present invention can implement much to be different from alternate manner described here, and those skilled in the art can do similar popularization under the situation of intension of the present invention, so the present invention is not subjected to the restriction of following public concrete enforcement.
Secondly, the present invention utilizes schematic diagram to be described in detail, when the embodiment of the invention is described in detail in detail; for ease of explanation; the profile of expression device architecture can be disobeyed general ratio and be done local the amplification, and described schematic diagram is example, and it should not limit the scope of protection of the invention at this.The three dimensions size that in actual fabrication, should comprise in addition, length, width and the degree of depth.
Below in conjunction with the drawings and specific embodiments, embodiment of the present invention is further specified.
With reference to figure 1, a kind of execution mode of bit soft value processing method of the present invention can comprise:
Step S1 according to gain coefficient, gains bit soft value, and according to the decoding code check, the bit soft value after the gain is carried out amplitude limit;
Step S2 to the summation of the absolute value of a plurality of bit soft values, when the bit soft value of preseting length meets when imposing a condition, enters step S3;
Step S3 according to the bit soft value absolute value sum that step S2 obtains, adjusts described gain coefficient.
Specifically, in step S1, the initial value of described gain coefficient and described amplitude limit scope can determine according to described decoding code check, and wherein, the decoding code check is encoder bit rate, is considered as known fully or attempted or estimation and knowing by receiving terminal at receiving terminal.For example, when the coding/decoding code check was 0.8, the initial value of described gain coefficient can be 5.0, and the amplitude limit scope can be between-7 to+7.
In a kind of embodiment, with reference to figure 2, step S2 can comprise:
Step S201, the bit soft value absolute value sum of calculating preseting length;
Step S202, bit soft value absolute value sum and setting threshold that step S201 is obtained compare, and when described soft value absolute value sum and described setting threshold differ when exceeding preset range, then meet to impose a condition, abandon handling described bit soft value, enter step S3; Otherwise, do not meet and impose a condition, export described bit soft value, return execution in step S1.
Specifically, through deinterleaving, obtain to correspond respectively to bit b
1.。, b
2, b
1, b
0Soft value LLR
3, LLR
1.。。, LLR
1, LLR
0, earlier the absolute value of soft value is carried out read group total by step S201, obtain soft value absolute value sum S:S=SUM (| LLR
1|+.。。+|LLR
2|+|LLR
1|+|LLR
0|)。
Wherein, in step S201, the preseting length that carries out the bit soft value of read group total can be according to the result of disposal ability, required precision and the deinterleaving of decoder and concrete the setting.In one embodiment, can adopt frame length, for example can be the LDPC frame length as the bit soft value preseting length.In another embodiment, also can the preseting length of bit soft value be set according to the product of frame length and multiplying power coefficient, this multiplying power coefficient can be the logarithm of complex symbol size; For example, for adopting M-QAM to modulate the complex symbol that is obtained, the multiplying power coefficient can be log
2M.In another execution mode, also can carry out specifically determining to described preseting length according to the symbol lengths and the designing requirement of deinterleaving.
Wherein, also can in step S201, carry out buffer memory, wait to obtain after the comparative result of step S202, determine again described a plurality of bit soft values are exported or abandon to handle a plurality of bit soft values that carry out read group total.
Obtain to enter step S202 after a plurality of bit soft value sums according to step S201.Wherein, described setting threshold or described preset range can be determined according to the coding/decoding code check, concrete, described setting threshold or described preset range can be the function of the current coding/decoding code check that adopts, and its concrete corresponding relation can obtain by emulation.For example, when the coding/decoding code check is 0.8, and described preseting length is when adopting a LDPC frame length to import the length of soft value, and this setting threshold can be between 13400-13500.
Wherein, describedly abandon handling and to comprise: a plurality of bit soft values of institute's buffer memory are exported one by one and still it deciphered according to the mode of " first in first out ", but do not adopt its corresponding decode results; Or abandon a plurality of bit soft values of institute's buffer memory and it is not deciphered; Or other abandons processing mode.
In another execution mode, step S202 also can comprise: the bit soft value absolute value sum that is obtained according to step S201, obtain its mean value with respect to preseting length, again the described mean value and second setting threshold are compared, by judging that whether comparative result exceeds in second preset range, imposes a condition to determine whether to meet.When described mean value and second setting threshold differ when exceeding preset range, then meet to impose a condition, abandon handling described bit soft value, enter step S3; Otherwise, do not meet and impose a condition, export described bit soft value, return execution in step S1.
Wherein, second setting threshold or second preset range can be determined according to the coding/decoding code check.For example, when the coding/decoding code check is 0.8, and described preseting length is when adopting a LDPC frame length to import the length of soft value, and this second setting threshold can be between 3.2-3.8.
In another kind of embodiment, with reference to figure 3, step S2 can comprise:
Step S211 exports bit soft value one by one, calculates the absolute value and the value of the bit soft value of being exported, and calculates the length of the bit soft value of exporting;
Step S212 compares the length and the preseting length of output bit soft value, when the length of output bit soft value reaches preseting length, enters step S213, otherwise, continue execution in step S212;
Step S213, bit soft value absolute value sum and setting threshold that step S211 is obtained compare, and when described soft value absolute value sum and described setting threshold differ when exceeding preset range, then meet to impose a condition, abandon handling described bit soft value, enter step S3; Otherwise, do not meet and impose a condition, export described bit soft value, return execution in step S1.
Wherein, described preseting length can be set according to the factors such as product of frame length or frame length and multiplying power coefficient.Described multiplying power coefficient can be the logarithm of complex symbol size, and for example, for adopting M-QAM to modulate the complex symbol that is obtained, the multiplying power coefficient can be log
2M.Also can carry out specifically determining to described preseting length according to the symbol lengths and the designing requirement of deinterleaving.
In this embodiment, owing to the bit soft value of being exported is not carried out buffer memory, satisfied the real-time of cascade unit.
Next, execution in step S3.
In one embodiment, can comprise described gain coefficient adjustment: described absolute value and value and described setting threshold are compared; When described absolute value and value during, increase described gain coefficient greater than described setting threshold; When described absolute value and value are not more than described setting threshold, reduce described gain coefficient.Wherein, when described gain coefficient being adjusted, can increase or reduce a step value at every turn.This step value is also determined by the coding/decoding code check.For example, when the coding/decoding code check was 0.8, step value can be 0.5, and the gain coefficient initial value is 5.0; When described absolute value and value during, on the value of previous gain coefficient, increase a step value greater than described setting threshold; When described absolute value and value are not more than described setting threshold, on the value of previous gain coefficient, reduce a step value.
In another embodiment, can comprise also to the adjustment mode of described gain coefficient the described gain coefficient and the product factor are multiplied each other that the described product factor can be determined by the coding/decoding code check; When described absolute value and value during greater than described setting threshold, this product factor is the value greater than 1; When described absolute value and value were not more than described setting threshold, this product factor was the value less than 1.
With reference to figure 4, the present invention also provides a kind of bit soft value processing unit, and its embodiment can comprise:
Gain amplitude limit unit 500 receives bit soft value, and by gain coefficient described bit soft value is gained, and according to the decoding code check, the bit soft value after the gain is carried out amplitude limit;
Identifying unit 520 carries out absolute value summation to a plurality of bit soft values, and whether the bit soft value of judging preseting length meets and impose a condition;
Gain coefficient adjustment unit 540 when the bit soft value of preseting length meets when imposing a condition, according to obtaining described absolute value and value in the identifying unit 520, is adjusted described gain coefficient.
Specifically, gain amplitude limit unit 500 can comprise gain unit and amplitude limit unit.Described gain unit can adopt multiplier, by gain coefficient and described bit soft value are multiplied each other, to realize gain; Described amplitude limit unit can adopt amplitude limiter to pass through fixing cut position to realize the amplitude limit to the bit soft value of being exported by gain unit.Wherein, gain coefficient and amplitude limit scope can determine that for example, when the coding/decoding code check was 0.8, the initial value of described gain coefficient can be 5.0 according to described decoding code check, and the amplitude limit scope can be between-7 to+7; The implementation of described gain unit and described amplitude limit unit does not cause restriction to invention thinking of the present invention.
In a kind of embodiment, with reference to figure 5, identifying unit 520 can comprise:
Input-output unit 511 receives the bit soft value of being exported by gain amplitude limit unit 500, the line output of going forward side by side;
With value computing unit 512,, calculate the bit soft value absolute value sum of preseting length according to the bit soft value that input-output unit 511 is received;
With value comparing unit 513, to compare with bit soft value absolute value sum and the setting threshold that value computing unit 512 obtains, when described soft value absolute value sum and described setting threshold differ when exceeding preset range, meet and impose a condition, make input-output unit 511 abandon bit soft value and make and be worth the described bit soft value absolute value sum of computing unit 512 outputs; Otherwise, do not meet and impose a condition, make input-output unit 511 output bit soft values.
Wherein, input-output unit 511 can further comprise buffer unit, and a plurality of bit soft values of being imported are carried out buffer memory.
Wherein and value computing unit 512 can further comprise the preseting length setup unit, preseting length is set.Particularly, described preseting length can be frame length or is the product of frame length and multiplying power coefficient.Described multiplying power coefficient can be the logarithm of complex symbol size, and for example, for adopting M-QAM to modulate the complex symbol that is obtained, the multiplying power coefficient can be log
2M.Described preseting length also can carry out specifically determining according to the symbol lengths and the designing requirement of deinterleaving.
Wherein and value comparing unit 513 can further comprise: difference computational unit, calculate the difference of bit soft value absolute value sum and setting threshold; And comparing unit, the relatively result and the preset range of difference computational unit.Described setting threshold or described preset range can be the function of the current coding/decoding code check that adopts, and its concrete corresponding relation can obtain by emulation.
In another embodiment and value comparing unit 513 can comprise: average calculation unit, according to bit soft value absolute value sum, calculate its mean value with respect to preseting length; And mean value comparing unit, the described mean value and second setting threshold are compared, when described mean value and second setting threshold differ when exceeding second preset range, meet to impose a condition, make described input-output unit abandon bit soft value and described bit soft value absolute value sum; Otherwise, do not meet and impose a condition, make described input-output unit output bit soft value.Wherein, described second setting threshold or second preset range can be determined according to the coding/decoding code check.
When obtaining value that described soft value absolute value sums and described setting threshold differ in preset range, can make input-output unit 511 export bit soft value one by one according to the mode of " first in first out " with value comparing unit 513; Otherwise, make input-output unit 511 abandon bit soft value.
In another kind of embodiment, with reference to figure 6, identifying unit 520 can comprise: input-output unit 521, receive the bit soft value of being exported by gain amplitude limit unit 500, and output one by one; Sum unit 522, calculate bit soft value absolute value that input-output unit 521 exported and value; Length computation unit 523, the length of the bit soft value that calculating input-output unit 521 is exported; Length comparing unit 524, length and preseting length that comparison length computing unit 523 obtains make comparing with value and setting threshold of 525 pairs of bit soft value absolute values of comparing unit; Comparing unit 525, obtain the bit soft value absolute value from sum unit 522 and value, when the length of output bit soft value reaches preseting length, more described bit soft value absolute value with value and setting threshold; When described soft value absolute value sum and described setting threshold differ when exceeding preset range, meet to impose a condition; Otherwise, do not meet and impose a condition.
Particularly, input-output unit 521 is directly exported received bit soft value, bit soft value of every output, and sum unit 522 adds up to it, and the length computation result of length computation unit 523 increases by 1.
Wherein, length computation unit 523 can be counter or the realization of other counting circuit.
Wherein, in length comparing unit 524, described preseting length can be the product of frame length or frame length and multiplying power coefficient.Described multiplying power coefficient can be the logarithm of complex symbol size, and for example, for adopting M-QAM to modulate the complex symbol that is obtained, the multiplying power coefficient can be log
2M.Described preseting length also can carry out specifically determining according to the symbol lengths and the designing requirement of deinterleaving.
Next, identifying unit 520 exports bit soft value to follow-up processing unit, and decoding unit for example, and will export gain coefficient adjustment unit 540 to value when the bit soft value of preseting length meets when imposing a condition, is adjusted described gain coefficient.
In a kind of embodiment, with reference to figure 7, gain coefficient adjustment unit 540 can comprise:
Judging unit 541 is judged the magnitude relationship of described absolute value and value and described setting threshold;
Step-length is provided with unit 542, and the step value that is used to adjust gain coefficient is provided with;
Wherein, judging unit 541 can comprise difference computational unit and comparing unit, also can adopt other implementation, and its specific implementation does not produce restriction to thinking of the present invention.
Step-length is provided with unit 542 and can be provided with described step value according to the coding/decoding code check.In specific implementation, can finish the function that step-length is provided with unit 542 and adjustment unit 543 by a realization unit, also can be achieved by a plurality of realizations unit.
The adjustment mode that adjustment unit 543 is adopted also exerts an influence to step value.The adjustment mode of adjustment unit 543 can comprise: according to the judged result of judging unit 541, described gain coefficient is added/subtracts step value, particularly, when described absolute value and value during, on the value of previous gain coefficient, increase a step value greater than described setting threshold; When described absolute value and value are not more than described setting threshold, on the value of previous gain coefficient, reduce a step value.In one embodiment, when the coding/decoding code check was 0.8, step value can be 0.5, and adjustment unit 543 is an adder.The adjustment mode of adjustment unit 543 also can comprise: according to the judged result of judging unit 541, step value is multiplied each other as the product factor and described gain coefficient, particularly, when described absolute value and value during greater than described setting threshold, this product factor is the value greater than 1; When described absolute value and value were not more than described setting threshold, this product factor was the value less than 1.
With reference to figure 8, in a kind of specific embodiment of bit soft value processing unit 800 of the present invention, separate the bit soft value LLR that mapping is exported
(i)Input to multiplier 801, G gains according to gain coefficient, obtains G*LLR
(i)Then, gain results inputs to amplitude limiter 802, carries out amplitude limit by fixing cut position; Amplitude limit result one tunnel inputs to follow-up ldpc decoder, and another road inputs to absolute value element 803 and sum unit 804 successively, obtains the absolute value sum of bit soft value; Simultaneously, by 805 pairs in counter the bit soft value of process count, and count results is judged by decision unit 806, when the bit soft value length that is added up reaches preseting length, counter 805 zero clearings, and the absolute value sum of bit soft value inputed to comparing unit 807; When the difference of the absolute value sum of bit soft value and setting threshold surpasses preset range, enter adjustment unit 810; Adjustment unit 810 is at first judged the absolute value sum of bit soft value and the size of setting threshold; When the absolute value sum of bit soft value surpassed setting threshold, 808 couples of gain coefficient G increased a step value t by the first step-length unit; When the absolute value sum of bit soft value was not more than setting threshold, 809 couples of gain coefficient G reduced a step value t by the second step-length unit.
Compared to prior art, bit soft value processing method of the present invention and the device with bit soft value with value or mean value and setting threshold, or the length and the preseting length of bit soft value compared, adopt different adjustment step values according to comparative result, and the gain coefficient of bit soft value is adjusted by the mode of self adaptation feedback, wherein, preseting length, setting threshold/second predetermined threshold, preset range/second preset range or step value are only relevant with the coding/decoding code check and do not rely on channel estimating, thereby can not only adjust bit soft value in good time, improve decoding efficiency, and reduced the influence of channel variation, had extensive applicability demodulation coding.
Though the present invention by the preferred embodiment explanation as above, these preferred embodiments are not in order to limit the present invention.Those skilled in the art without departing from the spirit and scope of the present invention, should have the ability various corrections and additional are made in this preferred embodiment, and therefore, protection scope of the present invention is as the criterion with the scope of claims.
Claims (23)
1. bit soft value processing method comprises:
According to gain coefficient bit soft value is gained, and the bit soft value after the gain is carried out amplitude limit;
A plurality of bit soft value absolute values are sued for peace, and whether the bit soft value of judging preseting length meets and imposes a condition;
When the bit soft value of preseting length meets when imposing a condition,, described gain coefficient is adjusted according to the bit soft value absolute value sum that is obtained.
2. bit soft value processing method as claimed in claim 1 is characterized in that, described a plurality of bit soft value absolute values is sued for peace and whether the bit soft value of judging preseting length meets to impose a condition and comprise:
Calculate the bit soft value absolute value sum of preseting length;
The bit soft value absolute value sum and the setting threshold that are obtained are compared,, then meet to impose a condition when described soft value absolute value sum and described setting threshold differ when exceeding preset range; Otherwise, do not meet and impose a condition.
3. bit soft value processing method as claimed in claim 2, it is characterized in that, described bit soft value absolute value sum and setting threshold are compared comprises: according to the bit soft value absolute value sum that is obtained, obtain its mean value, the more described mean value and second setting threshold are compared with respect to described preseting length; Exceed in second preset range when described mean value and second setting threshold differ, then meet and impose a condition; Otherwise, do not meet and impose a condition.
4. bit soft value processing method as claimed in claim 1 is characterized in that, described a plurality of bit soft value absolute values is sued for peace and whether the bit soft value of judging preseting length meets to impose a condition and comprise:
Export bit soft value one by one, calculate the bit soft value absolute value exported and value, and the length of the calculating bit soft value of exporting;
The length and the preseting length of output bit soft value are compared, when the length of output bit soft value reaches preseting length, meet and impose a condition; Otherwise, then do not meet.
5. as each described bit soft value processing method in the claim 2,3 and 4, it is characterized in that described preseting length is the product of frame length or frame length and multiplying power coefficient.
6. bit soft value processing method as claimed in claim 5 is characterized in that, described multiplying power coefficient is the logarithm of complex symbol size.
7. as each described bit soft value processing method in the claim 2,3 and 4, it is characterized in that the described setting threshold or second setting threshold or preset range or second preset range are the function of the current coding/decoding code check that adopts.
8. bit soft value processing method as claimed in claim 7 is characterized in that, when the coding/decoding code check is 0.8, and described preseting length is when adopting a LDPC frame length to import the length of soft value, and this setting threshold is the value between the 13400-13500.
9. bit soft value processing method as claimed in claim 7 is characterized in that, when the coding/decoding code check is 0.8, and described preseting length is when adopting a LDPC frame length to import the length of soft value, and described second setting threshold is the value between the 3.2-3.8.
10. bit soft value processing method as claimed in claim 1, it is characterized in that, the described adjustment mode that described gain coefficient is adjusted comprises: when described absolute value and value during greater than described setting threshold, and step value of increase on the value of previous gain coefficient; When described absolute value and value are not more than described setting threshold, on the value of previous gain coefficient, reduce a step value.
11. bit soft value processing method as claimed in claim 1 is characterized in that, the described adjustment mode that described gain coefficient is adjusted comprises: the described gain coefficient and the product factor are multiplied each other.
12. bit soft value processing method as claimed in claim 11 is characterized in that, the described product factor is determined by the coding/decoding code check.
13. a bit soft value processing unit comprises:
Gain amplitude limit unit receives bit soft value, and by gain coefficient described bit soft value is gained, and the bit soft value after the gain is carried out amplitude limit;
Identifying unit is sued for peace to a plurality of bit soft value absolute values, and whether the bit soft value of judging preseting length meets and impose a condition;
The gain coefficient adjustment unit when the bit soft value of preseting length meets when imposing a condition, according to obtaining described absolute value and value in the described identifying unit, is adjusted described gain coefficient.
14. bit soft value processing unit as claimed in claim 13 is characterized in that, described identifying unit comprises:
Input-output unit receives the bit soft value by the output of described gain amplitude limit unit, the line output of going forward side by side;
With the value computing unit,, calculate the bit soft value absolute value sum of preseting length according to the bit soft value that described input-output unit receives;
With the value comparing unit, the bit soft value absolute value sum and the setting threshold of described and value computing unit acquisition compared, when described soft value absolute value sum and described setting threshold differ when exceeding preset range, meet to impose a condition; Otherwise, do not meet and impose a condition.
15. bit soft value processing unit as claimed in claim 14 is characterized in that, described and value comparing unit also can further comprise:
Average calculation unit according to bit soft value absolute value sum, is calculated its mean value with respect to preseting length;
The mean value comparing unit compares the described mean value and second setting threshold, when described mean value and second setting threshold differ when surpassing second preset range, meets to impose a condition; Otherwise, do not meet and impose a condition.
16. bit soft value processing unit as claimed in claim 13 is characterized in that, described identifying unit comprises:
Input-output unit receives the bit soft value by the output of described gain amplitude limit unit, and output one by one;
Sum unit, calculate bit soft value absolute value that described input-output unit exports and value;
Length computation unit is calculated the length of the bit soft value of described input-output unit output;
The length comparing unit, length and preseting length that more described length computation unit obtains when the length of output bit soft value surpasses preseting length, are exported described bit soft value absolute value and value.
17. as each described bit soft value processing unit in the claim 14,15 and 16, it is characterized in that,
Described preseting length is frame length or is the product of frame length and multiplying power coefficient.
18. bit soft value processing unit as claimed in claim 17 is characterized in that, described multiplying power coefficient is the logarithm of complex symbol size.
19., it is characterized in that the described setting threshold or second setting threshold or preset range or second preset range are the function of the current coding/decoding code check that adopts as each described bit soft value processing unit in the claim 14,15 and 16.
20. bit soft value processing unit as claimed in claim 14 is characterized in that, described gain coefficient adjustment unit comprises:
Judging unit is judged the magnitude relationship of described absolute value and value and described setting threshold;
Step-length is provided with the unit, and the step value that is used to adjust gain coefficient is provided with;
Adjustment unit is provided with the set step-length in unit according to the judged result and the described step-length of described judging unit, and gain coefficient is adjusted.
21. bit soft value processing unit as claimed in claim 20, it is characterized in that, the described adjustment mode that described gain coefficient is adjusted comprises: when described absolute value and value during greater than described setting threshold, and step value of increase on the value of previous gain coefficient; When described absolute value and value are not more than described setting threshold, on the value of previous gain coefficient, reduce a step value.
22. bit soft value processing method as claimed in claim 20 is characterized in that, the described adjustment mode that described gain coefficient is adjusted comprises: the described gain coefficient and the product factor are multiplied each other.
23. bit soft value processing method as claimed in claim 25 is characterized in that, the described product factor is determined by the coding/decoding code check.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102412935A (en) * | 2011-12-05 | 2012-04-11 | 中国科学院计算技术研究所 | Soft-bit-information-based network coding system and method for multi-address relay access channel |
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| CN1347252A (en) * | 2000-08-28 | 2002-05-01 | 索尼国际(欧洲)股份有限公司 | Soft normalizer for channel decoder |
| US20070116140A1 (en) * | 2005-11-18 | 2007-05-24 | Denso Corporation | Method for correcting soft decision value, computer program product for the same, and reception apparatus for the same |
| CN101341660A (en) * | 2005-12-20 | 2009-01-07 | 捷讯研究有限公司 | Correction circuit for improving performance in a channel decoder |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1347252A (en) * | 2000-08-28 | 2002-05-01 | 索尼国际(欧洲)股份有限公司 | Soft normalizer for channel decoder |
| US20070116140A1 (en) * | 2005-11-18 | 2007-05-24 | Denso Corporation | Method for correcting soft decision value, computer program product for the same, and reception apparatus for the same |
| CN101341660A (en) * | 2005-12-20 | 2009-01-07 | 捷讯研究有限公司 | Correction circuit for improving performance in a channel decoder |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102412935A (en) * | 2011-12-05 | 2012-04-11 | 中国科学院计算技术研究所 | Soft-bit-information-based network coding system and method for multi-address relay access channel |
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