CN102103536B - Board test device and method - Google Patents
Board test device and method Download PDFInfo
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- CN102103536B CN102103536B CN200910311843.2A CN200910311843A CN102103536B CN 102103536 B CN102103536 B CN 102103536B CN 200910311843 A CN200910311843 A CN 200910311843A CN 102103536 B CN102103536 B CN 102103536B
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- board
- test device
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Abstract
The invention discloses a board test device which is used for testing SPI (single program initiation) bus signals and IIC (inter-integrated circuit) bus signals of a board to be tested. The board test device comprises an SPI bus port, an IIC bus port, a signal converter, a serial port, a network chip, a network port, a switch, a display screen and a microcontroller, wherein the SPI bus port is connected with the SPI bus port of the board to be tested; the IIC bus port is connected with the IIC bus port of the board to be tested; the signal converter is connected with the IIC bus port and used for converting signals received by the IIC bus port; the serial port is connected with a scanning device; the network port is connected with the network chip and used for communicating with the network port of a central server; the switch is used for turning on or off the board test device; the display screen is used for displaying prompt messages in the test process; and the microcontroller is used for processing received serial number information, the SPI bus signals and the IIC bus signals, then sending the processed signals to the central server through the network port, so that the central server records and displays the test results of the board to be tested.
Description
Technical field
The present invention relates to a kind of proving installation and method, particularly a kind of proving installation for testing board and method.
Background technology
Board is mainboard in computing machine and expansion card thereof, as the general designation of video card, sound card, network interface card etc.Board is the main composition assembly of computing machine, it provides the south bridge, north bridge chipset, bus, peripheral unit data transmission interface etc. of command data transmission.The stability of board and integrated functionality are the important determinatives of board quality, therefore, need test board being carried out to stability, compatibility and each performance parameters.General method is installed in a test computer by board to be measured, relevant test procedure is performed to obtain test result via test computer, and by this test result by Internet Transmission to central server, judge whether this awaiting board card meets performance requirement with this.
In traditional method of testing, each test board needs to take a computing machine to be used for testing board under test card and test result being transferred to central server, causes testing apparatus costly.
Summary of the invention
In view of above content, be necessary to provide board test device and method that a kind of testing cost is low.
A kind of board test device, for testing spi bus signal and the iic bus signal of an awaiting board card, described board test device comprises:
One spi bus port, for connecting the spi bus port of described awaiting board card, to receive the spi bus signal that described awaiting board card exports;
One iic bus port, for connecting the iic bus port of described awaiting board card, to receive the iic bus signal that described awaiting board card exports;
One signal converter, for connecting described iic bus port, with by described iic bus port accepts to iic bus signal be converted to digital signal and exported by described iic bus port;
One serial interface, for connecting one scan equipment, exports with the sequence number information of the awaiting board card described scanning device scanning obtained;
One network chip;
One network port, for connecting described network chip and communicating with the network port of a central server;
One switch, for opening or cutting out described board test device;
One display screen, for showing the information in test process; And
One microcontroller receives the setting IP address of the described board test device that described central server stores by the described network port, and judge that whether the IP address received is consistent with the IP address of oneself, if consistent, connect normal information by described display screen display, the spi bus signal that described microcontroller is exported by awaiting board card described in described spi bus port accepts, the iic bus signal that described microcontroller is exported by the described awaiting board card of described iic bus port accepts after described signal converter conversion, the spi bus signal received and iic bus signal are sent to described central server by the described network port by described microcontroller after close beta routine processes, record to make the test result of described central server to awaiting board card and show.
A kind of board method of testing, for testing an awaiting board card, comprises the following steps:
S1: one microcontroller receives the setting IP address of the described board test device that a central server stores, and judges that whether the IP address received is consistent with the IP address of oneself, if inconsistent, performs S2, if unanimously, performs S3;
S2: display connection failure information;
S3: display connects normal information;
S4: display list entries information;
S5: scan the sequence number of awaiting board card and described sequence number is sent to described microcontroller, to make described microcontroller, described sequence number being sent to described central server;
S6: the sequence number of the sequence number received and storage inside is compared by described central server, if inconsistent, performs S7, if unanimously, performs S9;
S7: to transmit Sequence Number error message to described microcontroller;
S8: display sequence error message;
S9: send test instruction to described microcontroller;
S10: receive the spi bus signal that described awaiting board card exports and the iic bus signal receiving the awaiting board card output after a signal converter conversion, the spi bus signal received and the iic bus signal after conversion are sent to described central server after the close beta routine processes of described microcontroller;
S11: judge whether test is passed through according to result, if do not pass through, performs S12, if pass through, performs S13;
S12: send test event code and test crash message code to described central server, record test event code and test crash message code;
S13: send test event code to described central server and test by message code, message code is passed through in record test event code and test;
S14: judge whether all test events of described awaiting board card are passed through, if do not pass through, return S9, if pass through, performs S15; And
S15: send test ending message code to described central server, record and show all tests by result.
Compare prior art, the SPI of the described awaiting board card output received and iic bus signal are sent to central server by the described network port by described microcontroller by described board test device and method of testing after close beta routine processes, record to make the test result of described central server to described awaiting board card and display it to tester.Described board test device and method of testing simple to operate, computing machine can be replaced board under test card is tested, reduce the cost of testing apparatus.
Accompanying drawing explanation
In conjunction with embodiment, the present invention is further illustrated with reference to the accompanying drawings.
Fig. 1 is the block scheme after board test device better embodiment of the present invention is connected with an awaiting board card, a central server and one scan equipment.
Fig. 2 A-2B is the process flow diagram of the better embodiment of board method of testing of the present invention.
Main element symbol description
| Board test device | 100 |
| Microcontroller | 110 |
| Spi bus port | 120、410 |
| Iic bus port | 130、420 |
| Signal converter | 140 |
| Serial port | 150 |
| Network chip | 160 |
| The network port | 170、210 |
| Switch | 180 |
| Display screen | 190 |
| Central server | 200 |
| Scanning device | 300 |
| Awaiting board card | 400 |
Embodiment
Please refer to Fig. 1, board test device 100 of the present invention is for testing Serial Peripheral Interface (the Serial Peripheral Interface of an awaiting board card 400, SPI) bus signals and twin wire universal serial bus (Inter-IntegratedCircuit, IIC) bus signals.The better embodiment of described board test device 100 comprises microcontroller 110, spi bus port one 20, iic bus port one 30, signal converter 140, serial port one 50, network chip 160, network port 170, switch 180 and a display screen 190.Described microcontroller 110 connects described spi bus port one 20, iic bus port one 30, serial port 150, network chip 160, switch 180 and display screen 190, described signal converter 140 connects described iic bus port one 30, the described network port 170 connects described network chip 160, also for being connected the network port 210 of a central server 200 by a grid line, described spi bus port one 20 and iic bus port one 30 are respectively used to the spi bus port 410 and the iic bus port 420 that connect described awaiting board card 400, described serial port 150 is for connecting one scan equipment 300.In other embodiments, described board test device 100 and the communication between central server 200 also can adopt wireless network to communicate.
Described board test device 100 is communicated with described central server 200 by described network chip 160.Described board test device 100 (namely opening described microcontroller 110) is opened by described switch 180.Described microcontroller 110 receives the setting IP address of the described board test device 100 that described central server 200 stores by described network chip 160 and the network port 170, and judge that whether the IP address received is consistent with the IP address of oneself, if consistent, described board test device 100 is connected normally with described central server 200, described microcontroller 110 receives the sequence number information of the awaiting board card 400 that the scanning of described scanning device 300 obtains by serial port 150, so that the sequence number information of described awaiting board card 400 is sent to central server 200 by the described network port 170, described spi bus port one 20 and iic bus port one 30 are for receiving spi bus signal and the iic bus signal of the output of described awaiting board card 400, described signal converter 140 is supplied to described microcontroller 110 by described iic bus port one 30 after being converted to digital signal for the iic bus signal received by described iic bus port one 30, the SPI received and iic bus signal are sent to described central server 200 by the described network port 170 by described microcontroller 110 after close beta routine processes, to make it test result of awaiting board card 400 recorded and display it to tester.Described display screen 190, by the information in test process, as " connection failure ", is shown to tester, can monitor whole test process to make it.
In present embodiment, described switch 180 is pushbutton switch, be arranged on the surface of described board test device 100, the model of described microcontroller 110 is P89V664, it comprises an internal storage, for storing test program, in other embodiments, also can adopt external storage (as portable hard drive etc.), and its by an interface (as USB port) with as described in microcontroller 110 be connected.The model of described network chip 160 is RTL8019AS, and the model of described serial port 150 is MAX3232CDWR, and described signal converter 140 is one 64 bit digital input/output signal converters, and its model is PCA9555PW.
Described awaiting board card 400 also comprises other element (not shown), wherein other element element that comprise to by existing general board (as computer main board), as central processing unit (Center Processing Unit, CPU), internal memory etc.
Please refer to Fig. 2, the better embodiment of board method of testing of the present invention comprises the following steps:
Step S1: described board test device 100 is connected to described central server 200 by the described network port 170, and open described central server 200 and described board test device 100.
Step S2: described microcontroller 110 receives the setting IP address of the described board test device 100 that described central server 200 stores by the described network port 170, and judge that whether the IP address received is consistent with the IP address of oneself, if inconsistent, perform step S3, if consistent, perform step S4.
Step S3: described microcontroller 110 shows connection failure information by described display screen 190, as shown " connection failure " on display screen 190.
Step S4: described microcontroller 110 is shown by described display screen 190 and connects normal information, as shown " connect normal, can test " on display screen 190.
Step S5: awaiting board card 400 be connected with described board test device 100, is connected respectively spi bus port 410 and the iic bus port 420 of described awaiting board card 400 by the spi bus port one 20 of awaiting board card 400 and iic bus port one 30.
Step S6: described microcontroller 110 shows list entries information by described display screen 190, as " scanning awaiting board card sequence number ".
Step S7: scan the sequence number of awaiting board card 400 by described scanning device 300 and by described serial port 150, described sequence number sent to described microcontroller 110, described sequence number is sent to described central server 200 by the described network port 170 by described microcontroller 110.
Step S8: the sequence number of the sequence number received from described board test device 100 and its storage inside is compared by described central server 200, if inconsistent, performs step S9, if unanimously, performs step S11.
Step S9: described central server 200 to be transmitted Sequence Number error message to described microcontroller 110 by the described network port 170.
Step S10: described microcontroller 110 by the error message of described display screen 190 display sequence, as shown at display screen 190 " scanning awaiting board card sequence number errors ".
Step S11: described central server 200 sends test instruction by the described network port 170 to described board test device 100, as shown at display screen 190 " starting test ".
Step S12: the spi bus signal that described awaiting board card 400 exports exports to described microcontroller 110 by described spi bus port one 20, the iic bus signal that described awaiting board card 400 exports sends described signal converter 140 to by described iic bus port one 30 and export to described microcontroller 110 by described iic bus port one 30 again after described signal converter 140 is converted to digital signal, and the signal received is sent to described central server 200 by the described network port 170 by described microcontroller 110 after close beta routine processes.
Step S13: according to result, described microcontroller 110 judges whether test is passed through, if do not pass through, performs step S14, if pass through, performs step S15.
Step S14: described microcontroller 110 sends test event code and test crash message code by the described network port 170 to described central server 200, described central server 200 records test event code and test crash message code.
Step S15: described microcontroller 110 sends test event code with test by message code by the described network port 170 to described central server 200, and described central server 200 records test event code and message code is passed through in test.
Step S16: described microcontroller 110 judges whether all test events of described awaiting board card are passed through, if do not pass through, return step S11, if pass through, performs step S17.
Step S17: described microcontroller 110 sends test ending message code by the described network port 170 to described central server 200, and described central server 200 records and shows all tests by result.
When multiple awaiting board card 400 tested by needs, each awaiting board card 400 is connected with a board test device 100, and the board test device 100 being connected with awaiting board card 400 is connected with described central server 200 by router, compare in the IP address that the described central server 200 received exports by each board test device 100 and the IP address of oneself, if consistent, then described board test device 100 is connected normally with described central server 200, described central server 200 can be tested the awaiting board card 400 that connect corresponding to described board test device 100 by described board test device 100, test philosophy is identical with test philosophy above, do not repeat them here.
The SPI that the described awaiting board card 400 received is exported by described microcontroller 110 by described board test device 100 and method of testing and iic bus signal are through close beta routine processes, and send to central server 200 by the described network port 170, to make it, test result of described awaiting board card 400 is recorded and displays it to tester.Described board test device and method of testing simple to operate, computing machine can be replaced board under test card is tested, reduce the cost of testing apparatus.
Claims (8)
1. a board test device, for testing spi bus signal and the iic bus signal of an awaiting board card, described board test device comprises:
One spi bus port, for connecting the spi bus port of described awaiting board card, to receive the spi bus signal that described awaiting board card exports;
One iic bus port, for connecting the iic bus port of described awaiting board card, to receive the iic bus signal that described awaiting board card exports;
One signal converter, for connecting the iic bus port of described board test device, so that the iic bus signal of the iic bus port accepts of described board test device to awaiting board card is converted to digital signal and is exported by the iic bus port of described board test device;
One serial interface, for connecting one scan equipment, exports with the sequence number information of the awaiting board card described scanning device scanning obtained;
One network chip;
One network port, communicates with the network port of a central server for connecting described network chip;
One switch, for opening or cutting out described board test device;
One display screen, for showing the information in test process; And
One microcontroller receives the setting IP address of the described board test device that described central server stores by the described network port, and judge that whether the IP address received is consistent with the IP address of oneself, if consistent, connect normal information by described display screen display, the spi bus signal that described microcontroller is exported by awaiting board card described in the spi bus port accepts of described board test device, the iic bus signal that described microcontroller is exported by the described awaiting board card of iic bus port accepts after described signal converter conversion of described board test device, the spi bus signal received and iic bus signal are sent to described central server by the described network port by described microcontroller after close beta routine processes, record to make the test result of described central server to awaiting board card and show.
2. board test device as claimed in claim 1, is characterized in that: the described network port is connected with the network port of described central server by a grid line.
3. board test device as claimed in claim 1, is characterized in that: the communication between described board test device with described central server adopts wireless network to communicate.
4. board test device as claimed in claim 1, is characterized in that: described switch is pushbutton switch, is arranged on the surface of described board test device.
5. board test device as claimed in claim 1, is characterized in that: described microcontroller comprises an internal storage, for storing test program.
6. board test device as claimed in claim 1, is characterized in that: described board test device comprises an external storage, and described external storage is connected with described microcontroller by an interface, and external storage is used for storing test program.
7. board test device as claimed in claim 1, is characterized in that: described signal converter is one 64 bit digital input/output signal converters.
8. a board method of testing, for testing an awaiting board card, comprises the following steps:
S1: one microcontroller receives the setting IP address of the described board test device that a central server stores, and judges that whether the IP address received is consistent with the IP address of oneself, if inconsistent, performs S2, if unanimously, performs S3;
S2: display connection failure information;
S3: display connects normal information;
S4: display list entries information;
S5: scan the sequence number of awaiting board card and described sequence number is sent to described microcontroller, to make described microcontroller, described sequence number being sent to described central server;
S6: the sequence number of the sequence number received and storage inside is compared by described central server, if inconsistent, performs S7, if unanimously, performs S9;
S7: to transmit Sequence Number error message to described microcontroller;
S8: display sequence error message;
S9: send test instruction to described microcontroller;
S10: receive the spi bus signal that described awaiting board card exports and the iic bus signal receiving the awaiting board card output after a signal converter conversion, the spi bus signal received and the iic bus signal after conversion are sent to described central server after the close beta routine processes of described microcontroller;
S11: judge whether test is passed through according to result, if do not pass through, performs S12, if pass through, performs S13;
S12: send test event code and test crash message code to described central server, record test event code and test crash message code;
S13: send test event code to described central server and test by message code, message code is passed through in record test event code and test;
S14: judge whether all test events of described awaiting board card are passed through, if do not pass through, return S9, if pass through, performs S15; And
S15: send test ending message code to described central server, record and show all tests by result.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200910311843.2A CN102103536B (en) | 2009-12-18 | 2009-12-18 | Board test device and method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200910311843.2A CN102103536B (en) | 2009-12-18 | 2009-12-18 | Board test device and method |
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| Publication Number | Publication Date |
|---|---|
| CN102103536A CN102103536A (en) | 2011-06-22 |
| CN102103536B true CN102103536B (en) | 2015-04-15 |
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| CN200910311843.2A Expired - Fee Related CN102103536B (en) | 2009-12-18 | 2009-12-18 | Board test device and method |
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Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104182318B (en) * | 2013-05-28 | 2016-08-24 | 英业达科技有限公司 | Test device |
| CN106841977A (en) * | 2016-12-21 | 2017-06-13 | 广州视源电子科技股份有限公司 | Board card testing method and system |
| CN107678899A (en) * | 2017-09-26 | 2018-02-09 | 郑州云海信息技术有限公司 | A kind of multiple boards merge the diagnostic method of test |
| CN109557453B (en) * | 2018-11-28 | 2021-04-27 | 郑州云海信息技术有限公司 | Multi-master-control-chip identification processing method and system |
| CN110308385A (en) * | 2019-07-19 | 2019-10-08 | 惠尔丰(中国)信息***有限公司 | A kind of PCBA Online Transaction Processing and method |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1632758A (en) * | 2004-12-31 | 2005-06-29 | 北京中星微电子有限公司 | An interface test response equipment |
| CN1979198A (en) * | 2005-12-06 | 2007-06-13 | 鸿富锦精密工业（深圳）有限公司 | Detecting system and method for input/output board |
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2009
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1632758A (en) * | 2004-12-31 | 2005-06-29 | 北京中星微电子有限公司 | An interface test response equipment |
| CN1979198A (en) * | 2005-12-06 | 2007-06-13 | 鸿富锦精密工业（深圳）有限公司 | Detecting system and method for input/output board |
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| CN102103536A (en) | 2011-06-22 |
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