CN102096310A - Method for correcting photoresist pattern and etching method - Google Patents

Method for correcting photoresist pattern and etching method Download PDF

Info

Publication number
CN102096310A
CN102096310A CN 200910201464 CN200910201464A CN102096310A CN 102096310 A CN102096310 A CN 102096310A CN 200910201464 CN200910201464 CN 200910201464 CN 200910201464 A CN200910201464 A CN 200910201464A CN 102096310 A CN102096310 A CN 102096310A
Authority
CN
China
Prior art keywords
photoresist pattern
photoresist
ion
sidewall
pattern layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN 200910201464
Other languages
Chinese (zh)
Other versions
CN102096310B (en
Inventor
宁先捷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
Original Assignee
Semiconductor Manufacturing International Shanghai Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Manufacturing International Shanghai Corp filed Critical Semiconductor Manufacturing International Shanghai Corp
Priority to CN 200910201464 priority Critical patent/CN102096310B/en
Publication of CN102096310A publication Critical patent/CN102096310A/en
Application granted granted Critical
Publication of CN102096310B publication Critical patent/CN102096310B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

The embodiment of the invention provides a method for correcting a photoresist pattern and an etching method. The method for correcting the photoresist pattern comprises the following steps of: forming a photoresist pattern layer on an intermediate film layer; obtaining a correction value of the photoresist pattern according to the actual size of the photoresist pattern in the photoresist pattern layer and a target size to be obtained; setting an ion implantation parameter according to the correction value; and performing angled ion implantation on the side wall of a photoresist in the photoresist pattern layer to make the side wall of the photoresist shrunk inwards so as to correct the actual size of the photoresist pattern to obtain the target size to be obtained. The method provided by the embodiment of the invention is easy to operate, greatly improves efficiency, and reduces production cost.

Description

The modification method of photoresist pattern and lithographic method
Technical field
The present invention relates to technical field of manufacturing semiconductors, relate in particular to a kind of modification method and lithographic method of photoresist pattern.
Background technology
In the manufacture process of semiconductor devices, it is the customary means that forms pattern at substrate that the pattern that utilize resist exposure, the back of developing forms carries out etching to substrate, for example forms the process of gate pattern at substrate.Especially when making the SRAM memory chip, in order to form gate pattern with good line end shape, as everyone knows, the line end shape of grid can directly influence the performance of device, in the prior art usually after substrate forms grid line, the repeated using etching technics carries out line end cutting, the gate pattern that has better line end shape with final formation to the grid line that forms.
Concrete, adopt etching technics that grid line is carried out the process of line end cutting shown in Fig. 1~3, at first, the vertical view of substrate as shown in Figure 1, etching forms two grid lines 11,12 on substrate, respectively on the grid line separately or cover the photoresist layer (not shown) simultaneously on two grid lines, mask plate 13,14 is set above this photoresist layer then, wherein, the position of mask plate 13,14 is predefined according to the designs demand.The side view of substrate as shown in Figure 2 after photoresist layer exposed, develops, can form photoresist pattern layer on the grid line 11,12, and wherein, the groove top between the photoresist 15,16 in this photoresist pattern layer is former mask plate 14 residing positions.The vertical view of substrate as shown in Figure 3 carries out etching according to the photoresist pattern in the above-mentioned photoresist pattern layer to grid line, thereby forms final gate pattern.
Yet, when forming photoresist pattern layer,, need to revise the photoresist pattern if wherein the physical size of photoresist pattern or the broad and rough rugosity of bar do not meet the target size or the specification of design in advance.The applying date is on November 6th, 2007, application number is that 200710047859.8 Chinese patent application discloses " a kind of method of revising the photoresist figure ", this method is that the method that photoresist pattern layer further adopts etching machine to carry out the homophase etching is revised the photoresist pattern, yet polymkeric substance residual after the etching can influence the semiconductor quality, removes polymkeric substance so this method also need be decomposed by multistep technology.Another modification method is to form pattern again, promptly adopting the method photoresist pattern layer that will form of oxygen plasma ashing and/or chemical solvent dissolving to clean removes, the process shown in Fig. 1~3 that re-executes then forms photoresist pattern layer once more, and the physical size of photoresist pattern meets the target size specification of design in advance in the photoresist pattern layer that forms.More than two kinds of method steps loaded down with trivial details, efficient is extremely low, has increased the manufacturing cost of chip greatly.
Summary of the invention
The embodiment of the invention provides a kind of modification method and lithographic method of photoresist pattern, can improve the correction efficient to the photoresist pattern.
In order to solve the problems of the technologies described above, the technical scheme of the embodiment of the invention is as follows:
A kind of modification method of photoresist pattern comprises:
On middle rete, form photoresist pattern layer;
According to the physical size of photoresist pattern in the described photoresist pattern layer and the target size of desire acquisition, obtain modified value to described photoresist pattern;
Set the parameter that ion injects according to described modified value;
Photoresist sidewall in the described photoresist pattern layer is carried out angle-tilt ion inject, make in the sidewall of described photoresist and contract, be modified to the target size that described desire obtains with physical size with described photoresist pattern.
Preferably, the described parameter of injecting according to described modified value setting ion comprises:
According to the material of described modified value, photoresist and the thickness of photoresist pattern layer, select heavy ion, set the ion injection direction with respect to the angle of inclination of described photoresist sidewall, dosage and the energy that ion injects.
Preferably, described heavy ion is a kind of or combination in any in the following ion:
Argon, silicon, germanium, phosphorus, arsenic, indium, antimony.
Preferably, described range of tilt angles is 0 to 25 degree.
Preferably, the dosage range of described ion injection is 5E14 to 5E15.
Preferably, the energy range of described ion injection is 10Kev to 100Kev.
Preferably, describedly photoresist sidewall in the described photoresist pattern layer carried out angle-tilt ion inject, make in the sidewall of described photoresist and contract, be modified to the target size that described desire obtains, comprising with physical size with described photoresist pattern:
At least two photoresist sidewalls in the described photoresist pattern layer are carried out angle-tilt ion respectively inject, make in the sidewall of each photoresist and contract, be modified to the target size that described desire obtains with physical size with described photoresist pattern.
A kind of lithographic method comprises:
On middle rete, form photoresist pattern layer;
According to the physical size of photoresist pattern in the described photoresist pattern layer and the target size of desire acquisition, obtain modified value to described photoresist pattern;
Set the parameter that ion injects according to described modified value;
Photoresist sidewall in the described photoresist pattern layer is carried out angle-tilt ion inject, make in the sidewall of described photoresist and contract, be modified to the target size that described desire obtains with physical size with described photoresist pattern;
According to the described middle rete of revised photoresist pattern etch.
Preferably, the described parameter of injecting according to described modified value setting ion comprises:
According to the material of described modified value, photoresist and the thickness of photoresist pattern layer, select heavy ion, set the ion injection direction with respect to the angle of inclination of described photoresist sidewall, dosage and the energy that ion injects.
Preferably, described heavy ion is a kind of or combination in any in the following ion:
Argon, silicon, germanium, phosphorus, arsenic, indium, antimony.
Preferably, described range of tilt angles is 0 to 25 degree.
Preferably, the dosage range of described ion injection is 5E14 to 5E15.
Preferably, the energy range of described ion injection is 10Kev to 100Kev.
Preferably, describedly photoresist sidewall in the described photoresist pattern layer carried out angle-tilt ion inject, make in the sidewall of described photoresist and contract, be modified to the target size that described desire obtains, comprising with physical size with described photoresist pattern:
At least two photoresist sidewalls in the described photoresist pattern layer are carried out angle-tilt ion respectively inject, each photoresist sidewall is contracted in asymmetric, be modified to the target size that described desire obtains with physical size with described photoresist pattern.
Preferably, described middle rete is the substrate with grid line;
The described photoresist pattern layer that forms on middle rete comprises:
On the grid line of described substrate, be formed for the photoresist pattern layer of the described grid line of etching;
Described target size according to described photoresist pattern is carried out etching to rete in the middle of described and is comprised:
Target size according to described photoresist pattern is carried out etching to the grid line on the described substrate, obtains gate pattern.
The embodiment of the invention is bombarded by the method that adopts angle-tilt ion and the inject photoresist sidewall to photoresist pattern layer, make the structure of photoresist side-walls become fine and close, thereby make the photoresist sidewall to the inboard indentation of photoresist, revise the photoresist pattern, finally satisfied default target size.This correction need not former photoresist pattern layer is cleaned, does over again, but directly the photoresist pattern in the former photoresist pattern layer is revised, and also can not produce residual polymkeric substance, and operation is simple, improved correction efficient greatly, reduced production cost.
Description of drawings
Shown in accompanying drawing, above-mentioned and other purpose, feature and advantage of the present invention will be more clear.Reference numeral identical in whole accompanying drawings is indicated identical part.Painstakingly do not draw accompanying drawing, focus on illustrating purport of the present invention by physical size equal proportion convergent-divergent.
Fig. 1-Fig. 3 is the available technology adopting etching technics carries out the line end cutting to grid line a synoptic diagram;
Fig. 4 is the modification method process flow diagram of a pair of photoresist pattern of the embodiment of the invention;
Fig. 5-the 8th, the structural representation of semiconductor devices among the embodiment one;
Fig. 9 is the modification method process flow diagram of two pairs of photoresist patterns of the embodiment of the invention;
Figure 10-the 13rd, the structural representation of semiconductor devices in the present embodiment two;
Figure 14 is the lithographic method process flow diagram of the embodiment of the invention three;
Figure 15, the 16th, the structural representation of semiconductor devices among the embodiment three;
Figure 17 is the lithographic method process flow diagram of the embodiment of the invention four;
Figure 18, the 19th, the structural representation of semiconductor devices among the embodiment four.
Embodiment
For above-mentioned purpose of the present invention, feature and advantage can be become apparent more, the specific embodiment of the present invention is described in detail below in conjunction with accompanying drawing.
Set forth a lot of details in the following description so that fully understand the present invention, implement but the present invention can also adopt other to be different from alternate manner described here, so the present invention has not been subjected to the restriction of following public specific embodiment.
Secondly, the present invention is described in detail in conjunction with synoptic diagram, when the embodiment of the invention is described in detail in detail; for ease of explanation; the sectional view of indication device structure can be disobeyed general ratio and be done local the amplification, and described synoptic diagram is example, and it should not limit the scope of protection of the invention at this.The three dimensions size that in actual fabrication, should comprise in addition, length, width and the degree of depth.
At present, no matter be on substrate, to form initial gate pattern, still in as the manufacture process of SRAM memory chip, grid line is carried out the line end cutting, so long as adopt the photoresist etching technics just may exist the photoresist pattern not meet the situation of predetermined size or specification, no matter adopt etching machine to the correction of photoresist pattern in the prior art, yet remove the method for residual polyalcohol after etching, still adopt the method that forms the photoengraving pattern layer again, the capital greatly reduces production efficiency, has increased production cost.
Based on this, the invention provides a kind of modification method and lithographic method of photoresist pattern, by adopting method that angle-tilt ion injects the photoresist sidewall of photoresist pattern layer is bombarded, make the structure of photoresist side-walls become fine and close, thereby make the photoresist sidewall to the inboard indentation of photoresist, revise the photoresist pattern, finally satisfied default specification or size.This method not only can be applicable on substrate to form initial gate pattern, and the line end that also can be applicable in as the manufacture process of SRAM memory chip grid line be carried out cuts, and also can also be applied in other any processing step the correction to the photoresist pattern.Below in conjunction with drawings and Examples, technical scheme of the present invention is described.
With reference to Fig. 4, be the method flow diagram of a pair of photoresist pattern of embodiment of the invention correction.Fig. 5-8 is the structural representation of semiconductor devices in the present embodiment one.
This modification method can comprise:
Step S11 forms photoresist pattern layer 21 on middle rete, its structure as shown in Figure 5.
In the present embodiment, this centre rete can be monocrystalline silicon or polysilicon element semiconductor substrate or compound semiconductor substrate, also can be at the overlayer that forms on the semiconductor devices of certain pattern, as has the chip etc. of grid line, does not limit herein.
The process that forms this photoresist pattern layer 21 can be included on the middle rete and be coated with photoresist, adopt mask plate that photoresist is exposed, develops then, thereby the design transfer on the mask plate is to photoresist, similar in its detailed process and the prior art, repeat no more herein.
Step S12 according to the physical size of photoresist pattern in the photoresist pattern layer 21 and the target size of desire acquisition, obtains the modified value to the photoresist pattern.
In the present embodiment, as shown in Figure 6, the physical size of photoresist pattern is X in the photoresist pattern layer 21 1, the target size that desire obtains is X 2, then the modified value to the photoresist pattern promptly can be Δ X 1=X 1-X 2, wherein, physical size can be passed through to measure to obtain the size of being scheduled to when target size is design.
Step S13 sets the parameter that ion injects according to described modified value.
Can select heavy ion according to the material of modified value, photoresist and the thickness of photoresist pattern layer in this step, set the ion injection direction with respect to the angle of inclination of the photoresist sidewall that injects, dosage and the energy that ion injects.Wherein, heavy ion is meant that mass of ion is heavier for the photoresist organic molecule, and the ion that can make photoresist structure become fine and close to the bombardment photoresist time can be a kind of or combination arbitrarily in argon, silicon, germanium, phosphorus, arsenic, indium, the antimony.The angle of inclination that ion injects is meant the angle between the sidewall direction of direction that ion injects and photoresist pattern layer photoresist.
Above-mentioned modified value and each photoresist material, photoresist pattern layer thickness, heavy ion, the tilted ion implantation angle, dosage, relation between the energy can obtain in advance by experiment, can select a parameter to fix as other parameter of variable, thereby obtain the relation between modified value and this variable, generally the material of photoresist can be positivity I line photoresist or negativity I line photoresist etc., this parameter relative fixed, as select the photoresist material fixed, photoresist pattern layer thickness, adopt the Ar ion to inject, the angle of inclination is set at 25 degree, energy settings is 50Kev, change implantation dosage then, to obtain the relation between modified value and the implantation dosage, can obtain the funtcional relationship between modified value and each parameter by that analogy, this experimental technique is the prior art known method, repeats no more herein.Usually the range of tilt angles of setting is 0 to 25 degree, and the dosage range that ion injects is 5E14 to 5E15, and the energy range that ion injects is 10Kev to 100Kev.For example, if the thickness of photoresist pattern layer is 600nm, the SXM1754 that the photoresist material provides for Shinetsu, setting the angle of inclination is 6 °, ion implantation dosage is that 5E14, energy are 50keV, the one-sided sidewall of photoresist is carried out ion inject, then can make the photoresist sidewall to the inboard indentation 13nm of photoresist.
Step S14 carries out angle-tilt ion to the photoresist sidewall in the photoresist pattern layer 21 and injects, and makes in the sidewall of photoresist to contract, and is modified to the target size that described desire obtains with the physical size with the photoresist pattern.
In this step, according to photoresist material, photoresist pattern layer 21 thickness and the modified value Δ X of photoresist pattern layer 21 1=X 1-X 2Set the tilt angle theta that ion injects 1, behind implantation dosage and the energy, as shown in Figure 7, the photoresist sidewall in the photoresist pattern layer 21 212 is carried out angle-tilt ion injects, the position that makes sidewall 212 is to the inboard indentation Δ of photoresist X 1, reach the position at sidewall 222 places among Fig. 7, thereby with the physical size X of photoresist pattern 1Be modified to the target size X that described desire obtains 2
Said method is for carrying out the situation that ion injects to the one-sided sidewall of photoresist that does not meet the intended target size in the photoresist pattern layer 21, if two of photoresist sidewalls 211,212 all fall short of specifications in the photoresist pattern layer 21, then can or successively carry out ion respectively and inject two sidewalls whiles, as shown in Figure 8, make two sidewalls 211,212 modified value and for Δ X 1, reach the position at sidewall 221,222 places, concrete can comprise:
After setting the ion injection parameter, oppose side wall 211 carries out angle-tilt ion and injects, with sidewall 211 indentation Δ X 2Reach the position of sidewall 221;
Oppose side wall 212 carries out angle-tilt ion and injects, with sidewall 212 indentation Δ X 3Reach the position of sidewall 222.Wherein, Δ X 2+ Δ X 3=Δ X 1Certainly, the order of the angle-tilt ion of two side 211,212 injection can be adjusted as required.As seen, for the different situation of photoresist two side modified value, embodiment of the invention method can realize the asymmetric correction to the photoresist two side, thereby reaches specification requirement separately.Wherein, sidewall 221,222 is not and sidewall 211,212 simultaneous sidewalls, but revised sidewall 211,212 has conveniently carried out above numbering for statement, and following examples are similar.
The embodiment of the invention is bombarded by the method that adopts angle-tilt ion and the inject photoresist sidewall to photoresist pattern layer, make the structure of photoresist side-walls become fine and close, thereby make the photoresist sidewall to the inboard indentation of photoresist, revise the photoresist pattern, finally satisfied default target size.This correction need not former photoresist pattern layer is cleaned, does over again, but directly the photoresist pattern in the former photoresist pattern layer is revised, and also can not produce residual polymkeric substance, and operation is simple, improved correction efficient greatly, reduced production cost.
With reference to Fig. 9, be the modification method process flow diagram of two pairs of photoresist patterns of the embodiment of the invention.In the present embodiment, middle rete is the substrate with grid line, when this method can specifically be applied to the cutting of grid line line end, in the process of the line end cutting of for example in the manufacture process of SRAM memory chip grid line being carried out, to the correction of photoresist pattern.Figure 10-13 is the structural representation of semiconductor devices in the present embodiment two.
This modification method can comprise:
Step S21 as shown in figure 10, forms photoresist pattern layer 32 on the grid line 31 of substrate.
In this step, similar in the forming process of this photoresist pattern layer 32 and the prior art, repeat no more herein.The photoresist pattern that photoresist 32a and photoresist 32b form in the photoresist pattern layer 32 i.e. groove shown in the figure, this groove correspondence predefined desire form the position of isolated area, so that follow-uply this regional grid line carried out etching remove, but in manufacture process, the physical size of the groove that photoresist 32a and photoresist 32b form not is the target size of predefined groove, so need revise this photoresist pattern.
Step S22 according to the physical size of photoresist 32a in the photoresist pattern layer 32 and photoresist 32b and the target size of desire acquisition, obtains the modified value to the photoresist pattern.
In the present embodiment, the physical size of photoresist pattern can be the spacing X between two photoresist 32a, the 32b after as shown in figure 11 the development in the photoresist pattern layer 32 3, the target size of the photoresist pattern that desire obtains is that the spacing between two photoresists is X 4, then the modified value to the photoresist pattern promptly can be Δ X 4=X 4-X 3
Wherein, the modified value to the sidewall 321 of photoresist 32a is Δ X 5, be Δ X to the modified value of the sidewall 322 of photoresist 32b 6, wherein, Δ X 4=Δ X 5+ Δ X 6
Step S23 sets the parameter that ion injects according to described modified value.
According to modified value Δ X 5With modified value Δ X 6To the parameter that two side 321, the 322 corresponding ions that are provided with separately inject, the setup parameter process of this step and abovementioned steps S13 is similar, repeats no more herein.
Step S24, oppose side wall 321 argon ion that tilts injects, and sidewall 321 is retracted to the position of sidewall 331.
As shown in figure 12, this step is promptly injected by the inclination argon ion and is made sidewall 321 to the inboard indentation Δ of photoresist X 5, the angle of inclination that ion injects is θ 2
Step S25, oppose side wall 322 argon ion that tilts injects, and sidewall 322 is retracted to the position of sidewall 332.
As shown in figure 13, this step is promptly injected by angle-tilt ion and is made sidewall 322 to the inboard indentation Δ of photoresist X 6, the angle of inclination that ion injects is θ 3
Above-mentioned steps S24, S25 can carry out simultaneously, and in order to reduce the phase mutual interference when ion injects, preferred both sides are successively carried out ion and injected.As seen, for the different situation of photoresist two side modified value, embodiment of the invention method can realize the asymmetric correction to the photoresist two side, thereby reaches target size.Certainly, the order of the angle-tilt ion of two side injection can be adjusted as required.The situation that does not meet default specification or size for the one-sided sidewall of photoresist in the photoresist pattern layer is only injected and is got final product the one-sided ion that carries out.
The embodiment of the invention is bombarded by the method that adopts angle-tilt ion and the inject photoresist sidewall to photoresist pattern layer, make the structure of photoresist side-walls become fine and close, thereby make the photoresist sidewall to the inboard indentation of photoresist, revise the photoresist pattern, finally satisfied default target size.This correction need not former photoresist pattern layer is cleaned, does over again, but directly the photoresist pattern in the former photoresist pattern layer is revised, and also can not produce residual polymkeric substance, and operation is simple, improved correction efficient greatly, reduced production cost.
Based on above-mentioned modification method to the photoresist pattern, the present invention also provides a kind of lithographic method, describes below by specific embodiment.
With reference to Figure 14, be the lithographic method process flow diagram of the embodiment of the invention three.Be depicted as the structural representation of semiconductor devices among the embodiment three as Figure 15,16.
This lithographic method can comprise:
Step S31 forms photoresist pattern layer on middle rete 41.
In the present embodiment, this centre rete 41 can be monocrystalline silicon or polysilicon element semiconductor substrate or compound semiconductor substrate, also can be at the overlayer that forms on the semiconductor devices of certain pattern, as has the chip etc. of grid line, does not limit herein.
Step S32, the target size of the photoresist pattern that obtains according to the physical size of photoresist pattern in the photoresist pattern layer and desire obtains the modified value to the photoresist pattern.
This correction may be the correction to the one-sided sidewall of photoresist in the photoresist pattern layer, also may be the correction to the sidewall of photoresist both sides sidewall or two photoresists.
Step S33 sets the parameter that ion injects according to described modified value.
This process and previous embodiment are similar, repeat no more herein.Usually the heavy ion of selecting can be a kind of or combination arbitrarily in argon, silicon, germanium, phosphorus, arsenic, indium, the antimony, the range of tilt angles of setting is 0 to 25 degree, the dosage range that ion injects is 5E14 to 5E15, and the energy range that ion injects is 10Kev to 100Kev.
Step S34 carries out angle-tilt ion to the sidewall of photoresist in the photoresist pattern layer 42 and injects, and makes in the sidewall of photoresist 42 to contract to the sidewall locations of photoresist 43, is modified to the target size that desire obtains with the physical size with the photoresist pattern, as shown in figure 15.
Wherein, photoresist 43 is revised photoresists 42, for above numbering has conveniently been carried out in statement.
Step S35 carries out etching according to revised photoresist pattern to middle rete 41.
As shown in figure 16, according to the photoresist pattern of revising the back acquisition is carried out etching to substrate 41, form semiconductor devices.
In the present embodiment, the specific implementation process of step S31~S34 please refer to the description of previous embodiment.
The embodiment of the invention is bombarded by the method that adopts angle-tilt ion and the inject sidewall to the photoresist pattern layer photoresist, revised the photoresist pattern, according to revised pattern substrate is carried out etching then, finally obtained to satisfy the semiconductor devices of default specification or size.Operation is simple for this method, improved formation efficiency greatly and reduced production cost.
With reference to Figure 17, be the lithographic method process flow diagram of the embodiment of the invention four.As Figure 18,19 is the structural representation of semiconductor devices among the embodiment four.
In the present embodiment, middle rete is the substrate with grid line, and this method can specifically be applied to the line end cutting of grid line on the substrate, and for example the line end to grid line cuts in the manufacture process of SRAM memory chip.
This method can comprise:
Step S41 forms photoresist pattern layer 52 on the grid line 51 of substrate.
Step S42, the target size according to the physical size of photoresist pattern in the photoresist pattern layer 52 and desire obtain obtains the modified value to the sidewall of photoresist a, and to the modified value of the sidewall of photoresist b.
Step S43 sets the parameter that ion injects according to the modified value of two side.
This process and previous embodiment are similar, repeat no more herein.Usually the heavy ion of selecting can be a kind of or combination arbitrarily in argon, silicon, germanium, phosphorus, arsenic, indium, the antimony, the range of tilt angles of setting is 0 to 25 degree, the dosage range that ion injects is 5E14 to 5E15, and the energy range that ion injects is 10Kev to 100Kev.
Step S44 carries out angle-tilt ion to the sidewall of photoresist a and injects, and makes sidewall to the inboard indentation of photoresist.
Step S45 carries out angle-tilt ion to the sidewall of photoresist b and injects, and makes sidewall to the inboard indentation of photoresist.
As shown in figure 18 for the two side being carried out the semiconductor structure synoptic diagram after angle-tilt ion is injected.The size of revising the photoresist pattern of back photoresist a, b formation is the target size that desire obtains.For the different situation of photoresist two side modified value, embodiment of the invention method can realize the asymmetric correction to the photoresist two side.The order of step S44 and step S45 can be adjusted as required.Above step S41~S45 and previous embodiment are similar, repeat no more herein.
Step S46 carries out etching according to the photoresist pattern of revising to the grid line on the substrate 51, obtains gate pattern, forms structure as shown in figure 19.
By above-mentioned asymmetric correction to photoresist a, b sidewall, make to form the photoresist pattern array that meets default specification on the grid line 51, according to revised pattern grid line is carried out etching, make the final gate pattern that forms have line end shape preferably.
The embodiment of the invention is bombarded by the method that adopts angle-tilt ion and the inject sidewall to the photoresist pattern layer photoresist, revised the photoresist pattern, according to revised pattern substrate is carried out etching then, finally obtained to satisfy the semiconductor devices of default specification or size.Operation is simple for this method, improved formation efficiency greatly and reduced production cost.
The above only is preferred embodiment of the present invention, is not the present invention is done any pro forma restriction.
Though the present invention discloses as above with preferred embodiment, yet be not in order to limit the present invention.Any those of ordinary skill in the art, do not breaking away under the technical solution of the present invention scope situation, all can utilize the method and the technology contents of above-mentioned announcement that technical solution of the present invention is made many possible changes and modification, or be revised as the equivalent embodiment of equivalent variations.Therefore, every content that does not break away from technical solution of the present invention, all still belongs in the scope of technical solution of the present invention protection any simple modification, equivalent variations and modification that above embodiment did according to technical spirit of the present invention.

Claims (15)

1. the modification method of a photoresist pattern is characterized in that, comprising:
On middle rete, form photoresist pattern layer;
According to the physical size of photoresist pattern in the described photoresist pattern layer and the target size of desire acquisition, obtain modified value to described photoresist pattern;
Set the parameter that ion injects according to described modified value;
Photoresist sidewall in the described photoresist pattern layer is carried out angle-tilt ion inject, make in the sidewall of described photoresist and contract, be modified to the target size that described desire obtains with physical size with described photoresist pattern.
2. method according to claim 1 is characterized in that, the described parameter of injecting according to described modified value setting ion comprises:
According to the material of described modified value, photoresist and the thickness of photoresist pattern layer, select heavy ion, set the ion injection direction with respect to the angle of inclination of described photoresist sidewall, dosage and the energy that ion injects.
3. method according to claim 2 is characterized in that, described heavy ion is a kind of or combination in any in the following ion:
Argon, silicon, germanium, phosphorus, arsenic, indium, antimony.
4. method according to claim 2 is characterized in that, described range of tilt angles is 0 to 25 degree.
5. method according to claim 2 is characterized in that, the dosage range that described ion injects is 5E14 to 5E15.
6. method according to claim 2 is characterized in that, the energy range that described ion injects is 10Kev to 100Kev.
7. according to any described method in the claim 1 to 6, it is characterized in that, describedly photoresist sidewall in the described photoresist pattern layer is carried out angle-tilt ion inject, make in the sidewall of described photoresist and contract, be modified to the target size that described desire obtains with physical size, comprise described photoresist pattern:
At least two photoresist sidewalls in the described photoresist pattern layer are carried out angle-tilt ion respectively inject, make in the sidewall of each photoresist and contract, be modified to the target size that described desire obtains with physical size with described photoresist pattern.
8. a lithographic method is characterized in that, comprising:
On middle rete, form photoresist pattern layer;
According to the physical size of photoresist pattern in the described photoresist pattern layer and the target size of desire acquisition, obtain modified value to described photoresist pattern;
Set the parameter that ion injects according to described modified value;
Photoresist sidewall in the described photoresist pattern layer is carried out angle-tilt ion inject, make in the sidewall of described photoresist and contract, be modified to the target size that described desire obtains with physical size with described photoresist pattern;
According to the described middle rete of revised photoresist pattern etch.
9. method according to claim 8 is characterized in that, the described parameter of injecting according to described modified value setting ion comprises:
According to the material of described modified value, photoresist and the thickness of photoresist pattern layer, select heavy ion, set the ion injection direction with respect to the angle of inclination of described photoresist sidewall, dosage and the energy that ion injects.
10. method according to claim 9 is characterized in that, described heavy ion is a kind of or combination in any in the following ion:
Argon, silicon, germanium, phosphorus, arsenic, indium, antimony.
11. method according to claim 9 is characterized in that, described range of tilt angles is 0 to 25 degree.
12. method according to claim 9 is characterized in that, the dosage range that described ion injects is 5E14 to 5E15.
13. method according to claim 9 is characterized in that, the energy range that described ion injects is 10Kev to 100Kev.
14. any described method in 13 according to Claim 8, it is characterized in that, describedly photoresist sidewall in the described photoresist pattern layer is carried out angle-tilt ion inject, make in the sidewall of described photoresist and contract, be modified to the target size that described desire obtains with physical size, comprise described photoresist pattern:
At least two photoresist sidewalls in the described photoresist pattern layer are carried out angle-tilt ion respectively inject, each photoresist sidewall is contracted in asymmetric, be modified to the target size that described desire obtains with physical size with described photoresist pattern.
15. any described method in 13 is characterized in that according to Claim 8,
Rete is the substrate with grid line in the middle of described;
The described photoresist pattern layer that forms on middle rete comprises:
On the grid line of described substrate, be formed for the photoresist pattern layer of the described grid line of etching;
Described target size according to described photoresist pattern is carried out etching to rete in the middle of described and is comprised:
Target size according to described photoresist pattern is carried out etching to the grid line on the described substrate, obtains gate pattern.
CN 200910201464 2009-12-14 2009-12-14 Method for correcting photoresist pattern and etching method Active CN102096310B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 200910201464 CN102096310B (en) 2009-12-14 2009-12-14 Method for correcting photoresist pattern and etching method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 200910201464 CN102096310B (en) 2009-12-14 2009-12-14 Method for correcting photoresist pattern and etching method

Publications (2)

Publication Number Publication Date
CN102096310A true CN102096310A (en) 2011-06-15
CN102096310B CN102096310B (en) 2013-01-02

Family

ID=44129453

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 200910201464 Active CN102096310B (en) 2009-12-14 2009-12-14 Method for correcting photoresist pattern and etching method

Country Status (1)

Country Link
CN (1) CN102096310B (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9520290B1 (en) * 2015-08-21 2016-12-13 Varian Semiconductor Equipment Associates, Inc. Ion implantation for improved etch performance
US20170178911A1 (en) * 2015-12-16 2017-06-22 Varian Semiconductor Equipment Associates, Inc. Ion implantation for improved contact hole critical dimension uniformity
CN107771271A (en) * 2015-04-21 2018-03-06 Asml荷兰有限公司 Method for measurement and equipment, computer program and etching system
CN109212897A (en) * 2018-09-30 2019-01-15 武汉华星光电技术有限公司 A kind of measurement complement value method of mask plate, the preparation method of mask plate and mask plate
CN112824972A (en) * 2019-11-21 2021-05-21 中芯国际集成电路制造(上海)有限公司 Target layout and mask layout correction method, mask and semiconductor structure
CN115259679A (en) * 2022-07-26 2022-11-01 Oppo广东移动通信有限公司 Substrate etching method, housing assembly and electronic device

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4171270B2 (en) * 2002-09-12 2008-10-22 株式会社ルネサステクノロジ Manufacturing method of semiconductor device
JP2004179254A (en) * 2002-11-25 2004-06-24 Renesas Technology Corp Method for manufacturing semiconductor device
CN100452317C (en) * 2005-09-09 2009-01-14 联华电子股份有限公司 Method for reducing feature size and semi-conductor etching method
CN1940715A (en) * 2005-09-27 2007-04-04 力晶半导体股份有限公司 Optical mask pattern correcting method and its formation

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107771271A (en) * 2015-04-21 2018-03-06 Asml荷兰有限公司 Method for measurement and equipment, computer program and etching system
US9520290B1 (en) * 2015-08-21 2016-12-13 Varian Semiconductor Equipment Associates, Inc. Ion implantation for improved etch performance
US20170178911A1 (en) * 2015-12-16 2017-06-22 Varian Semiconductor Equipment Associates, Inc. Ion implantation for improved contact hole critical dimension uniformity
US9735013B2 (en) * 2015-12-16 2017-08-15 Varian Semiconductor Equipment Associates, Inc. Ion implantation for improved contact hole critical dimension uniformity
CN109212897A (en) * 2018-09-30 2019-01-15 武汉华星光电技术有限公司 A kind of measurement complement value method of mask plate, the preparation method of mask plate and mask plate
CN112824972A (en) * 2019-11-21 2021-05-21 中芯国际集成电路制造(上海)有限公司 Target layout and mask layout correction method, mask and semiconductor structure
CN112824972B (en) * 2019-11-21 2024-06-18 中芯国际集成电路制造(上海)有限公司 Target layout and mask layout correction method, mask and semiconductor structure
CN115259679A (en) * 2022-07-26 2022-11-01 Oppo广东移动通信有限公司 Substrate etching method, housing assembly and electronic device
CN115259679B (en) * 2022-07-26 2024-02-27 Oppo广东移动通信有限公司 Etching method of substrate, shell assembly and electronic equipment

Also Published As

Publication number Publication date
CN102096310B (en) 2013-01-02

Similar Documents

Publication Publication Date Title
CN102096310B (en) Method for correcting photoresist pattern and etching method
US9653315B2 (en) Methods of fabricating substrates
US8603884B2 (en) Methods of fabricating substrates
US20110183269A1 (en) Methods Of Forming Patterns, And Methods For Trimming Photoresist Features
KR102574460B1 (en) How to pattern a substrate
US9978596B2 (en) Self-aligned multiple spacer patterning schemes for advanced nanometer technology
US20100075503A1 (en) Integral patterning of large features along with array using spacer mask patterning process flow
US10157743B2 (en) Methods of patterning a target layer
KR20080101677A (en) Semiconductor device manufacturing methods
US20120115074A1 (en) Methods Of Forming Patterned Masks
US8889559B2 (en) Methods of forming a pattern on a substrate
US20110300712A1 (en) Methods of Forming a Photoresist Pattern Using Plasma Treatment of Photoresist Patterns
US20140162458A1 (en) Methods of Forming A Pattern On A Substrate
US9741580B2 (en) Substrate mask patterns, methods of forming a structure on a substrate, methods of forming a square lattice pattern from an oblique lattice pattern, and methods of forming a pattern on a substrate
US9412615B2 (en) Patterning method and semiconductor structure including forming a plurality of holes using line pattern masks
CN103474337A (en) Method for manufacturing high-evenness grid electrode lines
US8409457B2 (en) Methods of forming a photoresist-comprising pattern on a substrate
US20120276745A1 (en) Method for fabricating hole pattern in semiconductor device
US8969214B2 (en) Methods of forming a pattern on a substrate
CN103474339B (en) Make the method for high evenness grid lines
CN102314075B (en) Composite mask and manufacturing method thereof
US20140256140A1 (en) Methods Of Forming A Pattern On A Substrate
US10818508B2 (en) Semiconductor structure and method for preparing the same
US7569477B2 (en) Method for fabricating fine pattern in semiconductor device
CN102314076B (en) Composite mask and manufacturing method thereof

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
ASS Succession or assignment of patent right

Owner name: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING

Effective date: 20121114

C41 Transfer of patent application or patent right or utility model
TA01 Transfer of patent application right

Effective date of registration: 20121114

Address after: 201203 Shanghai City, Pudong New Area Zhangjiang Road No. 18

Applicant after: Semiconductor Manufacturing International (Shanghai) Corporation

Applicant after: Semiconductor Manufacturing International (Beijing) Corporation

Address before: 201203 Shanghai City, Pudong New Area Zhangjiang Road No. 18

Applicant before: Semiconductor Manufacturing International (Shanghai) Corporation

C14 Grant of patent or utility model
GR01 Patent grant