CN102075144B - Electronic tag demodulation circuit - Google Patents
Electronic tag demodulation circuit Download PDFInfo
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- CN102075144B CN102075144B CN201010616078A CN201010616078A CN102075144B CN 102075144 B CN102075144 B CN 102075144B CN 201010616078 A CN201010616078 A CN 201010616078A CN 201010616078 A CN201010616078 A CN 201010616078A CN 102075144 B CN102075144 B CN 102075144B
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Abstract
An electronic tag demodulation circuit is characterized by comprising an envelope detection circuit, a signal demodulation circuit and a signal transformation circuit. The electronic tag demodulation circuit has the advantages that: when the invention is applied to a signal demodulation circuit of a passive high-frequency (HF)/ultra-high-frequency (UHF) electronic tag, the instantaneous power consumption of the circuit can be greatly reduced, the signal receiving capacity of the electronic tag can be greatly improved, the power consumption of the passive electronic tag can be reduced, and the work distance of the electronic tag can be improved.
Description
(1) technical field:
The present invention relates to a kind of demodulator circuit, especially a kind of electronic tag demodulator circuit.
(2) background technology:
Electronic tag is as a kind of rf data acquisition technique, just is being widely used in fields such as logistics, false proof, electronic bill and gate inhibition.As the electronic labelling system of passive high-frequency/ultrahigh frequency radio communication, low cost, low-power consumption, big data storage capacity become the problem of the required solution of electronic tag.Because electronic tag receives wireless signal and is passive circuit, how greatly to improve the reception signal capabilities of electronic tag, and the power consumption of reduction passive electronic label becomes the emphasis problem of being badly in need of solution.
(3) summary of the invention:
Goal of the invention of the present invention is to provide a kind of electronic tag demodulator circuit; It can overcome the deficiency of prior art; It is a kind of transient power consumption that can greatly reduce circuit; In the reception signal capabilities that greatly improves electronic tag simultaneously, reduce the power consumption of passive electronic label, thereby improve the circuit of the operating distance of electronic tag.
Technical scheme of the present invention: a kind of electronic tag demodulator circuit; Comprise high-frequency/ultrahigh frequency input range modulation (ASK) signal end Vrf of comprising sub-carrier signal, terminal VSS, power vd D, biasing voltage signal end Vbias, it is characterized in that it comprises envelope detection circuit, signal demodulating circuit and signal transformation circuit; Wherein the input of said envelope detection circuit connects high-frequency/ultrahigh frequency input range modulation (ASK) signal end Vrf that comprises sub-carrier signal; Its output is connected with the input of signal demodulating circuit, and the envelope signal that detects is exported to signal demodulating circuit; The input of said signal demodulating circuit output and signal transformation circuit; The required voltage signal Vdem of output output of said signal transformation circuit.
Above-mentioned said envelope detection circuit is made up of n capacitor C a1 to Can, a 2n diode D1 to D2n, a n capacitor C b1 to Cbn, (n-1) individual diode Da1 to Da (n-1), (n+1) individual diode Db1 to Db (n+1) and N channel transistor M1; The end of wherein said capacitor C a1 to Can is connected with terminal Vrf, and its other end is connected with the negative pole of diode D1, D3, D5 to D (2n-1), and is connected with the positive pole of diode D2, D4, D6 to D2n simultaneously; The positive pole of said diode D1, D3, D5 to D (2n-1) is connected with ground terminal VSS; The negative pole of said diode D2, D4, D6 to D2n is connected with the positive pole of the end of capacitor C b1 to Cbn and diode D3 to D2n, and its other end is connected with ground terminal VSS; Said diode Da1 to Da (n-1) is polyphone each other, and wherein the positive pole of diode Da1 is connected with ground terminal VSS, and the negative pole of diode Da (n-1) is connected with the negative pole of diode D (2n-2); The mutual polyphone of said diode Db1 to Db (n+1), wherein the positive pole of diode Db1 is connected with ground terminal VSS, and the negative pole of diode Db (n+1) is connected with the negative pole of diode D2n; The drain electrode of said N channel transistor M1 is connected with the negative pole of diode Da (n-1) and the negative pole of diode D (2n-2), and its source electrode is connected with ground terminal VSS, and its grid is connected with the output of signal demodulating circuit.
Above-mentioned said envelope detection circuit is made up of 4 capacitor C a1 to Ca4,8 diode D1 to D8,4 capacitor C b1 to Cb4,3 diode Da1 to Da3,5 diode Db1 to Db5 and N channel transistor M1; The end of wherein said capacitor C a1 to Ca4 is connected with terminal Vrf, and its other end is connected with the negative pole of diode D1, diode D3, diode D5, and is connected with the positive pole of diode D2, diode D4, diode D6, diode D8 simultaneously; The positive pole of said diode D1, diode D3, diode D5, diode D7 is connected with ground terminal VSS; The negative pole of said diode D2, diode D4, D6, diode D8 is connected with the positive pole of the end of capacitor C b1 to Cb4 and diode D3 to D8, and its other end is connected with ground terminal VSS; Said diode Da1 to Da3 contacts each other, and wherein the positive pole of diode Da1 is connected with ground terminal VSS, and the negative pole of diode Da3 is connected with the negative pole of diode D6; The mutual polyphone of said diode Db1 to Db5, wherein the positive pole of diode Db1 is connected with ground terminal VSS, and the negative pole of diode Db5 is connected with the negative pole of diode D8; The drain electrode of said N channel transistor M1 is connected with the negative pole of the negative pole of diode Da3 and diode D6, and its source electrode is connected with ground terminal VSS, and its grid is connected with the output of signal demodulating circuit.
Above-mentioned said signal demodulating circuit is to be made up of N channel transistor M2, N channel transistor M3, p channel transistor M4, p channel transistor M5 and N channel transistor M6; The source electrode of the source electrode of wherein said p channel transistor M4 and p channel transistor M5 links together and is connected with power vd D, and the drain electrode of said p channel transistor M4 links together with the drain electrode of N channel transistor M2 and is connected with the input of signal transformation circuit; The grid of the grid of said p channel transistor M4 and p channel transistor M5 interconnects; The drain electrode of the drain electrode of said p channel transistor M5 and N channel transistor M3 interconnects, its grid and drain electrode short circuit; The grid of said N channel transistor M2 is connected with the grid of N channel transistor M1 in the envelope detection circuit, its source class earth terminal VSS; The source class earth terminal VSS of said N channel transistor M3, the grid of its grid and N channel transistor M6 interconnects; The source class earth terminal VSS of said N channel transistor M6, its source class and grid short circuit, and source class connects biasing voltage signal end Vbias.
Above-mentioned said signal transformation circuit is to be made up of buffer B1; Said buffer B1 is made up of p channel transistor M7 and N channel transistor M8; The drain electrode that the grid of said p channel transistor M7 and N channel transistor M8 interconnects as the p channel transistor M4 in the input of signal transformation circuit and the signal demodulating circuit is connected with the drain electrode of N channel transistor M2; The drain electrode of the two interconnects the output Vdem as signal transformation circuit; The source class of said p channel transistor M7 connects power vd D; The source class earth terminal VSS of said N channel transistor M8.
Operation principle of the present invention: envelope detection circuit will comprise high-frequency/ultrahigh frequency input range modulation (ASK) signal of sub-carrier signal, through to capacitor C a1 to Can, Cb1 to Cbn; Diode D1 to D2n, Da1 to Da (n-1), Db1 to Db (n+1) carry out repeated charge and come picked up signal voltage; Realize the function of peak envelop detection, obtain the envelope signal of input radio frequency signal, produce rectified signal through N channel transistor M1; Thereby detection goes out envelope signal from wireless carrier signal, and signal demodulating circuit carries out the edge through transistor M2 to M6 to signal voltage and detects; The envelope signal that detection is gone out carries out demodulation, recovers required digital signal; Signal transformation circuit carries out shaping output through the digital signal that buffer B1 recovers demodulation, and the digital signal that is used for that demodulation is recovered is carried out shaping output.
Vref is high-frequency/ultrahigh frequency input range modulation (ASK) signal that comprises sub-carrier signal, and its frequency of carrier signal is 1kHz to 1GHz, is 1kHz to 1MHz at frequency of carrier signal; VSS is a ground connection; VDD is a power supply, and Vbias is a bias voltage, and Vdem is the output signal that rectification obtains.
Superiority of the present invention: the signal demodulating circuit that is used for passive high frequency (HF)/hyperfrequency (UHF) electronic tag; Can greatly reduce the transient power consumption of circuit; Greatly improve the reception signal capabilities of electronic tag; And the power consumption of reduction passive electronic label, thereby the operating distance of raising electronic tag.
(4) description of drawings:
Fig. 1 is the structured flowchart of the related a kind of electronic tag demodulator circuit of the present invention.
Fig. 2 is the structural representation of the related a kind of electronic tag demodulator circuit of the present invention.
Fig. 3 is the circuit diagram of the buffer B1 that signal transformation circuit adopted in the related a kind of electronic tag demodulator circuit of the present invention.
Fig. 4 is the structural representation of a kind of embodiment of the related a kind of electronic tag demodulator circuit of the present invention.
(5) embodiment:
Embodiment: a kind of electronic tag demodulator circuit (see figure 1); Comprise high-frequency/ultrahigh frequency input range modulation (ASK) signal end Vrf of comprising sub-carrier signal, terminal VSS, power vd D, biasing voltage signal end Vbias, it is characterized in that it comprises envelope detection circuit, signal demodulating circuit and signal transformation circuit; Wherein the input of said envelope detection circuit connects high-frequency/ultrahigh frequency input range modulation (ASK) signal end Vrf that comprises sub-carrier signal; Its output is connected with the input of signal demodulating circuit, and the envelope signal that detects is exported to signal demodulating circuit; The input of said signal demodulating circuit output and signal transformation circuit; The required voltage signal Vdem of output output of said signal transformation circuit.
Above-mentioned said envelope detection circuit (see figure 4) is made up of 4 capacitor C a1 to Ca4,8 diode D1 to D8,4 capacitor C b1 to Cb4,3 diode Da1 to Da3,5 diode Db1 to Db5 and N channel transistor M1; The end of wherein said capacitor C a1 to Ca4 is connected with terminal Vrf, and its other end is connected with the negative pole of diode D1, diode D3, diode D5, and is connected with the positive pole of diode D2, diode D4, diode D6, diode D8 simultaneously; The positive pole of said diode D1, diode D3, diode D5, diode D7 is connected with ground terminal VSS; The negative pole of said diode D2, diode D4, D6, diode D8 is connected with the positive pole of the end of capacitor C b1 to Cb4 and diode D3 to D8, and its other end is connected with ground terminal VSS; Said diode Da1 to Da3 contacts each other, and wherein the positive pole of diode Da1 is connected with ground terminal VSS, and the negative pole of diode Da3 is connected with the negative pole of diode D6; The mutual polyphone of said diode Db1 to Db5, wherein the positive pole of diode Db1 is connected with ground terminal VSS, and the negative pole of diode Db5 is connected with the negative pole of diode D8; The drain electrode of said N channel transistor M1 is connected with the negative pole of the negative pole of diode Da3 and diode D6, and its source electrode is connected with ground terminal VSS, and its grid is connected with the output of signal demodulating circuit.
Above-mentioned said signal demodulating circuit (see figure 4) is to be made up of N channel transistor M2, N channel transistor M3, p channel transistor M4, p channel transistor M5 and N channel transistor M6; The source electrode of the source electrode of wherein said p channel transistor M4 and p channel transistor M5 links together and is connected with power vd D, and the drain electrode of said p channel transistor M4 links together with the drain electrode of N channel transistor M2 and is connected with the input of signal transformation circuit; The grid of the grid of said p channel transistor M4 and p channel transistor M5 interconnects; The drain electrode of the drain electrode of said p channel transistor M5 and N channel transistor M3 interconnects, its grid and drain electrode short circuit; The grid of said N channel transistor M2 is connected with the grid of N channel transistor M1 in the envelope detection circuit, its source class earth terminal VSS; The source class earth terminal VSS of said N channel transistor M3, the grid of its grid and N channel transistor M6 interconnects; The source class earth terminal VSS of said N channel transistor M6, its source class and grid short circuit, and source class connects biasing voltage signal end Vbias.
Above-mentioned said signal transformation circuit (seeing Fig. 3, Fig. 4) is to be made up of buffer B1; Said buffer B1 is made up of p channel transistor M7 and N channel transistor M8; The drain electrode that the grid of said p channel transistor M7 and N channel transistor M8 interconnects as the p channel transistor M4 in the input of signal transformation circuit and the signal demodulating circuit is connected with the drain electrode of N channel transistor M2; The drain electrode of the two interconnects the output Vdem as signal transformation circuit; The source class of said p channel transistor M7 connects power vd D; The source class earth terminal VSS of said N channel transistor M8.
Claims (2)
1. electronic tag demodulator circuit; Comprise high-frequency/ultrahigh frequency input range modulation (ASK) signal end Vrf of comprising sub-carrier signal, terminal VSS, power vd D, biasing voltage signal end Vbias, it is characterized in that it comprises envelope detection circuit, signal demodulating circuit and signal transformation circuit; The input of wherein said envelope detection circuit connects high-frequency/ultrahigh frequency input range modulation (ASK) signal end Vrf that comprises sub-carrier signal, and its output is connected with the input of signal demodulating circuit, and the envelope signal that detects is exported to signal demodulating circuit; The input of said signal demodulating circuit output and signal transformation circuit; The required voltage signal Vdem of output output of said signal transformation circuit;
Said envelope detection circuit is made up of n capacitor C a1 to Can, a 2n diode D1 to D2n, a n capacitor C b1 to Cbn, (n-1) individual diode Da1 to Da (n-1), (n+1) individual diode Db1 to Db (n+1) and N channel transistor M1; The end of wherein said capacitor C a1 to Can is connected with terminal Vrf, and its other end is connected with the negative pole of diode D1, D3, D5 to D (2n-1), and is connected with the positive pole of diode D2, D4, D6 to D2n simultaneously; The positive pole of said diode D1, D3, D5 to D (2n-1) is connected with ground terminal VSS; The negative pole of said diode D2, D4, D6 to D2n is connected with the positive pole of the end of capacitor C b1 to Cbn and diode D3 to D2n, and its other end is connected with ground terminal VSS; Said diode Da1 to Da (n-1) is polyphone each other, and wherein the positive pole of diode Da1 is connected with ground terminal VSS, and the negative pole of diode Da (n-1) is connected with the negative pole of diode D (2n-2); The mutual polyphone of said diode Db1 to Db (n+1), wherein the positive pole of diode Db1 is connected with ground terminal VSS, and the negative pole of diode Db (n+1) is connected with the negative pole of diode D2n; The drain electrode of said N channel transistor M1 is connected with the negative pole of diode Da (n-1) and the negative pole of diode D (2n-2), and its source electrode is connected with ground terminal VSS, and its grid is connected with the output of signal demodulating circuit;
Said signal demodulating circuit is to be made up of N channel transistor M2, N channel transistor M3, p channel transistor M4, p channel transistor M5 and N channel transistor M6; The source electrode of the source electrode of wherein said p channel transistor M4 and p channel transistor M5 links together and is connected with power vd D, and the drain electrode of said p channel transistor M4 links together with the drain electrode of N channel transistor M2 and is connected with the input of signal transformation circuit; The grid of the grid of said p channel transistor M4 and p channel transistor M5 interconnects; The drain electrode of the drain electrode of said p channel transistor M5 and N channel transistor M3 interconnects, its grid and drain electrode short circuit; The grid of said N channel transistor M2 is connected with the grid of N channel transistor M1 in the envelope detection circuit, its source class earth terminal VSS; The source class earth terminal VSS of said N channel transistor M3, the grid of its grid and N channel transistor M6 interconnects; The source class earth terminal VSS of said N channel transistor M6, its source class and grid short circuit, and source class connects biasing voltage signal end Vbias;
Said signal transformation circuit is to be made up of buffer B1; Said buffer B1 is made up of p channel transistor M7 and N channel transistor M8; The drain electrode that the grid of said p channel transistor M7 and N channel transistor M8 interconnects as the p channel transistor M4 in the input of signal transformation circuit and the signal demodulating circuit is connected with the drain electrode of N channel transistor M2; The drain electrode of the two interconnects the output Vdem as signal transformation circuit; The source class of said p channel transistor M7 connects power vd D; The source class earth terminal VSS of said N channel transistor M8.
2. according to the said a kind of electronic tag demodulator circuit of claim 1, it is characterized in that said envelope detection circuit is made up of 4 capacitor C a1 to Ca4,8 diode D1 to D8,4 capacitor C b1 to Cb4,3 diode Da1 to Da3,5 diode Db1 to Db5 and N channel transistor M1; The end of wherein said capacitor C a1 to Ca4 is connected with terminal Vrf, and its other end is connected with the negative pole of diode D1, diode D3, diode D5, and is connected with the positive pole of diode D2, diode D4, diode D6, diode D8 simultaneously; The positive pole of said diode D1, diode D3, diode D5, diode D7 is connected with ground terminal VSS; The negative pole of said diode D2, diode D4, D6, diode D8 is connected with the positive pole of the end of capacitor C b1 to Cb4 and diode D3 to D8, and its other end is connected with ground terminal VSS; Said diode Da1 to Da3 contacts each other, and wherein the positive pole of diode Da1 is connected with ground terminal VSS, and the negative pole of diode Da3 is connected with the negative pole of diode D6; The mutual polyphone of said diode Db1 to Db5, wherein the positive pole of diode Db1 is connected with ground terminal VSS, and the negative pole of diode Db5 is connected with the negative pole of diode D8; The drain electrode of said N channel transistor M1 is connected with the negative pole of the negative pole of diode Da3 and diode D6, and its source electrode is connected with ground terminal VSS, and its grid is connected with the output of signal demodulating circuit.
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CN201010616078A CN102075144B (en) | 2010-12-30 | 2010-12-30 | Electronic tag demodulation circuit |
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CN103326669B (en) * | 2012-03-21 | 2017-02-08 | 国民技术股份有限公司 | Electronic tag demodulation circuit, demodulation method and electronic tag |
CN103872989B (en) * | 2012-12-17 | 2018-02-13 | 上海华虹集成电路有限责任公司 | Am signals demodulator circuit |
US10333842B2 (en) * | 2017-04-24 | 2019-06-25 | The Boeing Company | System and method for federated network traffic processing |
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CN1988523A (en) * | 2005-12-21 | 2007-06-27 | 上海贝岭股份有限公司 | Demodulating method and its circuit for amplitude modulation signal |
CN101409531A (en) * | 2008-12-03 | 2009-04-15 | 苏州市华芯微电子有限公司 | Pre-amplification circuit for radiofrequency signal |
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US7417496B2 (en) * | 2005-12-06 | 2008-08-26 | Electronics And Telecommunications Research Institute | Demodulator circuit of RFID system |
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CN1988523A (en) * | 2005-12-21 | 2007-06-27 | 上海贝岭股份有限公司 | Demodulating method and its circuit for amplitude modulation signal |
CN101409531A (en) * | 2008-12-03 | 2009-04-15 | 苏州市华芯微电子有限公司 | Pre-amplification circuit for radiofrequency signal |
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