CN102073459A - Computer system based on solid state drive and solid state drive - Google Patents

Computer system based on solid state drive and solid state drive Download PDF

Info

Publication number
CN102073459A
CN102073459A CN2010105324278A CN201010532427A CN102073459A CN 102073459 A CN102073459 A CN 102073459A CN 2010105324278 A CN2010105324278 A CN 2010105324278A CN 201010532427 A CN201010532427 A CN 201010532427A CN 102073459 A CN102073459 A CN 102073459A
Authority
CN
China
Prior art keywords
flash
control unit
unit interface
solid state
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN2010105324278A
Other languages
Chinese (zh)
Other versions
CN102073459B (en
Inventor
朱从义
贾宗铭
张耀辉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ramaxel Technology Shenzhen Co Ltd
Original Assignee
Ramaxel Technology Shenzhen Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ramaxel Technology Shenzhen Co Ltd filed Critical Ramaxel Technology Shenzhen Co Ltd
Priority to CN2010105324278A priority Critical patent/CN102073459B/en
Publication of CN102073459A publication Critical patent/CN102073459A/en
Application granted granted Critical
Publication of CN102073459B publication Critical patent/CN102073459B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)

Abstract

The invention discloses a computer system based on a solid state drive. The computer system comprises a processor, and a flash controller and a solid state drive which are interconnected, wherein the flash controller is connected with the processor through a bus and is used for receiving the operating command of the processor and realizing mutual conversion between bus data and flash data; and the solid state drive comprises a controller interface module and at least one flash chip, and the controller interface module is connected with the flash controller for receiving the operating command of the flash chip and operating the flash chip according to the command. The invention also correspondingly provides a solid state drive applied in the system. The computer system disclosed by the invention directly connects the flash chip in the solid state drive with a computer mainframe through a standard flash interface, so as to improve the storage capacity of system data, simplify system design and reduce system power consumption.

Description

Computer system and solid state hard disc based on solid state hard disc
Technical field
The present invention relates to field of computer technology, relate in particular to a kind of computer system and solid state hard disc based on solid state hard disc.
Background technology
In traditional storage organization, generally be to adopt the storage medium of mechanical hard disk as Large Volume Data, along with the lifting of flash capacity, solid state hard disc substitutes mechanical hard disk gradually in notebook and server become jumbo storage medium.Relative conventional hard, solid state hard disc has a lot of excellent characteristic, and its speed is fast, and is low in energy consumption, and shock resistance is strong.But be subject to existing Computer Architecture, use-pattern for compatible conventional hard, at present solid state hard disc has still adopted the SATA structure to finish data communication between hard disk and the computing machine, computer system as shown in Figure 1, equally, in order to satisfy traditional main frame 1 ground data layout, must there be a FTL layer to finish the conversion of data layout in the controller of solid state hard disc 2, guarantee the correct transmission of data, this solution has not only increased the complexity of system, the SATA interface has also limited the transmission speed of flash memory simultaneously, has reduced the performance of system.
In summary, existing computer system based on solid state hard disc obviously exists inconvenience and defective, so be necessary to be improved on reality is used.
Summary of the invention
At above-mentioned defective, the object of the present invention is to provide a kind of computer system and solid state hard disc based on solid state hard disc, memory property that can the elevator system data, the simplified system design reduces system power dissipation.
To achieve these goals, the invention provides a kind of computer system based on solid state hard disc, comprise processor, described system also comprises interconnective flash controller and solid state hard disc, wherein:
Described flash controller is connected in described processor by bus, and described flash controller is used to receive the operational order of described processor and described operational order is converted into the flash disk operation order, and realizes the mutual conversion of bus data and flash data;
Described solid state hard disc comprises the control unit interface module and is connected at least one flash chip of described control unit interface module, described control unit interface module is connected with described flash controller, is used to receive described flash disk operation order and according to described order described flash chip is operated.
According to computer system of the present invention, described flash controller comprises a bus conversion module, is used for bus interface timing is converted to local sequential, or local sequential is converted into bus interface timing.
According to computer system of the present invention, described control unit interface module comprises some control unit interface submodules, and described each control unit interface submodule connects at least one flash chip.
According to computer system of the present invention, described operational order comprises the reading and writing of described flash data and delete command.
According to computer system of the present invention, described flash controller comprises a buffer module, is used for sending to described control unit interface module after the described flash data buffering, and perhaps the data that described control unit interface module is transmitted are carried out buffered.
According to computer system of the present invention, described buffer module comprises:
The read data buffer module is used for reading sequential according to this locality and receives the data that the control unit interface module sends, and these data are carried out buffered;
The write data buffer module is used for writing sequential according to this locality and is sent to described control unit interface module after with described flash data buffered.
According to computer system of the present invention, described flash controller is integrated on the mainboard of described computer system.
The present invention provides a kind of solid state hard disc that is applied to said system accordingly, described solid state hard disc comprises interconnective control unit interface module and is connected at least one flash chip of described control unit interface module, described control unit interface module connects outside flash controller, is used to receive the operational order of described flash chip and according to described order described flash chip is operated.
According to solid state hard disc of the present invention, described control unit interface module comprises some control unit interface submodules, and described each control unit interface submodule connects at least one flash chip.
The present invention directly is connected with the flash chip of solid state hard disc by make main frame with flash controller, specifically can realize by direct integrated flash controller on computer motherboard, this flash controller can be converted into the operational order of processor the flash disk operation order, solid state hard disc is connected flash chip by a control unit interface module with flash controller, and this control unit interface module can receive the flash disk operation instruction and each flash chip is carried out associative operation.Whereby, solid state hard disc has saved traditional control circuit, directly realizes the data transmission of solid state hard disc and main frame with flash controller, but the memory property of elevator system data, and the simplified system design reduces system power dissipation.
Description of drawings
Fig. 1 is the structural representation based on the computer system of solid state hard disc of prior art;
Fig. 2 is the structural representation that the present invention is based on the computer system of solid state hard disc;
Fig. 3 is the structural representation that the department of computer science that the present invention is based on solid state hard disc unifies embodiment.
Embodiment
In order to make purpose of the present invention, technical scheme and advantage clearer,, the present invention is further elaborated below in conjunction with drawings and Examples.Should be appreciated that specific embodiment described herein only in order to explanation the present invention, and be not used in qualification the present invention.
Fig. 2 shows the basic structure of the computer system that the present invention is based on solid state hard disc, this computer system comprises main frame 100 and solid state hard disc 200, main frame 100 includes processor 10 and flash controller 20, solid state hard disc 200 comprises control unit interface module 30 and is connected at least one flash chip 40 of this control unit interface module 30, wherein:
Flash controller 20 is connected in processor 10 by bus, and this flash controller 20 is used for the operational order of receiving processor 10 and this operational order is converted into the flash disk operation order, and realizes the mutual conversion of bus data and flash data.Need to prove, flash controller 20 preferentially is integrated on the mainboard of main frame 100, and flash controller herein 20 is equal to the flash memory standard interface, by this flash memory standard interface, can directly realize the data manipulation of main frame 100 with 40 of the flash chips of solid state hard disc 200.
Control unit interface module 30 is connected with flash controller 20, is used to receive the flash disk operation order, and according to this flash disk operation order corresponding flash memory chip 40 is operated.The flash disk operation order comprises the reading and writing of flash chip 40 or deletion etc., when control unit interface module 30 receives a certain flash disk operation order, promptly corresponding flash chip 40 carried out corresponding reading and writing or deletion action.
Computer system of the present invention has been removed traditional SATA interface, and flash chip 40 is directly linked to each other with computer motherboard by the flash memory standard interface, and the elevator system performance reduces system complexity and system power dissipation.Need to prove that for cooperating the hardware configuration of this computer system, corresponding operating system software need change accordingly, mainly is that original NTFS and FAT file layout are made amendment, make it support the storage organization of the flash chip of ecosystem to get final product.Whereby, the present invention can simplify hardware system greatly under the situation that does not increase the software systems complexity.
In a specific embodiment of the present invention, referring to Fig. 3, flash controller 20 comprises a bus conversion module 21 and buffer module 22, wherein:
Bus conversion module 21 is used for the sequential of bus interface is converted to local sequential or local sequential is converted into bus interface timing.The operational order of having mentioned 10 pairs of flash chips 40 of processor in the previous embodiment has the read and write of data, and flash controller 20 is converted to the flash disk operation order with processor 10 by the operational order of sending on the bus.When 10 pairs of flash chips 40 of processor write data, bus conversion module 21 received data to be written according to this this locality sequential after bus interface timing is transformed local sequential; When 10 pairs of flash chip 40 sense datas of processor, bus conversion module 21 is sent to bus according to this bus interface timing with data to be transmitted after local sequential is converted into bus interface timing.
Buffer module 22 is used for and will sends to control unit interface module 30 after the flash data buffering, and perhaps the data that control unit interface module 30 is transmitted are carried out buffered.This buffer module 22 comprises read data buffer module 221 and write data buffer module 222, and wherein: read data buffer module 221 is used for reading sequential according to this locality and receives the data that control unit interface module 30 sends, and these data are carried out buffered; Write data buffer module 222 is used for writing sequential according to this locality and is sent to control unit interface module 30 after with the flash data buffered.
Among this embodiment, control unit interface module 30 comprises some control unit interface submodules 31, and each control unit interface submodule 31 connects at least one flash chip, referring to Fig. 3, the data that can realize a plurality of flash chips whereby are concurrent, improve the bit wide of whole solid state hard disc 200, and then improve the transmission speed of data.In fact, the single synchronous flash memory interface of standard can reach 200MB/s, if increase data bit width to 32bit, then can reach 800MB/s, be more preferably, the speed room for promotion of synchronous flash memory interface is also very big, same DDR chip interface can reach the data rate of 1667MHz at present, for the data bit width that increases, flash interface and computer interface are consistent, and upgrade to 32bit equally and get final product.Computer system of the present invention is preferably by adopting the parallel wide flash interface of multidigit directly to link to each other with mainboard, can eliminate the speed limit of existing hard-disk interface, also can simplify simultaneously the design of hard disk controller, avoid the design of complicated FTL layer, further guarantee the stability of hard disk.
Specify a processing procedure of computer system of the present invention below according to Fig. 3.
It at first is the example explanation with the read data, processor 10 sends the order of read data, flash controller 20 is translated into flash command and this flash command is sent to control unit interface module 30 after receiving this order by bus, control unit interface module 30 reads corresponding data in the flash chip 40 according to order, and these data are sent to the read data buffer module 221 of flash controller 20, after read data buffer module 221 is handled data buffering, by flash controller flash data is converted to behind the bus data to read according to bus interface timing again and is sent to processor 10.
Be the example explanation again with the write data, processor 10 is sent to flash controller 20 with data to be written by bus, this flash controller 20 receives these data according to local sequential and is to be sent to write data buffer module 222 behind the flash data with this data conversion, this write data buffer module 222 is sent to control unit interface module 30 after with the flash data buffered, and control unit interface module 30 writes flash chip 40 with flash data control then.
The present invention provides a kind of solid state hard disc of computer system as previously mentioned that is applied to accordingly.Referring to Fig. 3, this solid state hard disc 200 comprises control unit interface module 30 and is connected at least one flash chip 40 of this control unit interface module 30, control unit interface module 30 is connected with flash controller 20, be used to receive the flash disk operation order, and corresponding flash memory chip 40 operated according to this operational order.The flash disk operation order comprises the reading and writing of flash chip 40 or deletion etc., when control unit interface module 30 receives a certain flash disk operation order, promptly corresponding flash chip 40 carried out corresponding reading and writing or deletion action.Preferably, control unit interface module 30 comprises some control unit interface submodules 31, and each control unit interface submodule 31 at least one flash chip of connection, can realize that whereby the data of a plurality of flash chips are concurrent, improve the bit wide of whole solid state hard disc 200, and then improve the transmission speed of data.
In sum, the present invention directly is connected with the flash chip of solid state hard disc by make main frame with flash controller, specifically can realize by direct integrated flash controller on computer motherboard, this flash controller can be converted into the operational order of processor the flash disk operation order, solid state hard disc is connected flash chip by a control unit interface module with flash controller, and this control unit interface module can receive the flash disk operation instruction and each flash chip is carried out associative operation.Whereby, solid state hard disc has saved traditional control circuit, directly realizes the data transmission of solid state hard disc and main frame with flash controller, but the memory property of elevator system data, and the simplified system design reduces system power dissipation.
Certainly; the present invention also can have other various embodiments; under the situation that does not deviate from spirit of the present invention and essence thereof; those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection domain of the appended claim of the present invention.

Claims (9)

1. the computer system based on solid state hard disc comprises processor, it is characterized in that, described system also comprises interconnective flash controller and solid state hard disc, wherein:
Described flash controller is connected in described processor by bus, and described flash controller is used to receive the operational order of described processor and described operational order is converted into the flash disk operation order, and realizes the mutual conversion of bus data and flash data;
Described solid state hard disc comprises the control unit interface module and is connected at least one flash chip of described control unit interface module, described control unit interface module is connected with described flash controller, is used to receive described flash disk operation order and according to described order described flash chip is operated.
2. computer system according to claim 1 is characterized in that described flash controller comprises a bus conversion module, is used for bus interface timing is converted to local sequential, or local sequential is converted into bus interface timing.
3. computer system according to claim 1 is characterized in that, described control unit interface module comprises some control unit interface submodules, and described each control unit interface submodule connects at least one flash chip.
4. computer system according to claim 1 is characterized in that described operational order comprises the reading and writing of described flash chip and delete command.
5. computer system according to claim 1, it is characterized in that, described flash controller comprises a buffer module, is used for sending to described control unit interface module after the described flash data buffering, and perhaps the data that described control unit interface module is transmitted are carried out buffered.
6. computer system according to claim 5 is characterized in that, described buffer module comprises:
The read data buffer module is used for reading sequential according to this locality and receives the data that the control unit interface module sends, and these data are carried out buffered;
The write data buffer module is used for writing sequential according to this locality and is sent to described control unit interface module after with described flash data buffered.
7. computer system according to claim 1 is characterized in that described flash controller is integrated on the mainboard of described computer system.
8. solid state hard disc, be applied to as each described computer system of claim 1~7, it is characterized in that, described solid state hard disc comprises interconnective control unit interface module and is connected at least one flash chip of described control unit interface module, described control unit interface module connects outside flash controller, is used to receive the operational order of described flash chip and according to described order described flash chip is operated.
9. solid state hard disc according to claim 8 is characterized in that, described control unit interface module comprises some control unit interface submodules, and described each control unit interface submodule connects at least one flash chip.
CN2010105324278A 2010-11-02 2010-11-02 Computer system based on solid state drive and solid state drive Expired - Fee Related CN102073459B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2010105324278A CN102073459B (en) 2010-11-02 2010-11-02 Computer system based on solid state drive and solid state drive

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2010105324278A CN102073459B (en) 2010-11-02 2010-11-02 Computer system based on solid state drive and solid state drive

Publications (2)

Publication Number Publication Date
CN102073459A true CN102073459A (en) 2011-05-25
CN102073459B CN102073459B (en) 2013-04-17

Family

ID=44032012

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2010105324278A Expired - Fee Related CN102073459B (en) 2010-11-02 2010-11-02 Computer system based on solid state drive and solid state drive

Country Status (1)

Country Link
CN (1) CN102073459B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102541760A (en) * 2012-01-04 2012-07-04 记忆科技(深圳)有限公司 Computer system based on solid-state hard disk
CN114296638A (en) * 2021-12-10 2022-04-08 深圳大普微电子科技有限公司 Storage and calculation integrated solid state disk controller, solid state disk, data storage system and method

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101140502A (en) * 2007-10-19 2008-03-12 华为技术有限公司 Solid-state hard disk controller circuit and solid-state hard disk
CN101339492A (en) * 2008-08-11 2009-01-07 湖南源科创新科技股份有限公司 Native SATA solid-state hard disk controller
CN101546601A (en) * 2009-05-13 2009-09-30 杭州华三通信技术有限公司 Solid state disk and memory system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101140502A (en) * 2007-10-19 2008-03-12 华为技术有限公司 Solid-state hard disk controller circuit and solid-state hard disk
CN101339492A (en) * 2008-08-11 2009-01-07 湖南源科创新科技股份有限公司 Native SATA solid-state hard disk controller
CN101546601A (en) * 2009-05-13 2009-09-30 杭州华三通信技术有限公司 Solid state disk and memory system

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102541760A (en) * 2012-01-04 2012-07-04 记忆科技(深圳)有限公司 Computer system based on solid-state hard disk
CN102541760B (en) * 2012-01-04 2015-05-20 记忆科技(深圳)有限公司 Computer system based on solid-state hard disk
CN114296638A (en) * 2021-12-10 2022-04-08 深圳大普微电子科技有限公司 Storage and calculation integrated solid state disk controller, solid state disk, data storage system and method
CN114296638B (en) * 2021-12-10 2024-02-20 深圳大普微电子科技有限公司 Storage and calculation integrated solid state disk controller and related device and method

Also Published As

Publication number Publication date
CN102073459B (en) 2013-04-17

Similar Documents

Publication Publication Date Title
TWI536384B (en) Method for data deduplication and memory device thereof
KR102020466B1 (en) Data storage device including a buffer memory device
CN102063274B (en) Storage array, storage system and data access method
US8325555B2 (en) Data storage devices and power management methods thereof
US20140281361A1 (en) Nonvolatile memory device and related deduplication method
CN204203855U (en) Novel external SAS12G RAID storage card
EP2565772A1 (en) Storage array, storage system, and data access method
US10657052B2 (en) Information handling system with priority based cache flushing of flash dual in-line memory module pool
US20070041050A1 (en) Memory management method and system
KR20200093362A (en) Memory system and operating method thereof
US20140317339A1 (en) Data access system, data accessing device, and data accessing controller
US8626985B2 (en) Hybrid optical disk drive, method of operating the same, and electronic system adopting the hybrid optical disk drive
CN102012794A (en) Solid state disk and access control method thereof, and solid state disk controller
CN104035731B (en) Storage head node of blade server
US9547460B2 (en) Method and system for improving cache performance of a redundant disk array controller
US10853255B2 (en) Apparatus and method of optimizing memory transactions to persistent memory using an architectural data mover
CN102073459B (en) Computer system based on solid state drive and solid state drive
CN204203856U (en) Novel built-in SAS12G RAID storage card
TWI688864B (en) Storage apparatus and storing method
CN211061974U (en) High-performance server mainboard and computer based on X86 treater
US9009389B2 (en) Memory management table processing method, memory controller, and memory storage apparatus
CN105589912A (en) Method and storage structure for processing frequently written document with MRAM (Magnetic Random Access Memory)
CN104424124A (en) Memory device, electronic equipment and method for controlling memory device
CN204045209U (en) A kind of SAS 12G RAID storage card
KR20220091362A (en) Utilizing nand buffer for dram-less multilevel cell programming

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20130417