CN102062825B - Direct current protection test device and test method of direct current protector - Google Patents
Direct current protection test device and test method of direct current protector Download PDFInfo
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- CN102062825B CN102062825B CN2010102840797A CN201010284079A CN102062825B CN 102062825 B CN102062825 B CN 102062825B CN 2010102840797 A CN2010102840797 A CN 2010102840797A CN 201010284079 A CN201010284079 A CN 201010284079A CN 102062825 B CN102062825 B CN 102062825B
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Abstract
The invention discloses a direct current protection test device and a test method of a direct current protector. The device comprises an input and output (IO) device connected with the direct current protector, a mainboard device connected with an upper personal computer (PC) and the direct current protector, and a field programmable gate array (FPGA) connected between the mainboard device and the IO device, wherein the IO device receives a laser energy signal of the direct current protector, separates the received laser energy signal to acquire a clock signal and a low voltage signal and transmits the acquired signals to the FPGA; the FPGA superposes default information data with the low voltage signal according to a coded format and transmits a superposed signal to the direct current protector through the IO device; a closed loop is formed; the mainboard device receives test data transmitted by the upper PC and transmits the test data to the IO device through the FPGA; and the test data is transmitted to the direct current protector through the IO device. By using the direct current protection test device and the test method of the direct current protector, the test data can be precisely set, accurate and strict detection is performed on the direct current protector, a convenient experimental means is provided for the conventional test, and high practicability is achieved.
Description
Technical field
The present invention relates to the HVDC (High Voltage Direct Current) transmission system field tests, the method for testing of particularly a kind of direct current protecting proving installation and a kind of direct current protecting device.
Background technology
The control protection system of south electric network DC engineering is that realize on the basis with high-speed figure formula Programmable Logic Controller SIMADYND system normally; DC control system is divided into two cover systems of mutual redundancy; two cover systems are standby each other; at the straight-flow system run duration, can carry out undisturbed switching between two cover systems.The direct current protecting system has adopted three to get two configuration modes; the identical direct current protecting device of three cover configurations; be placed on three respectively independently in the rack; the DC operation amount of measuring is directly taken from the primary circuit by optical fiber; two cover protections of fully redundance are adopted in the DC filter protection, and AC filter protection has partly adopted the SIMADYND system.
Owing to adopt optical fiber to carry out the singularity of energy and data transmission in the direct current protecting device; determined the singularity of its means of testing; in the prior art to the test mode of direct current protecting device; with the direct current protecting device is that the SIMADYND device is an example; be that laser input end with the test optical fiber box is connected with the IO3 module of SIMADYND device by electrical to optical converter; voltage input end of test optical fiber box (in OPTODYN is housed) is connected with adjustable DC power box; measure the voltage of adjustable DC power box by multimeter; by adding the dc voltage value that to test respectively, realize test to the direct current protecting device.
The test mode of this direct current protecting device of the prior art needs the manual adjustment DC power box, and utilizes multimeter to come measuring voltage; therefore; when voltage being adjusted to experiment value, all need to carry out the adjustment process of a carefulness, and the precision control ratio of output voltage values is difficult at every turn.Each test only can realize a passage is carried out dosage in the prior art in addition, therefore can't export a plurality of amount of fibre simultaneously.
Summary of the invention
At above-mentioned problems of the prior art; the object of the present invention is to provide the method for testing of a kind of DC test protection tester and direct current protecting device; it can realize accurate, the strict detection to the direct current protecting device; be the research technique that its conventionally test is provided convenience, have very high practicality.
For achieving the above object, the present invention by the following technical solutions:
A kind of direct current protecting proving installation; comprise: the IO device that is connected with the direct current protecting device; with upper PC; the master board device that described direct current protecting device is connected; and be connected in FPGA between described master board device and the described IO device; described IO device receives the laser energy signal of described direct current protecting device and the laser energy signal that receives is separated; send to described FPGA after isolating clock signal and low voltage signal; FPGA sends to described direct current protecting device according to default coded format stack back by described IO device with default information data and described low voltage signal; form closed loop; described master board device receives the test data that described upper PC sends; and this test data sent to the IO device by FPGA, send to described direct current protecting device by the IO device.
A kind of method of testing of direct current protecting device comprises step:
Receive the laser energy signal that the direct current protecting device sends, and this laser energy signal is being separated, isolate low voltage signal and clock signal, and, form closed loop with sending to described direct current protecting device after default information data and the default coded format stack of described low voltage signal basis;
Receive the initial testing data that PC issues, and these initial testing data are sent to described direct current protecting device.
According to the invention described above scheme; it is after the direct current protecting proving installation starts; at first discern the laser energy signal of direct current protecting device; and by the laser energy signal is separated; obtain clock signal and low voltage signal; then default information data and this low voltage signal are fed back to the direct current protecting device after presetting the coded format stack; make the direct current protecting device can stably externally export energy; and between direct current protecting proving installation and direct current protecting device, set up stable being connected; form closed loop; after this; can set test data by upper PC; and send to the direct current protecting device by the direct current protecting proving installation, realize the test process of direct current protecting.Direct current protecting test mode of the present invention; between direct current protecting device and direct current protecting proving installation of the present invention, formed closed loop; and can corresponding test data be set by upper PC; and this test data passed to the direct current protecting device; can realize the setting of accurate test data; realization for its conventionally test provides laboratory facilities easily, has very high practicality to accurate, the strict detection of direct current protecting device.
Description of drawings
Fig. 1 is the structural representation of direct current protecting proving installation embodiment of the present invention;
Fig. 2 is the schematic flow sheet of direct current protecting method of testing embodiment of the present invention.
Embodiment
Below be that example is elaborated to the present invention program to one of them embodiment of direct current protecting proving installation of the present invention and direct current protecting method of testing.
The present invention program's basic goal; it is the measuring accuracy that can improve when the direct current protecting device tested; and can improve the convenience when the direct current protecting device tested; for this reason; the present invention program considers and sets the direct current protecting proving installation; this direct current protecting proving installation can form closed loop with the direct current protecting device that will test; thereby detecting information directly can be sent to the direct current protecting device; this direct current protecting proving installation can also receive the corresponding test data that upper PC issues; such as magnitude of voltage; current value; and the test data that PC is issued; send to the direct current protecting device; thereby can digital test data be set by PC, test; easy to adjust, the raising of the measuring accuracy when realization is tested the direct current protecting device.
Referring to shown in Figure 1; it is the structural representation of direct current protecting proving installation embodiment of the present invention; as shown in the figure; direct current protecting proving installation of the present invention includes: the IO device that is connected with the direct current protecting device; with upper PC; the master board device that the direct current protecting device is connected; and be connected in FPGA (programmable logic device (PLD)) between described master board device and the described IO device; described IO device receives the laser energy signal of direct current protecting device; and the laser energy signal that receives separated; send to FPGA after isolating clock signal and low voltage signal; after FPGA receives default information data and low voltage signal are fed back to the direct current protecting device after presetting the coded format stack; form closed loop; subsequently; master board device receives the test data that upper PC sends; and this test data sent to the IO device by FPGA, by the IO device this test data is sent to the direct current protecting device.
Wherein, after the IO device is receiving the laser energy signal, can also be earlier to this laser energy signal carry out first handle operation after, this first is handled operation and comprises the opto-electronic conversion operation, then the laser energy signal after first operational processes is separated.In addition; when the signal after the IO device will superpose, test data send to the direct current protecting device; can be earlier carry out second to test data and handle operation, this second is handled operation and comprises and then the test data after second operational processes is sent to the direct current protecting device by the electric light conversion operations.
In addition; the IO device includes optical receiver and optical transmitter; described optical receiver is connected with the LM module of direct current protecting device; realization is to the reception of the light signal that sends from the direct current protecting device; described optical transmitter is connected with the IO module of described direct current protecting device, sends to the direct current protecting device with the light signal after will changing.
Above-mentioned IO device; can also include photoelectric switching circuit, electro-optical conversion circuit, comparator circuit, driving circuit and led status display module; mainly be opto-electronic conversion, Clock Extraction and the shaping of finishing optical power signals, the judgement of finishing the luminous power input voltage and formation close-loop feedback, finish the transmission of data-signal and the function of opto-electronic conversion the energy output of direct current protecting device.
When carrying out concrete processing, photoelectric switching circuit is converted to electric signal by the light signal that optical receiver receives, electric signal after the conversion is sent to comparator circuit, comparator circuit includes two parts, a part is a clock extracting circuit, another part is the low-voltage decision circuitry, clock extracting circuit has adopted follows comparator circuit, can be along with clock signal is correctly extracted in the variation of external voltage, and the low-voltage decision circuitry has adopted hysteresis comparator circuit, by setting the situation of change that the threshold control circuit reflects external voltage preferably, and producing corresponding low voltage signal, clock signal and low voltage signal are transferred to FPGA through the shaping and the driving of overdrive circuit.
Wherein, above-mentioned master board device; specifically comprise ARM (Advanced RISC Machines) processor and DSP (digital signal processor); arm processor is connected with above-mentioned upper PC; DSP is connected with arm processor and FPGA, by DSP realize and the direct current protecting device between analog quantity, switching value between mutual.Wherein, arm processor inside is integrated with Ethernet, be used for the data communication between DSP and the upper PC, all control informations, status information etc. all realize downloading, uploading by arm processor, in addition, the Ethernet interface that adopts in the arm processor can be the Ethernet interface of 10M or 100M.And above-mentioned DSP; can be to adopt up-to-date DSP Digital Signal Processing and 16 digital-to-analog conversion and 32 numerical evaluation precision; because DSP has arithmetic capability at a high speed; by adopting advanced DSP technology; can improve the direct current protecting proving installation data point of ripple output weekly energetically, improve and improve the transient response speed and the spoke frequency characteristic of direct current protecting proving installation greatly.By utilizing DSP to add the digital information processing system that FPGA constitutes, can greatly improve and improve the small-signal output accuracy and the output waveform of direct current protecting proving installation.
In addition; in the above-mentioned explanation to test process; be that the test data that receives is described for the digital quantity (also can be referred to as amount of fibre) that receives by optical fiber; by direct current protecting device of the present invention; can also realize the test of the test data of the digital quantity of analog quantity (perhaps being referred to as electric parameters), switching value is become analog quantity, switching value respectively at this.When realizing analog quantity mutual; upper PC sends to the DC test protective device with user's setting value; arm processor in the direct current protecting proving installation will be transmitted to dsp processor to setting value; subsequently; dsp processor carries out computing to this setting value; calculate the value that will send; and this value sent to DA (digital-to-analog conversion); the output of control DA; after the digital-to-analog conversion by DA; externally export the setting analog quantity through adjusting circuit, this analog quantity can directly be sent to the direct current protecting device by DSP.
And for switching value, it can be divided into switch input quantity and switch output quantity: for the switch input quantity, the user can open into state by opening into the access of amount interface, the direct current protecting proving installation can import state into by opening into template, the value of this state is transferred into DSP through behind the modulate circuit, after DSP judges it, corresponding state is sent to upper PC show accordingly; For the switch output quantity, the user can set by upper PC and leave, and DSP gets access to after this leaves information, judges and controls the corresponding relays action, through the external output of switch template completion status.
In addition, above-mentioned FPGA can adopt the A3P250PQ208 device of Actel company, judge to finish clock, data are temporary, the functions such as control of the serial conversion of parallel data and transmission, message transmission form, and under the situation that has adopted check bit and encrypted, carry out functions such as check bit calculating, encrypted bits calculating.FPGA can make data send in reliable pulse position by the judgement to idle condition, thereby finishes and the communicating by letter of direct current protecting device.In the internal work flow process of FPGA, its concrete course of work can be, it at first carries out address decoding to the data from dsp bus, judged whether write signal, if have, then upgrade register, and when pulse signal arrives, carry out and go here and there conversion, and after adding parity check bit, serial data is exported to the IO device.
Pass through FPGA; can also realize detection to the electric energy output situation of the LM module of direct current protecting device; low-voltage decision circuit in the IO device is by comparing the value of input voltage and setting voltage; judge voltage condition; if input voltage is lower than setting voltage, then the IO device will be exported to FPGA with low voltage signal, after FPGA receives; this low voltage signal is added to be sent in the data message, realizes the real-time detection to input signal.
The control protection system of considering present south electric network DC engineering is that realize on the basis with high-speed figure formula Programmable Logic Controller SIMADYND system, and therefore, the direct current protecting device of using among the present invention can be the direct current protecting device of SIMADYND system.
In addition; direct current protecting proving installation of the present invention can be connected with the direct current protecting device by optical fiber; in this case, in the transmittance process of laser signal, the efficient of NE BY ENERGY TRANSFER depends primarily on the conversion efficiency during optical fiber and the opto-electronic conversion; and the core diameter of at present common data optical fiber only is 62.5/125 μ m; therefore, in order to improve the efficient of NE BY ENERGY TRANSFER as far as possible, can adopt the bigger optical fiber of core diameter; in the present invention program, can adopt core diameter is the optical fiber of 200/230 μ m.
In addition; above-mentioned DSP; can also include ADC; go up the simulating signal of output in order to the X13 that gathers IO module in the direct current protecting device,, realize System self-test in order to judge the working condition of total system path; simultaneously; DSP can also include DAC, exports simulating signal by DAC, and the simulating signal here comprises control signals such as analog quantity and switching value.
The present invention program's direct current protecting proving installation; can realize supporting different integrated circuit board types; for example LM3.1, LM4.0 integrated circuit board type or the like; for different integrated circuit board types; can adopt different message formats and computations mode; to adopt LM3.1 integrated circuit board type is example; the LM module that the optical receiver of IO device above-mentioned and of the present invention is connected is corresponding LM3.1 module; the IO module that optical transmitter in the IO device above-mentioned and of the present invention is connected is corresponding IO3.1 module; for other integrated circuit board type; by that analogy, do not repeat them here.
In addition; as mentioned above, by the solution of the present invention, be that the test data that the upper PC of reception issues realizes test function; therefore; can be by setting human-computer interaction interface, realize input by human-computer interaction interface, in addition to test data; since the present invention by Ethernet be connected with upper PC, communicating by letter by optical transmitter, optical receiver and realization and direct current protecting device; therefore, the connection of a plurality of passages can be set, realize simultaneously a plurality of passages are carried out the dosage test.
In traditional proving installation; when carrying out accuracy correction; generally be to realize by the potentiometer of adjusting gear inside; thereby exist the correction work amount big; correction accuracy is subject to shortcomings such as human factor influence such as reading; and direct current protecting proving installation of the present invention; be to issue test data by PC; thereby can carry out self-correcting by the software on PC; the direct current protecting proving installation is connected to computing machine by the serial ports of digital standard scale; computing machine is connected to the direct current protecting proving installation through network interface again; timing; computing machine issues voltage; current value reads the reading of standard scale simultaneously automatically to the direct current protecting proving installation by serial ports, the correction coefficient that draws is by passing to the direct current protecting proving installation under the network interface; and be cured to the flash memory of direct current protecting proving installation, finish the accuracy correction of tester.
According to the direct current protecting proving installation of the invention described above, the present invention also provides a kind of method of testing of direct current protecting device, referring to shown in Figure 2, is the schematic flow sheet of the method for testing embodiment of direct current protecting device of the present invention, and it comprises step:
Step S101: receive the laser energy signal that the direct current protecting device sends, enter step S102;
Step S102: this laser energy signal is separated, obtain low voltage signal and clock signal, and default information data and described low voltage signal returned after according to default coded format stack send to described direct current protecting device, form closed loop, enter step S103;
Step S103: receive the initial testing data that PC issues, and these initial testing data are sent to described direct current protecting device.
In addition, when the direct current protecting device is tested, normally need to import repeatedly data,, relatively obtain concrete test result, therefore, after above-mentioned steps S103, can also comprise step to analyze by repeatedly test result is compared analysis:
Step S104: receive the test data after the renewal that PC issues, and the test data after this renewal is sent to described direct current protecting device.
Wherein, the test data after the above-mentioned renewal can be set arbitrarily, and for to analyzing purpose easily, the test data after the above-mentioned renewal can be set to described initial testing data and add resulting value after this initial testing data corresponding preset step-length.Because test data can include a plurality of parameters, for example magnitude of voltage, current value, for these different parameter values, the parameter value that can be respectively variant set respectively separately initial value and the value of default step-length separately.
Wherein, after receiving the laser energy signal, can also be earlier to this laser energy signal carry out first handle operation after, this first is handled operation and comprises the opto-electronic conversion operation, then the laser energy signal after first operational processes is separated.In addition; when the test data after the signal after the stack, initial testing data or the renewal is sent to the direct current protecting device; can carry out second earlier and handle operation, this second is handled operation and comprises and then the data after second operational processes are sent to the direct current protecting device by the electric light conversion operations.
The control protection system of considering present south electric network DC engineering is that realize on the basis with high-speed figure formula Programmable Logic Controller SIMADYND system, and therefore, the direct current protecting device of using among the present invention can be the direct current protecting device of SIMADYND system.
Above-described embodiment of the present invention only is the explanation to most preferred embodiment of the present invention, does not constitute the qualification to protection domain of the present invention.Any modification of being done within the spirit and principles in the present invention, be equal to and replace and improvement etc., all should be included within the claim protection domain of the present invention.
Claims (10)
1. direct current protecting proving installation; it is characterized in that; comprise: the IO device that is connected with the direct current protecting device; with upper PC; the master board device that described direct current protecting device is connected; and be connected in FPGA between described master board device and the described IO device; described IO device receives the laser energy signal of described direct current protecting device and the laser energy signal that receives is separated; send to described FPGA after isolating clock signal and low voltage signal; described FPGA sends to described direct current protecting device according to default coded format stack back by described IO device with default information data and described low voltage signal; form closed loop; described master board device receives the test data that described upper PC sends; and this test data sent to described IO device by described FPGA, send to described direct current protecting device by described IO device.
2. direct current protecting proving installation according to claim 1; it is characterized in that; described master board device comprises: the arm processor that is connected with described upper PC and be connected in described arm processor and described FPGA between digital signal processor DSP, described arm processor comprises and is used for the Ethernet interface that is connected with described upper PC.
3. direct current protecting proving installation according to claim 1 and 2 is characterized in that, the direct current protecting device that described direct current protecting device is the SIMADYND system.
4. direct current protecting proving installation according to claim 1 and 2; it is characterized in that; described IO device comprises optical receiver and optical transmitter, and described optical receiver is connected with the LM module of direct current protecting device, and described optical transmitter is connected with the IO module of described direct current protecting device.
5. direct current protecting proving installation according to claim 1 and 2 is characterized in that, described IO device is connected with described direct current protecting device by optical fiber, and the core diameter of described optical fiber is 200/230 μ m.
6. the method for testing of a direct current protecting device is characterized in that, comprises step:
The IO device receives the laser energy signal that the direct current protecting device sends, and again this laser energy signal is separated, isolate low voltage signal and clock signal, FPGA sends to described direct current protecting device with default information data and described low voltage signal after presetting the coded format stack, form closed loop;
Master board device receives the initial testing data that PC issues, and these initial testing data are sent to described direct current protecting device.
7. the method for testing of direct current protecting device according to claim 6 is characterized in that, also comprises step:
Test data after the renewal that master board device reception PC issues, and the test data after will upgrading sends to described direct current protecting device.
8. the method for testing of direct current protecting device according to claim 7 is characterized in that, the test data after the described renewal is that described initial testing data add resulting value after this initial testing data corresponding preset step-length.
9. according to the method for testing of claim 6 or 7 described direct current protecting devices, it is characterized in that:
Before separating described laser energy signal, also comprise step: the laser energy signal that receives is carried out first handle operation, described first handles operation comprises the opto-electronic conversion operation;
Information after will superposeing or test data send to before the described direct current protecting device, also carry out second and handle operation, and described second handles operation comprises the electric light conversion operations.
10. the method for testing of direct current protecting device according to claim 9 is characterized in that, the direct current protecting device that described direct current protecting device is the SIMADYND system.
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| CN2010102840797A CN102062825B (en) | 2010-09-15 | 2010-09-15 | Direct current protection test device and test method of direct current protector |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105204398A (en) * | 2015-07-31 | 2015-12-30 | 许继集团有限公司 | Optical modulated signal communication and conversion device and converter valve control and protection system |
| CN105629963A (en) * | 2016-03-28 | 2016-06-01 | 成都天进仪器有限公司 | Intelligent relay protection testing instrument with lightning protection function |
| CN106444488B (en) * | 2016-08-31 | 2019-12-24 | 许继电气股份有限公司 | Configuration method and configuration device for redundancy device in direct-current transmission project |
| CN107688128A (en) * | 2017-08-22 | 2018-02-13 | 广州得元电力科技有限公司 | Method of testing, device, computer-readable recording medium and the computer equipment of subway direct current protecting device |
| CN108508291A (en) * | 2018-03-13 | 2018-09-07 | 云南电网有限责任公司电力科学研究院 | A kind of direct current protecting function detecting method and system |
| CN109709416A (en) * | 2018-12-11 | 2019-05-03 | 南京南瑞继保电气有限公司 | A kind of subway direct current test apparatus and test method |
| CN110514941A (en) * | 2019-09-29 | 2019-11-29 | 南方电网科学研究院有限责任公司 | Real-time simulation open-loop test method suitable for direct-current protection test |
| CN111693811A (en) * | 2020-06-12 | 2020-09-22 | 宁波恒力达科技有限公司 | Test method, device and equipment for low-frequency low-voltage load shedding protection system |
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| CN201191379Y (en) * | 2008-01-29 | 2009-02-04 | 江苏省电力试验研究院有限公司 | Digital protection and control device |
| CN101789171B (en) * | 2010-02-10 | 2011-08-03 | 凯迈(洛阳)电子有限公司 | Method and system for changing data transfer bus |
| CN201788243U (en) * | 2010-09-15 | 2011-04-06 | 中国南方电网有限责任公司超高压输电公司 | Direct-current protection testing device |
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