CN102055473A - CPT (coherent population trapping) atomic frequency standard based frequency synthesis system - Google Patents
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Abstract
The invention discloses a CPT (coherent population trapping) atomic frequency standard based frequency synthesis system which comprises a voltage-stabilized power supply, a phase-locked loop frequency synthesizer, a voltage-controlled oscillator and a power divider, wherein the voltage-stabilized power supply is respectively connected with the phase-locked loop frequency synthesizer, resisters and capacitors and grounded; the voltage-stabilized power supply is respectively connected with the voltage-controlled oscillator and capacitors and grounded; the voltage-controlled oscillator is respectively connected with resisters and capacitors and grounded; the power divider is respectively connected with capacitors and a microwave output end and grounded; a clock input end is connected with resisters and a capacitor, the other end of the capacitor is connected with the phase-locked loop frequency synthesizer which is respectively connected with resisters and capacitors; the phase-locked loop frequency synthesizer is respectively grounded and connected with resisters and a capacitor, the other end of the capacitor is connected with the power divider; and the phase-locked loop frequency synthesizer is respectively connected with capacitors and resisters. The frequency synthesis system has simple structure, small volume and low power consumption, and is convenient to use.
Description
Technical field
The present invention relates to frequency synthesis technique, the application extension of phase-locked loop frequency synthesizer to CPT atomic frequency standard field, is more specifically related to
OneKind based on the frequency synthesizer system of phase-locked loop frequency synthesizer, be applicable to the CPT atomic frequency standard that power consumption and volume are had higher requirements.
Background technology
Therefore frequency synthesizer system is widely used in scientific research and daily life, how to design the target that the frequency synthesizer system that is fit to various occasions has become numerous scientific research personnel to seek assiduously.Through years of development, people have developed the frequency synthesizer system that is applicable to the atomic frequency standard field of all kinds, in CPT atomic frequency standard in the past, mainly contain two kinds of synthesis modes: a kind of is the direct-type frequency synthesis, it is that frequency of oscillation with a voltage-controlled quartz oscillator is as reference frequency, produce a series of harmonic wave by reference frequency, these harmonic waves are extracted required frequency through repeatedly filtering, after amplifying.Concrete scheme is: the frequency multiplication characteristic of utilizing nonlinear circuit, with the frequency of oscillation of voltage-controlled quartz oscillator as incoming frequency, be input to the frequency multiplication unit of forming by nonlinear circuit, filter circuit, amplifying circuit, a series of high order harmonic components based on incoming frequency will be exported in the frequency multiplication unit, with a plurality of frequency multiplication units in series and adjust the parameter of each frequency multiplication unit, finally obtain required high-resolution microwave signal.Another kind is hybrid frequency synthesis, and it is with the DDS(Direct Digital Frequency Synthesizers) be used in combination with the integral frequency divisioil phase-locked loop frequency synthesizer.Concrete scheme is: the high-resolution characteristic of utilizing the DDS output frequency, with the frequency of oscillation of a voltage-controlled quartz oscillator as reference frequency, be input to respectively in DDS and the integral frequency divisioil phase-locked loop frequency synthesizer, DDS and integral frequency divisioil phase-locked loop frequency synthesizer adopt parallel organization, the DDS output frequency is through filter circuit, amplifying circuit is handled the output frequency mixing of back by frequency mixer and integral frequency divisioil phase-locked loop frequency synthesizer, obtain and frequent rate and difference frequency frequency, wave circuit after filtration again, amplifying circuit can obtain required high-resolution microwave signal after handling.The former circuit complexity is not easy to regulate, and volume is bigger; Latter circuit's power consumption is bigger, and two kinds of schemes all are difficult to be suitable in the CPT atomic frequency standard that power consumption and volume requirement are improved day by day.
Summary of the invention
The objective of the invention is to be to provide a kind of frequency synthesizer system based on the CPT atomic frequency standard, this frequency control system adopts the indirect type frequency synthesis technique, and simple in structure, easy to use, own vol is little, low in energy consumption.
To achieve these goals, the present invention adopts following technical measures: (technical scheme as shown in Figure 1)
This frequency control system comprises the first stabilized voltage power supply U1, the second stabilized voltage power supply U2, the 3rd phase-locked loop frequency synthesizer U3, the 4th voltage controlled oscillator U4, the 5th power divider U5, input end of clock J1, microwave output J2, it is characterized in that: the 3rd phase-locked loop frequency synthesizer links to each other with the 6th quadravalence passive ring filter, and (quadravalence passive ring filter is by resistance, electric capacity constitutes, its concrete connected mode is referring to Fig. 1 dotted portion, the 9th electric capacity respectively with the tenth electric capacity, the 11 resistance links to each other, the 9th electric capacity other end ground connection, the tenth electric capacity other end links to each other with the tenth resistance, the tenth resistance other end ground connection, the 11 resistance other end respectively with the 11 electric capacity, the 12 resistance links to each other, the 11 electric capacity other end ground connection, the 12 resistance other end respectively with the 12 electric capacity, the 13 electric capacity links to each other, the 12 electric capacity, the other end of the 13 electric capacity is ground connection respectively), the 6th quadravalence passive ring filter links to each other with the 4th voltage controlled oscillator, the 3rd phase-locked loop frequency synthesizer is ground connection respectively, the 3rd phase-locked loop frequency synthesizer links to each other with the 8th electric capacity with the 9th resistance respectively, the 8th electric capacity other end links to each other with the 5th power divider, the 3rd phase-locked loop frequency synthesizer links to each other with the 6th electric capacity, the 3rd phase-locked loop frequency synthesizer respectively with the 4th resistance, the 5th resistance, the 6th resistance, the 7th resistance links to each other, the 3rd phase-locked loop frequency synthesizer links to each other with the 5th electric capacity, the 3rd resistance two ends link to each other with the 3rd phase-locked loop frequency synthesizer respectively, the 3rd phase-locked loop frequency synthesizer links to each other with the 7th electric capacity, the 7th electric capacity other end links to each other with the 8th resistance, the 3rd phase-locked loop frequency synthesizer links to each other with first electric capacity with second resistance respectively, the 3rd phase-locked loop frequency synthesizer links to each other with second electric capacity, the second electric capacity other end links to each other with input end of clock with first resistance respectively, the 4th voltage controlled oscillator ground connection, the 4th voltage controlled oscillator and the 14 electric capacity, the 15 electric capacity, the 16 electric capacity links to each other, the 4th voltage controlled oscillator links to each other with the 17 electric capacity, the 17 electric capacity other end links to each other with the 5th power divider, the 5th power divider links to each other with the microwave output, the 5th power divider ground connection.
Described the 3rd phase-locked loop frequency synthesizer links to each other with second electric capacity, the second electric capacity other end links to each other with input end of clock with first resistance respectively, the 3rd phase-locked loop frequency synthesizer links to each other with the 6th quadravalence passive ring filter, the 6th quadravalence passive ring filter links to each other and links to each other with the 4th voltage controlled oscillator, the 3rd phase-locked loop frequency synthesizer links to each other with the 8th electric capacity with the 9th resistance respectively, the 8th electric capacity other end links to each other with the 5th power divider, the 4th voltage controlled oscillator links to each other with the 17 electric capacity, and the 17 electric capacity other end links to each other with the 5th power divider.
Operation principle: core of the present invention is to have adopted phase-locked loop frequency synthesizer U3(LMX2487), utilize the characteristics of its fractional frequency division, can obtain high-resolution microwave signal, key is that the CPOUTRF end (being 1 pin of U3 among Fig. 1) of LMX2487 among Fig. 1 passes through resistance, the quadravalence passive ring filter U6 that electric capacity constitutes is connected to voltage controlled oscillator U4(V844ME07) VT end (being 6 pin of U4 among Fig. 1), the RF of V844ME07 end (being 12 pin of U4 among Fig. 1) is connected to power divider U5(SP-2W by electric capacity) SUM end (being 5 pin of U5 among Fig. 1), the P2 end (being 3 pin of U5 among Fig. 1) of SP-2W passes through resistance, electric capacity is connected to the FINRF end (being 4 pin of U3 among Fig. 1) of LMX2487, forms a feedback control loop.Configured port PLL_CONFIG2, SDIO, SCLK and PLL_CONFIG1 link to each other with LE end (being 6 pin of U3 among Fig. 1), DATA end (being 7 pin of U3 among Fig. 1), CLK end (being 8 pin of U3 among Fig. 1) and the FTEST/LD end (being 12 pin of U3 among Fig. 1) of LMX2487 by resistance respectively.
After circuit is connected, the outside is configured the LMX2487 internal register by configured port, the microwave signal that V844ME07 produces is divided into two-way through SP-2W, one the tunnel is the microwave output, the other end is input to LMX2487, behind the inside of LMX2487 decimal frequency divider (being F functional block among Fig. 2) frequency division, send into the phase discriminator (being PD functional block among Fig. 2) of delta-sigma structure, the reference signal of input end of clock is sent into phase discriminator through the inside of LMX2487 integer frequency divider (being R functional block among Fig. 2) frequency division, phase discriminator is the phase difference between this two paths of signals relatively, this phase difference changes into Control current through charge pump (being CP functional block among Fig. 2), produces the control voltage of the VT end of control V844ME07 again through quadravalence passive ring filter.When the two paths of signals frequency of sending into phase discriminator not simultaneously, owing to have intrinsic difference on the frequency between two signals, phase difference between them certainly will change always, the result controls voltage and just changes within the specific limits, under the control of this control voltage, the output frequency of V844ME07 is also changing, if to send into the signal frequency of phase discriminator identical with another road behind the decimal frequency divider frequency division for the output frequency of V844ME07, at this moment the frequency difference between the two paths of signals is zero, phase difference changes no longer in time, be a fixed value, whole phase-locked loop enters lock-out state, and the microwave signal frequency of V844ME07 output no longer changes.
Compare with the direct-type frequency synthesizer system that was applicable to the CPT atomic frequency standard in the past, this frequency synthesizer system circuit structure is simple, only form by LMX2487, SP-2W, V844ME07 and peripheral circuit thereof, the number of components and parts significantly reduces, if it is arranged on the circuit board, the area of circuit board reduces 2/3 at least, is specially adapted to the product miniaturization.Compare with hybrid frequency synthesizer system, owing to lacked the consumption to energy of direct-type frequency synthesizer system part and filtering, amplifier section, the power consumption of circuit will reduce greatly.
Description of drawings
Fig. 1 is a kind of frequency synthesizer system circuit theory diagrams based on the CPT atomic frequency standard.
Fig. 2 is the frequency synthesizer system functional block diagram that a kind of phase-locked loop frequency synthesizer, loop filter, voltage controlled oscillator and power divider are formed.
Embodiment
Be described further below in conjunction with the course of work of accompanying drawing frequency synthesizer system circuit of the present invention:
1 as can be known with reference to the accompanying drawings, the first stabilized voltage power supply U1(model DH1718E-4 two-way is followed the tracks of current regulator power supply, also the power supply chip of available energy output 3.3V is a circuit supply) respectively with the 3rd phase-locked loop frequency synthesizer U3(model LMX2487) 3,9,11,14,17,22,24 pin, the 3rd capacitor C 3, the 4th capacitor C 4, the 3rd resistance R 3 links to each other, the operating voltage of the 3rd phase-locked loop frequency synthesizer U3 is provided, the 3rd capacitor C 3, the 4th capacitor C 4 is the filter capacitor of the first stabilized voltage power supply U1, the appearance value is respectively 10 μ F, 0.1 μ F, the work Enable Pin of the other end of the 3rd resistance R 3 and the 3rd phase-locked loop frequency synthesizer U3 just the 10th pin links to each other, to provide a high level to make the 3rd phase-locked loop frequency synthesizer U3 be in operating state, the 5th capacitor C 5 is a filter capacitor, link to each other with the 3rd resistance R 3, the appearance value is 100pF, input end of clock J1 respectively with first resistance R 1, capacitor C 2 links to each other, first resistance R, 1 resistance is 51 Ω, play matched load, second capacitor C, 2 appearance values are 1nF, play coupling, the other end of second capacitor C 2 is connected to 20 pin of the 3rd phase-locked loop frequency synthesizer U3,19 pin of the 3rd phase-locked loop frequency synthesizer U3 respectively with second resistance R 2, first capacitor C 1 links to each other, second resistance R, 2 resistances are 1k Ω, first capacitor C, 1 appearance value is 100pF, configured port PLL_CONFIG2, SDIO, SCLK, PLL_CONFIG1 is respectively by the 4th resistance R 4, the 5th resistance R 5, the 6th resistance R 6,6 of the 7th resistance R 7 and the 3rd phase-locked loop frequency synthesizer U3,7,8,12 pin link to each other, be used to dispose the internal register of the 3rd phase-locked loop frequency synthesizer U3, the tenth resistance R 10, the 11 resistance R 11, the 12 resistance R 12 and the 9th capacitor C 9, the tenth capacitor C 10, the 11 capacitor C 11, the 12 capacitor C 12, the 13 capacitor C 13 is formed optional passive and active two kinds of one the 6th quadravalence passive ring filter U6(loop filter, if select the passive ring filter, fractional frequency-division phase-locked loop LMX2487 for the delta-sigma structure, employing quadravalence passive ring filter is more suitable), the tenth resistance R 10, the 11 resistance R 11, the 12 resistance R 12 resistances are respectively 680 Ω, 560 Ω, 3k Ω, the 9th capacitor C 9, the tenth capacitor C 10, the 11 capacitor C 11, the 12 capacitor C 12 appearance values are respectively 1.6nF, 47nF, 980pF, 300pF, loop filter filters out the Control current medium-high frequency composition of the 1 pin output of the 3rd phase-locked loop frequency synthesizer U3, and with Control current change into control voltage input to the 4th voltage controlled oscillator U4(model V844ME07) 6 pin, the second stabilized voltage power supply U2(model DH1718E-4 two-way is followed the tracks of current regulator power supply, also the power supply chip of available energy output 5V is a circuit supply) respectively with 2 pin of the 4th voltage controlled oscillator U4, the 14 capacitor C 14, the 15 capacitor C 15, the 16 capacitor C 16 links to each other, operating voltage the 14 capacitor C 14 of the 4th voltage controlled oscillator U4 is provided, the 15 capacitor C 15, the 16 capacitor C 16 is the filter capacitor of the second stabilized voltage power supply U2, the appearance value is respectively 10 μ F, 0.1 μ F, 10pF, the 4th voltage controlled oscillator U4 links to each other with the 17 capacitor C 17, the 17 capacitor C 17 appearance values are 100pF, play coupling, the other end of the 17 capacitor C 17 and power divider U5(model SP-2W) 5 pin link to each other, 1 pin of the 5th power divider U5 links to each other with microwave output J2,2 pin of the 5th power divider U5 link to each other with the 8th capacitor C 8, the 8th capacitor C 8 appearance values are 100pF, play coupling, the other end of the 8th capacitor C 8 respectively with the 9th resistance R 9,4 pin of the 3rd phase-locked loop frequency synthesizer U3 link to each other, the resistance of the 9th resistance R 9 is 51 Ω, be used for matched load, 5 pin of the 3rd phase-locked loop frequency synthesizer U3 link to each other with bypass the 6th capacitor C 6, the appearance value of the 6th capacitor C 6 is 100pF, 13 pin of the 3rd phase-locked loop frequency synthesizer U3 link to each other with the 7th capacitor C 7, the other end of the 7th capacitor C 7 links to each other with the 8th resistance R 8, play coupling, the 7th capacitor C 7 appearance values are 100pF, the 8th resistance R 8 resistances are 51 Ω, be used for impedance matching, 16 of the 3rd phase-locked loop frequency synthesizer U3,18,21,23 pin are unsettled, 2 of the 3rd phase-locked loop frequency synthesizer U3,15,25 pin ground connection.
2 as can be known with reference to the accompanying drawings, the 3rd phase-locked loop frequency synthesizer U3 it by the R functional block, the PD functional block, the F functional block, CP functional block (these 4 functional units that functional block is LMX2487 inside, the R functional block has the integral frequency divisioil function, the PD functional block has phase discrimination function, the F functional block has the fractional frequency division function, the CP functional block has dashes, the function of discharge stream, available on the market device with these 4 functional block functions, for example, the SN74LS294 of TI company has the integral frequency divisioil function, the CD74HC4046A of TI company has phase discrimination function, the ADF4156 of AD company has the fractional frequency division function, the TPS60401 of TI company has and dashes, the function of discharge stream) forms, the PD functional block respectively with the R functional block, the CP functional block links to each other, the F functional block respectively with the PD functional block, the 5th power divider U5 links to each other, the 3rd phase-locked loop frequency synthesizer U3 inside has the R functional block to realize integral frequency divisioil, the PD functional block realizes phase discrimination function, the F functional block realizes that fractional frequency division and CP functional block realize the input and output of electric current, the R functional block of input end of clock and the 3rd phase-locked loop frequency synthesizer U3, the R functional block links to each other with the PD functional block, the CP functional block links to each other with the 6th quadravalence passive ring filter U6, the 6th quadravalence passive ring filter U6 links to each other and links to each other with the 4th voltage controlled oscillator U4, the 4th voltage controlled oscillator U4 links to each other with the 5th power divider U5, the 5th power divider U5 links to each other with the microwave output, the 5th power divider U5 links to each other with the F functional block of the 3rd phase-locked loop frequency synthesizer U3, the F functional block links to each other with the PD functional block, makes the 3rd phase-locked loop frequency synthesizer U3, the 6th quadravalence passive ring filter U6, the 4th voltage controlled oscillator U4 and the 5th power divider U5 form a phase feedback loop.
Now being that (LMX2487 requires between 5～110MHz the input end of clock incoming frequency example based near the microwave signal required 3417MHz of CPT atomic frequency standard, getting this incoming frequency in this example is 10MHz, it is made an uproar mutually: the 1Hz place is-93.6dBc, the 10Hz place is-124.2dBc, the 100Hz place is-145dBc)
Under 25 ℃ of the ambient temperatures, at first stabilized voltage power supply U1(DH1718E-4 two-way is followed the tracks of current regulator power supply) output voltage be set in 3.3V, second stabilized voltage power supply U2(DH1718E-4 two-way tracking current regulator power supply) output voltage is set in 5V, after powering on, the outside is configured by the internal register of configured port to LMX2487, voltage-controlled quartz oscillator is 10MHz by the input end of clock incoming frequency, the clock signal that duty ratio is fixed is in LMX2487, this clock signal is sent in the phase discriminator (being PD functional block among Fig. 2) behind the inside of LMX2487 integer frequency divider (being R functional block among Fig. 2) frequency division, the frequency of oscillation of V844ME07 is divided into two-way with microwave signal frequently through SP-2W, one the tunnel exports as microwave, another road is sent in the phase discriminator behind the inside of LMX2487 decimal frequency divider (being F functional block among Fig. 2) frequency division, phase discriminator changes into Control current with the phase difference of two paths of signals through charge pump (being CP functional block among Fig. 2), loop filter changes into Control current the voltage controling end of sending into V844ME07 behind control voltage and its medium-high frequency composition of filtering again, the output frequency of V844ME07 will definitely change, phase difference up to the two paths of signals of sending into phase discriminator is fixed, whole loop reaches lock-out state, the output frequency of V844ME07 no longer changes, the Frequency Dividing Factor R of the inside integer frequency divider of LMX2487 and the Frequency Dividing Factor F of decimal frequency divider are determined by the configuration of register, the span of configuration R=4(R is between 1～63, this example is got R=4), F ≈ 1366.8 can obtain near the microwave signal of required 3417MHz, simultaneously, the Frequency Dividing Factor F of decimal frequency divider has sufficiently high precision, can export and satisfy the high-resolution microwave signal of using.Change the value of F, can realize FSK(frequency shift keying, a kind of frequency modulating method the microwave output frequency) modulation and little step scan.
Adopt the frequency synthesizer system of this invention, its power output can satisfy application requirements, make an uproar mutually: the 1Hz place is-40dBc, the 10Hz place is-70dBc, remains unchanged substantially in 100Hz～10kHz scope, for-80dBc, spuious less than-60dBc, board area 3.5cm * 3.5cm, power consumption can be applicable to the CPT atomic frequency standard of miniaturization and low-power consumption less than 120mW.
Claims (4)
1. frequency synthesizer system based on the CPT atomic frequency standard, it comprises first stabilized voltage power supply (U1), second stabilized voltage power supply (U2), the 3rd phase-locked loop frequency synthesizer (U3), the 4th voltage controlled oscillator (U4), the 5th power divider (U5), the 6th quadravalence passive ring filter (U6), input end of clock (J1), microwave output (J2), it is characterized in that: the 3rd phase-locked loop frequency synthesizer (U3) links to each other with the 6th quadravalence passive ring filter (U6), the 6th quadravalence passive ring filter (U6) links to each other with the 4th voltage controlled oscillator (U4), the 3rd phase-locked loop frequency synthesizer (U3) is ground connection respectively, the 3rd phase-locked loop frequency synthesizer (U3) links to each other with the 8th electric capacity (C8) with the 9th resistance (R9) respectively, the 8th electric capacity (C8) other end links to each other with the 5th power divider (U5), the 3rd phase-locked loop frequency synthesizer (U3) links to each other with the 6th electric capacity (C6), the 3rd phase-locked loop frequency synthesizer (U3) respectively with the 4th resistance (R4), the 5th resistance (R5), the 6th resistance (R6), the 7th resistance (R7) links to each other, the 3rd phase-locked loop frequency synthesizer (U3) links to each other with the 5th electric capacity (C5), the 3rd resistance (R3) two ends link to each other with the 3rd phase-locked loop frequency synthesizer (U3) respectively, the 3rd phase-locked loop frequency synthesizer (U3) links to each other with the 7th electric capacity (C7), the 7th electric capacity (C7) other end links to each other with the 8th resistance (R8), the 3rd phase-locked loop frequency synthesizer (U3) links to each other with first electric capacity (C1) with second resistance (R2) respectively, the 3rd phase-locked loop frequency synthesizer (U3) links to each other with second electric capacity (C2), second electric capacity (C2) other end links to each other with input end of clock (J1) with first resistance (R1) respectively, the 4th voltage controlled oscillator (U4) ground connection, the 4th voltage controlled oscillator (U4) and the 14 electric capacity (C14), the 15 electric capacity (C15), the 16 electric capacity (C16) links to each other, the 4th voltage controlled oscillator (U4) links to each other with the 17 electric capacity (C17), the 17 electric capacity (C17) other end links to each other with the 5th power divider (U5), the 5th power divider (U5) links to each other with microwave output (J2), the 5th power divider (U5) ground connection.
2. a kind of frequency synthesizer system according to claim 1 based on the CPT atomic frequency standard, it is characterized in that: described the 3rd phase-locked loop frequency synthesizer (U3) links to each other with second electric capacity (C2), second electric capacity (C2) other end links to each other with input end of clock (J1) with first resistance (R1) respectively, the 3rd phase-locked loop frequency synthesizer (U3) links to each other with the 6th quadravalence passive ring filter (U6), the 6th quadravalence passive ring filter (U6) links to each other with the 4th voltage controlled oscillator (U4), the 3rd phase-locked loop frequency synthesizer (U3) links to each other with the 8th electric capacity (C8) with the 9th resistance (R9) respectively, the 8th electric capacity (C8) other end links to each other with the 5th power divider (U5), the 4th voltage controlled oscillator (U4) links to each other with the 17 electric capacity (C17), and the 17 electric capacity (C17) other end links to each other with the 5th power divider (U5).
3. a kind of frequency synthesizer system according to claim 1 based on the CPT atomic frequency standard, it is characterized in that: described the 3rd phase-locked loop frequency synthesizer (U3) it by the R functional block, the PD functional block, the F functional block, the CP functional block is formed, the PD functional block respectively with the R functional block, the CP functional block links to each other, the F functional block respectively with the PD functional block, the 5th power divider (U5) links to each other, the CP functional block links to each other with the 6th quadravalence passive ring filter (U6), the 6th quadravalence passive ring filter (U6) links to each other with the 4th voltage controlled oscillator (U4), the 4th voltage controlled oscillator (U4) links to each other with the 5th power divider (U5), and the 5th power divider (U5) links to each other with the microwave output.
4. a kind of frequency synthesizer system based on the CPT atomic frequency standard according to claim 1 is characterized in that: described the 5th power divider (U5) links to each other with the F functional block of the 3rd phase-locked loop frequency synthesizer (U3), and the F functional block links to each other with the PD functional block.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105024694A (en) * | 2015-05-13 | 2015-11-04 | 中国电子科技集团公司第四十一研究所 | Single-loop broadband phase-locked loop |
| CN105915215A (en) * | 2016-01-25 | 2016-08-31 | 江汉大学 | Frequency phase-locked loop PLL generation apparatus |
| CN105262485B (en) * | 2015-11-13 | 2018-05-04 | 成都前锋电子仪器有限责任公司 | A kind of wideband generative circuit for radio general measuring instrument RF local oscillator circuit |
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|---|---|---|---|---|
| US20040202050A1 (en) * | 2003-04-11 | 2004-10-14 | William Happer | Method and system for operating an atomic clock with simultaneous locking of field and frequency |
| US6806784B2 (en) * | 2001-07-09 | 2004-10-19 | The National Institute Of Standards And Technology | Miniature frequency standard based on all-optical excitation and a micro-machined containment vessel |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6806784B2 (en) * | 2001-07-09 | 2004-10-19 | The National Institute Of Standards And Technology | Miniature frequency standard based on all-optical excitation and a micro-machined containment vessel |
| US20040202050A1 (en) * | 2003-04-11 | 2004-10-14 | William Happer | Method and system for operating an atomic clock with simultaneous locking of field and frequency |
Non-Patent Citations (1)
| Title |
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| 《中国科学院上海天文台年刊 》 20071231 邱实;张军海 从CPT原子钟到光钟 , 第28期 2 * |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105024694A (en) * | 2015-05-13 | 2015-11-04 | 中国电子科技集团公司第四十一研究所 | Single-loop broadband phase-locked loop |
| CN105262485B (en) * | 2015-11-13 | 2018-05-04 | 成都前锋电子仪器有限责任公司 | A kind of wideband generative circuit for radio general measuring instrument RF local oscillator circuit |
| CN105915215A (en) * | 2016-01-25 | 2016-08-31 | 江汉大学 | Frequency phase-locked loop PLL generation apparatus |
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