CN102045073A - Method and device for decoding broadcast channel (BCH) code - Google Patents

Abstract

The embodiment of the invention provides a method and device for decoding a broadcast channel (BCH) code. The method comprises the steps: computing a syndrome according to a receiving code; solving the polynomial of an error position according to the syndrome by an iterative algorithm; confirming the error position according to the polynomial of the error position by a money type search algorithm; and correcting an error value on the confirmed error position to obtain a recovering code. The method and device for decoding the BCH code of the embodiment can optimize a parallel bench mark (BM) iterative algorithm on the resource and the speed by improving the riBM algorithm.

Description

A kind of BCH code interpretation method and device

Technical field

The present invention relates to communication technical field, relate in particular to a kind of BCH code interpretation method and device.

Background technology

At present, NAND (with non-) flash memory has very remarkable advantages in power consumption, speed, data reliability, weight and aspect such as quiet, along with the light and thin notebook computer at whole PC (PersonalComputer, personal computer) market share continues to increase, these advantages of NAND become more attractive, solid state memory disc (SSD, Solid State Disk) based on nand flash memory is progressively entering into these application.

Nand flash memory can be divided into two big framework: single layer cell SLC (Single Level Cell) and multilevel-cell MLC (Multi Level Cell), MLC is because cost is low, capacity is big, but its service behaviour is stable not as SLC, according to statistics, adopting the error rate of MLC nand flash memory (MLC NAND Flash Memory) access data probably is 10 ^-5,, need to adopt error correcting code ECC (Error Correction Code) technology that many bits (bit) random error is entangled in its realization for guaranteeing the accuracy of reading of data.

At the realization of BCH coding and decoding, decoding is difficult point, commonly used having in all decoding algorithms: Peterson algorithm, Berlekamp-Massey iterative algorithm (being called for short the BM method), Euclid (Euclid) algorithm.Wherein, the Peterson algorithm is suitable for the less decoding of error correction number, and its amount of calculation is maximum in above-mentioned three kinds of algorithms; BM algorithm and Euclid algorithm are applicable to the decoder that the error correction number is bigger, and the Euclid algorithm is understood easily than BM iterative algorithm, but operand is bigger, and than the hardware configuration complexity of BM iterative algorithm.Consider the particularity of binary system BCH code in addition, so in design, adopt the fast and the most frequently used BM iterative algorithm of decoding speed.

The inventor finds in realizing process of the present invention, in the BM iterative algorithm, comprise iBM commonly used (Inversionless Berlecamp-Massey) algorithm and riBM (Reformulation inversionlessBerlecamp-Massey) algorithm, wherein, the riBM algorithm is to the derivation of iBM algorithm and improvement, its critical path shortens to original half, improved the VLSI design performance greatly, but, the riBM algorithm is the parallel BM iterative algorithm that is applicable to the FPGA design that proposes at RS (Reed Solomon) sign indicating number, because the RS sign indicating number is the special case of BCH code, its decode procedure is than BCH code complexity, therefore, if with the riBM algorithm application in the decode procedure of general BCH code, will cause the significant wastage of resource.

Summary of the invention

The embodiment of the invention provides a kind of BCH code interpretation method and device, can realize BCH code decoding taking less FPGA resource and guaranteeing under the prerequisite at a high speed.

The above-mentioned purpose of the embodiment of the invention is achieved by the following technical solution:

A kind of BCH code interpretation method, described method comprises: calculate syndrome according to receiving code; Utilize iterative algorithm according to described syndrome mistake in computation position multinomial; Utilize money formula searching algorithm to determine errors present according to described error location polynomial; Improper value on the described definite errors present is carried out the error correction sign indicating number that is restored.Wherein, utilize iterative algorithm to comprise according to described syndrome mistake in computation position multinomial: it is zero at the initial value of Auxiliary polynomial under the zero degree iteration of initial value under the zero degree iteration and described error location polynomial that error location polynomial is set; The improper value multinomial is set, and the initial value under the zero degree iteration is the coefficient of described syndrome at initial value under the zero degree iteration and the polynomial Auxiliary polynomial of described improper value; It is 1 at the initial value of Auxiliary polynomial under zero degree iteration zero degree power of initial value under the zero degree iteration zero degree power and described error location polynomial that error location polynomial is set; It is 0 that the initial value of iteration coefficient under the zero degree iteration is set; It is 1 that the initial value of iteration restrictive condition under the zero degree iteration is set; The Auxiliary polynomial, iteration coefficient and the iteration restrictive condition that are worth polynomial Auxiliary polynomial, error location polynomial according to the initial value mistake in computation of above-mentioned setting; According to the initial value of above-mentioned setting and according to the polynomial Auxiliary polynomial of improper value of aforementioned calculation acquisition, Auxiliary polynomial, iteration coefficient and the iteration restrictive condition of error location polynomial, mistake in computation value multinomial; Auxiliary polynomial, iteration coefficient and iteration restrictive condition mistake in computation position multinomial according to the initial value of above-mentioned setting and the mistake in computation value multinomial that obtains according to aforementioned calculation, the polynomial Auxiliary polynomial of improper value, error location polynomial obtain error location polynomial.

A kind of BCH code code translator, described device comprises: first computing unit is used for calculating syndrome according to receiving code; Second computing unit is used to utilize iterative algorithm according to described syndrome mistake in computation position multinomial; Determining unit is used to utilize money formula searching algorithm to determine errors present according to described error location polynomial; Error correction unit, the improper value on the errors present that is used for described determining unit is determined are carried out the error correction sign indicating number that is restored.Wherein, second computing unit comprises: module is set, and being used to be provided with error location polynomial is zero at the initial value of Auxiliary polynomial under the zero degree iteration of initial value under the zero degree iteration and described error location polynomial; The improper value multinomial is set, and the initial value under the zero degree iteration is the coefficient of described syndrome at initial value under the zero degree iteration and the polynomial Auxiliary polynomial of described improper value; It is 1 at the initial value of Auxiliary polynomial under zero degree iteration zero degree power of initial value under the zero degree iteration zero degree power and described error location polynomial that error location polynomial is set; It is 0 that the initial value of iteration coefficient under the zero degree iteration is set; It is 1 that the initial value of iteration restrictive condition under the zero degree iteration is set; Control module is used for being worth according to the initial value mistake in computation that the module setting is set Auxiliary polynomial, iteration coefficient and the iteration restrictive condition of polynomial Auxiliary polynomial, error location polynomial; First computing module is used for according to the initial value that the module setting is set and the result of calculation mistake in computation value multinomial of control module; Second computing module is used for obtaining error location polynomial according to the initial value that the module setting is set and the result of calculation mistake in computation position multinomial of the control module and first computing module.

The BCH code interpretation method and the device of the embodiment of the invention according to the characteristics of BCH binary system code system, have carried out 2 optimizations to the riBM interpretation method, and promptly when iteration time r was odd number time, difference λ (r) perseverance was 0, therefore, 2t iteration of iteration can be reduced to t time; And need error correction in the decoding of RS sign indicating number, and for the binary system BCH code, its correction value must be 1, so improper value multinomial ω (r) can be simplified with improper value multinomial ω (r).So, the embodiment of the invention is taking less FPGA resource and is guaranteeing under the situation of realization of High Speed, realized the difficult point in the BCH interpretation method, promptly ask error location polynomial according to syndrome, and, by improvement, make parallel BM iterative algorithm on resource and speed, all obtain optimization to the riBM algorithm.

Description of drawings

Accompanying drawing described herein is used to provide further understanding of the present invention, constitutes the application's a part, does not constitute limitation of the invention.In the accompanying drawings:

Fig. 1 is the BCH code interpretation method flow chart of the embodiment of the invention;

Fig. 2 is the flow chart of step 102 embodiment illustrated in fig. 1;

Fig. 3 is the composition schematic diagram of embodiment of the invention BCH code code translator;

Fig. 4 is that the circuit of first computing module of the embodiment of the invention is formed schematic diagram;

Fig. 5 is the rough schematic view of first computing module shown in Figure 4;

Fig. 6 is that the circuit of a plurality of first computing modules of the embodiment of the invention is formed schematic diagram;

Fig. 7 is that the circuit of the control module of the embodiment of the invention is formed schematic diagram;

Fig. 8 is that the circuit of second computing module of the embodiment of the invention is formed schematic diagram;

Fig. 9 is the rough schematic view of second computing module shown in Figure 6;

Figure 10 is that the circuit of a plurality of second computing modules of the embodiment of the invention is formed schematic diagram;

Figure 11 is that the circuit of second computing unit of the embodiment of the invention is formed schematic diagram.

Embodiment

For the purpose, technical scheme and the advantage that make the embodiment of the invention is clearer,, the embodiment of the invention is described in further details below in conjunction with embodiment and accompanying drawing.At this, illustrative examples of the present invention and explanation thereof are used to explain the present invention, but not as a limitation of the invention.

A kind of BCH code interpretation method flow chart that Fig. 1 provides for the embodiment of the invention, in the present embodiment, error location polynomial is expressed as

The Auxiliary polynomial of error location polynomial is expressed as

The improper value polynomial table is shown

The polynomial Auxiliary polynomial of improper value is expressed as

Wherein,

Be error location polynomial Λ in the r time iteration (r, z) in z ⁱCoefficient; R is an iterations; I is the power item to dependent variable z; δ _i(r) be improper value multinomial Δ in the r time iteration (r, z) in z ⁱCoefficient; b _iWhen (r) being the r time iteration, the Auxiliary polynomial B of error location polynomial (r, z) middle z ⁱCoefficient; θ _iWhen (r) being the r time iteration, the polynomial Auxiliary polynomial Θ of improper value (r, z) middle z ⁱCoefficient; γ (r) when converting no algorithm for inversion to, the iteration coefficient that multiply by; K (r) is for trying to achieve the restrictive condition of unique solution for assurance in the iteration.Please refer to Fig. 1, this method comprises:

101: calculate syndrome according to receiving code;

Wherein, receiving code is meant the process coded data that receives, and in the present embodiment, needs to adopt the method for present embodiment that these data are deciphered.In the present embodiment, in order to narrate conveniently, receiving code is expressed as R (z), syndrome is expressed as S (z), and the coefficient table of syndrome is shown S _i

102: utilize iterative algorithm according to described syndrome mistake in computation position multinomial, please refer to Fig. 2, specifically comprise:

201: it is zero at the initial value of Auxiliary polynomial under the zero degree iteration of initial value under the zero degree iteration and described error location polynomial that error location polynomial is set; The improper value multinomial is set, and the initial value under the zero degree iteration is the coefficient of described syndrome at initial value under the zero degree iteration and the polynomial Auxiliary polynomial of described improper value; It is 1 at the initial value of Auxiliary polynomial under zero degree iteration zero degree power of initial value under the zero degree iteration zero degree power and described error location polynomial that error location polynomial is set; It is 0 that the initial value of iteration coefficient under the zero degree iteration is set; It is 1 that the initial value of iteration restrictive condition under the zero degree iteration is set;

Wherein, error location polynomial is zero can be expressed as λ at the initial value of Auxiliary polynomial under the zero degree iteration of initial value under the zero degree iteration and described error location polynomial _i(0)=b _i(0)=0 wherein, i=1,2 ... t.

Wherein, the initial value under the zero degree iteration is the coefficient of described syndrome to the improper value multinomial at initial value under the zero degree iteration and the polynomial Auxiliary polynomial of described improper value, can be expressed as

Wherein, S _iBe the coefficient of described syndrome, i=0,1 ..., 2t-1.

Wherein, error location polynomial is 1 at the initial value of Auxiliary polynomial under zero degree iteration zero degree power of initial value under the zero degree iteration zero degree power and described error location polynomial, can be expressed as λ ₀(0)=b ₀(0)=1.

Wherein, the initial value of iteration coefficient under the zero degree iteration is 0, can be expressed as k (0)=0.

Wherein, the initial value of iteration restrictive condition under the zero degree iteration is 1, can be expressed as γ (0)=1.

202: the Auxiliary polynomial, iteration coefficient and the iteration restrictive condition that are worth polynomial Auxiliary polynomial, error location polynomial according to the initial value mistake in computation of above-mentioned setting;

Wherein, if δ ₀(r) ≠ 0 and k (r) 〉=0, then:

Otherwise, Wherein, r is an iterations, and i is the power item.

203: according to the initial value of above-mentioned setting and according to the polynomial Auxiliary polynomial of improper value of aforementioned calculation acquisition, Auxiliary polynomial, iteration coefficient and the iteration restrictive condition of error location polynomial, mistake in computation value multinomial;

Wherein, ${\widetilde{\mathrm{\δ}}}_i(r+1)=\mathrm{\γ}\left(r\right)\·\widetilde{{\mathrm{\δ}}_{i+2}}\left(r\right)-\widetilde{{\mathrm{\δ}}_0\left(r\right)}\·\widetilde{{\mathrm{\θ}}_{i+1}}\left(r\right),(i=\mathrm{0,1,2},......,2t-1).$

204: Auxiliary polynomial, iteration coefficient and iteration restrictive condition mistake in computation position multinomial according to the initial value of above-mentioned setting and the mistake in computation value multinomial that obtains according to aforementioned calculation, the polynomial Auxiliary polynomial of improper value, error location polynomial obtain error location polynomial.

Wherein, ${\widetilde{\mathrm{\λ}}}_i(r+1)=\left\{\begin{array}{c}\mathrm{\γ}\left(r\right)\·{\widetilde{\mathrm{\λ}}}_i\left(r\right)-{\widetilde{\mathrm{\δ}}}_0\left(r\right)\·{\tilde{b}}_{i-1}\left(r\right),(i=\mathrm{0,1},......,t),r=0\\ \mathrm{\γ}\left(r\right)\·{\widetilde{\mathrm{\λ}}}_i\left(r\right)-{\widetilde{\mathrm{\δ}}}_0\left(r\right)\·{\tilde{b}}_{i-2}\left(r\right),(i=\mathrm{0,1},......,t),r=\mathrm{1,2},......,t-1\end{array}\right..$

Wherein, the error location polynomial of acquisition can be expressed as

Wherein, i=0,1 ...., t.

103: utilize money formula searching algorithm to determine errors present according to described error location polynomial;

After calculating obtains error location polynomial according to abovementioned steps, can utilize money formula searching algorithm to determine errors present, not repeat them here by the means of prior art according to described error location polynomial.

104: the improper value on the described definite errors present is carried out the error correction sign indicating number that is restored.

After having determined errors present according to abovementioned steps, can utilize the means of prior art that the improper value on this errors present is carried out error correction, and then the sign indicating number that is restored, do not repeat them here.

The BCH code interpretation method of the embodiment of the invention according to the characteristics of BCH binary system code system, has been carried out 2 optimizations to the riBM interpretation method, and promptly when iteration time r was odd number time, difference λ (r) perseverance was 0, therefore, 2t iteration of iteration can be reduced to t time; And need error correction in the decoding of RS sign indicating number, and for the binary system BCH code, its correction value must be 1, so improper value multinomial ω (r) can be simplified with improper value multinomial ω (r).

Fig. 3 please refer to Fig. 3 for a kind of BCH code code translator composition frame chart that the embodiment of the invention provides, and this installs based on the riBM algorithm, mainly comprises: first computing unit 31, second computing unit 32, determining unit 33 and error correction unit 34, wherein:

First computing unit 31 is used for calculating syndrome according to receiving code.Specifically be described, do not repeat them here in step 101.

Second computing unit 32 is used to utilize iterative algorithm to find the solution error location polynomial according to described syndrome, in the present embodiment, this second computing unit 32 comprises: module 321, control module 322, first computing module 323 and second computing module 324 are set, wherein:

Module 321 is set, and to be used to be provided with error location polynomial be zero at the initial value of Auxiliary polynomial under the zero degree iteration of initial value under the zero degree iteration and described error location polynomial; The improper value multinomial is set, and the initial value under the zero degree iteration is the coefficient of described syndrome at initial value under the zero degree iteration and the polynomial Auxiliary polynomial of described improper value; It is 1 at the initial value of Auxiliary polynomial under zero degree iteration zero degree power of initial value under the zero degree iteration zero degree power and described error location polynomial that error location polynomial is set; It is 0 that the initial value of iteration coefficient under the zero degree iteration is set; It is 1 that the initial value of iteration restrictive condition under the zero degree iteration is set.Specifically in step 201, done detailed description, do not repeated them here.

Control module 322 is used for being worth according to the initial value mistake in computation that module 321 settings are set Auxiliary polynomial, iteration coefficient and the iteration restrictive condition of polynomial Auxiliary polynomial, error location polynomial.Specifically in step 202, done detailed description.In the present embodiment, this control module 322 can comprise:

Receive submodule, be used to receive the described initial value that the iteration restrictive condition of module 321 settings is set, and the polynomial coefficient of the improper value of zero degree power;

Judge submodule, be used for initial value according to polynomial coefficient of the improper value of described zero degree power and described iteration restrictive condition, whether the polynomial coefficient of improper value of judging described zero degree power is zero, and whether the initial value of described iteration restrictive condition more than or equal to zero, and produces the control command of next iteration and the iteration coefficient gamma (r+1) of next iteration in view of the above.Wherein, the control command of next iteration comprises: the coefficient of the Auxiliary polynomial of the error location polynomial of next iteration

The coefficient of the polynomial Auxiliary polynomial of improper value of next iteration

And the iteration restrictive condition k (r+1) of next iteration.Wherein, if δ ₀(r) ≠ 0 and k (r) 〉=0, then:

$\left\{\begin{array}{c}\widetilde{b_i}(r+1)={\widetilde{\mathrm{\λ}}}_i\left(r\right),(i=\mathrm{0,1},......,t)\\ {\widetilde{\mathrm{\θ}}}_i(r+1)=\widetilde{{\mathrm{\θ}}_{i+1}}\left(r\right),(i=\mathrm{0,1},......2t-1)\\ \mathrm{\γ}(r+1)={\widetilde{\mathrm{\δ}}}_0\left(r\right)\\ k(r+1)=-k\left(r\right)\end{array}\right.;$ Otherwise, $\left\{\begin{array}{c}{\tilde{b}}_i(r+1)=\widetilde{b_{i-1}}\left(r\right),(i=\mathrm{0,1},......,t)\\ {\widetilde{\mathrm{\θ}}}_i(r+1)={\widetilde{\mathrm{\θ}}}_i\left(r\right),(i=\mathrm{0,1},......2t-1)\\ \mathrm{\γ}(r+1)=\mathrm{\γ}\left(r\right)\\ k(r+1)=k\left(r\right)+1\end{array}\right.;$

Wherein, r is an iterations, and i is the power item.

In the present embodiment, this control module 322 can realize by control circuit shown in Figure 4, but present embodiment not with this as restriction, any control circuit that is used to realize aforementioned formula and method can be used for realizing the control module 322 of the embodiment of the invention.

First computing module 323 is used for according to the initial value that module 321 settings are set and the result of calculation mistake in computation value multinomial of control module 322.Specifically in step 203, done detailed description.In the present embodiment, this first computing module 323 can comprise 2t first calculating sub module, and each first calculating sub module is respectively according to formula:

Carry out the interative computation of the 0th 2t-1 power of power to the, wherein, each first calculating sub module comprises:

First multiplier is used for the iteration coefficient of the polynomial coefficient of the improper value of last power and this iteration is carried out multiplying;

First data selector is used for the control command according to control module, selects one from the coefficient of polynomial coefficient of the improper value of described last power and the polynomial Auxiliary polynomial of improper value;

First register, the output that is used to store described first data selector is as the input of the coefficient of the polynomial Auxiliary polynomial of improper value of described first data selector;

Second multiplier is used for the coefficient of polynomial coefficient of the improper value of zero degree power and the polynomial Auxiliary polynomial of described improper value is carried out multiplying;

First adder is used for the multiplication result of described first multiplier and the multiplication result of described second multiplier are carried out addition, obtains the polynomial coefficient of improper value;

Second register is used to store the polynomial coefficient of described improper value, and output.

In the present embodiment, first calculating sub module can be formed realization by circuit shown in Figure 5, can be by the PE1 of accompanying drawing shown in Figure 6 _iRepresent, and the 2t of present embodiment first calculating sub module can be passed through the PE1 of accompanying drawing shown in Figure 7 respectively ₀～PE1 _2t-1Represent.

Second computing module 324 is used for obtaining error location polynomial according to the initial value that the module setting is set and the result of calculation mistake in computation position multinomial of the control module and first computing module.Specifically be described in step 204, in the present embodiment, this second computing module 324 comprises t second calculating sub module, respectively according to formula:

Carry out the interative computation of the 0th t power of power to the, wherein, each second calculating sub module comprises:

The 3rd multiplier is used for the iteration coefficient of this iteration and the coefficient of error location polynomial are carried out multiplying;

The 4th multiplier, be used for to the polynomial coefficient of the improper value of zero degree power and next time the coefficient of the Auxiliary polynomial of the error location polynomial of power carry out multiplying;

Second data selector is used for the control command according to control module, from the coefficient of described error location polynomial and described before select one the coefficient of Auxiliary polynomial of error location polynomial of first power;

The 3rd register, the output that is used to store described second data selector is as the coefficient output of the Auxiliary polynomial of the error location polynomial of this power;

Second adder is used for the multiplication result of described the 3rd multiplier and the multiplication result of described the 4th multiplier are carried out addition;

The 4th register, the add operation result who is used to store described second adder, and as the output of the coefficient of error location polynomial.

In the present embodiment, first calculating sub module can be formed realization by circuit shown in Figure 5, can be by the PE1 of accompanying drawing shown in Figure 6 _iRepresent, and the 2t of present embodiment first calculating sub module can be passed through the PE1 of accompanying drawing shown in Figure 7 respectively ₀～PE1 _2t-1Represent.

In the present embodiment, second calculating sub module 123 can be formed by circuit shown in Figure 8 and realizes, can be by the PEO of accompanying drawing shown in Figure 9 _iRepresent, and the t of present embodiment second calculating sub module can be passed through the PE0 of accompanying drawing shown in Figure 10 respectively _t～PE0 ₀Represent.

Please refer to Figure 11 again, it is the circuit realization schematic diagram of second computing unit 32 of the embodiment of the invention, as shown in figure 11, this second computing unit 32 comprises module (figure do not show), 2t first calculating sub module 111, control module 112 and t second computing module 113 is set, concrete function does not repeat them here in above stated specification.

Determining unit 33 is used to utilize money formula searching algorithm to determine errors present according to the error location polynomial that second computing unit 32 calculates acquisition.

Wherein, this determining unit 33 can be finished by the means of prior art, does not repeat them here.

Improper value on the errors present that error correction unit 34 is used for determining unit 33 is determined carries out the error correction sign indicating number that is restored.

Wherein, this error correction unit 34 also can be finished by the means of prior art, does not repeat them here.

The BCH code code translator of the embodiment of the invention according to the characteristics of BCH binary system code system, has carried out 2 optimizations to the riBM interpretation method, and promptly when iteration time r was odd number time, difference λ (r) perseverance was 0, therefore, 2t iteration of iteration can be reduced to t time; And need error correction in the decoding of RS sign indicating number, and for the binary system BCH code, its correction value must be 1, so improper value multinomial ω (r) can be simplified with improper value multinomial ω (r).So, the embodiment of the invention is taking less FPGA resource and is guaranteeing under the situation of realization of High Speed, realized the difficult point in the BCH interpretation method, promptly ask error location polynomial according to syndrome, and, by improvement, make parallel BM iterative algorithm on resource and speed, all obtain optimization to the riBM algorithm.

Above-described specific embodiment; purpose of the present invention, technical scheme and beneficial effect are further described; institute is understood that; the above only is specific embodiments of the invention; and be not intended to limit the scope of the invention; within the spirit and principles in the present invention all, any modification of being made, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.

Claims (10)

1. a BCH code interpretation method is characterized in that, described method comprises:

Calculate syndrome according to receiving code;

Utilize iterative algorithm according to described syndrome mistake in computation position multinomial, comprising:

It is zero at the initial value of Auxiliary polynomial under the zero degree iteration of initial value under the zero degree iteration and described error location polynomial that error location polynomial is set; The improper value multinomial is set, and the initial value under the zero degree iteration is the coefficient of described syndrome at initial value under the zero degree iteration and the polynomial Auxiliary polynomial of described improper value; It is 1 at the initial value of Auxiliary polynomial under zero degree iteration zero degree power of initial value under the zero degree iteration zero degree power and described error location polynomial that error location polynomial is set; It is 0 that the initial value of iteration coefficient under the zero degree iteration is set; It is 1 that the initial value of iteration restrictive condition under the zero degree iteration is set;

The Auxiliary polynomial, iteration coefficient and the iteration restrictive condition that are worth polynomial Auxiliary polynomial, error location polynomial according to the initial value mistake in computation of above-mentioned setting;

According to the initial value of above-mentioned setting and according to the polynomial Auxiliary polynomial of improper value of aforementioned calculation acquisition, Auxiliary polynomial, iteration coefficient and the iteration restrictive condition of error location polynomial, mistake in computation value multinomial;

Auxiliary polynomial, iteration coefficient and iteration restrictive condition mistake in computation position multinomial according to the initial value of above-mentioned setting and the mistake in computation value multinomial that obtains according to aforementioned calculation, the polynomial Auxiliary polynomial of improper value, error location polynomial obtain error location polynomial;

Utilize money formula searching algorithm to determine errors present according to described error location polynomial;

Improper value on the described definite errors present is carried out the error correction sign indicating number that is restored.

2. method according to claim 1 is characterized in that:

Error location polynomial is that null representation is λ at the initial value of Auxiliary polynomial under the zero degree iteration of initial value under the zero degree iteration and described error location polynomial _i(0)=b _i(0)=0 wherein, i=1,2 ... t;

Initial value under the zero degree iteration is the coefficient of described syndrome to the improper value multinomial at initial value under the zero degree iteration and the polynomial Auxiliary polynomial of described improper value, and mathematical expression is expressed as Wherein, S _iBe the coefficient of described syndrome, i=0,1 ..., 2t-1;

Error location polynomial is 1 at the initial value of Auxiliary polynomial under zero degree iteration zero degree power of initial value under the zero degree iteration zero degree power and described error location polynomial, and mathematical expression is expressed as λ ₀(0)=b ₀(0)=1;

The initial value of iteration coefficient under the zero degree iteration is 0, and mathematical expression is expressed as k (0)=0;

The initial value of iteration restrictive condition under the zero degree iteration is 1, and mathematical expression is expressed as γ (0)=1.

3. method according to claim 2 is characterized in that, is worth Auxiliary polynomial, iteration coefficient and the iteration restrictive condition of polynomial Auxiliary polynomial, error location polynomial according to the initial value mistake in computation of above-mentioned setting, comprising:

The Auxiliary polynomial, iteration coefficient and the iteration restrictive condition that are worth polynomial Auxiliary polynomial, error location polynomial according to the initial value and the following formula mistake in computation of described setting:

If δ ₀(r) ≠ 0 and k (r) 〉=0, then:

Otherwise,

Wherein, r is an iterations, and i is the power item.

4. method according to claim 3, it is characterized in that, according to the initial value of above-mentioned setting and according to the polynomial Auxiliary polynomial of improper value of aforementioned calculation acquisition, Auxiliary polynomial, iteration coefficient and the iteration restrictive condition of error location polynomial, mistake in computation value multinomial comprises:

Utilize following formula, according to the initial value of above-mentioned setting and Auxiliary polynomial, iteration coefficient and the iteration restrictive condition that passes through the polynomial Auxiliary polynomial of aforementioned calculation acquisition improper value, error location polynomial, mistake in computation value multinomial;

${\widetilde{\mathrm{\δ}}}_i(r+1)=\mathrm{\γ}\left(r\right)\·\widetilde{{\mathrm{\δ}}_{i+2}}\left(r\right)-\widetilde{{\mathrm{\δ}}_0\left(r\right)}\·\widetilde{{\mathrm{\θ}}_{i+1}}\left(r\right),(i=\mathrm{0,1,2},......,2t-1).$

5. method according to claim 4, it is characterized in that, Auxiliary polynomial, iteration coefficient and iteration restrictive condition mistake in computation position multinomial according to the initial value of above-mentioned setting and the mistake in computation value multinomial that obtains according to aforementioned calculation, the polynomial Auxiliary polynomial of improper value, error location polynomial, obtain error location polynomial, comprising:

Utilize following formula, according to Auxiliary polynomial, iteration coefficient and the iteration restrictive condition mistake in computation position multinomial of the initial value of above-mentioned setting and the mistake in computation value multinomial that obtains through aforementioned calculation, the polynomial Auxiliary polynomial of improper value, error location polynomial:

Obtain error location polynomial, be expressed as

Wherein, i=0,1 ..., t.

6. a BCH code code translator is characterized in that, described device comprises:

First computing unit is used for calculating syndrome according to receiving code;

Second computing unit is used to utilize iterative algorithm according to described syndrome mistake in computation position multinomial, and this second computing unit comprises:

Module is set, and being used to be provided with error location polynomial is zero at the initial value of Auxiliary polynomial under the zero degree iteration of initial value under the zero degree iteration and described error location polynomial; The improper value multinomial is set, and the initial value under the zero degree iteration is the coefficient of described syndrome at initial value under the zero degree iteration and the polynomial Auxiliary polynomial of described improper value; It is 1 at the initial value of Auxiliary polynomial under zero degree iteration zero degree power of initial value under the zero degree iteration zero degree power and described error location polynomial that error location polynomial is set; It is 0 that the initial value of iteration coefficient under the zero degree iteration is set; It is 1 that the initial value of iteration restrictive condition under the zero degree iteration is set;

Control module is used for being worth according to the initial value mistake in computation that the module setting is set Auxiliary polynomial, iteration coefficient and the iteration restrictive condition of polynomial Auxiliary polynomial, error location polynomial;

First computing module is used for according to the initial value that the module setting is set and the result of calculation mistake in computation value multinomial of control module;

Second computing module is used for according to initial value that module is provided with and control module and the are set

The result of calculation mistake in computation position multinomial of one computing module obtains error location polynomial;

Determining unit is used to utilize money formula searching algorithm to determine errors present according to described error location polynomial;

Error correction unit, the improper value on the errors present that is used for described determining unit is determined are carried out the error correction sign indicating number that is restored.

7. device according to claim 6 is characterized in that, the described initial value that the module setting is set is specially:

Error location polynomial is that null representation is λ at the initial value of Auxiliary polynomial under the zero degree iteration of initial value under the zero degree iteration and described error location polynomial _i(0)=b _i(0)=0 wherein, i=1,2 ... t;

Initial value under the zero degree iteration is the coefficient of described syndrome to the improper value multinomial at initial value under the zero degree iteration and the polynomial Auxiliary polynomial of described improper value, and mathematical expression is expressed as

Wherein, S _iBe the coefficient of described syndrome, i=0,1 ..., 2t-1;

Error location polynomial is 1 at the initial value of Auxiliary polynomial under zero degree iteration zero degree power of initial value under the zero degree iteration zero degree power and described error location polynomial, and mathematical expression is expressed as λ ₀(0)=b ₀(0)=1;

The initial value of iteration coefficient under the zero degree iteration is 0, and mathematical expression is expressed as k (0)=0;

The initial value of iteration restrictive condition under the zero degree iteration is 1, and mathematical expression is expressed as γ (0)=1.

8. device according to claim 7 is characterized in that, described control module comprises:

Receive submodule, be used to receive the described initial value that the iteration restrictive condition of module setting is set, and the polynomial coefficient of the improper value of zero degree power;

Judge submodule, be used for initial value according to polynomial coefficient of the improper value of described zero degree power and described iteration restrictive condition, whether the polynomial coefficient of improper value of judging described zero degree power is zero, and whether the initial value of described iteration restrictive condition more than or equal to zero, and produces the control command of next iteration and the iteration coefficient gamma (r+1) of next iteration in view of the above;

Wherein, the control command of next iteration comprises: the coefficient of the Auxiliary polynomial of the error location polynomial of next iteration

The coefficient of the polynomial Auxiliary polynomial of improper value of next iteration And the iteration restrictive condition k (r+1) of next iteration;

Wherein, if δ ₀(r) ≠ 0 and k (r) 〉=0, then:

$\left\{\begin{array}{c}\widetilde{b_i}(r+1)={\widetilde{\mathrm{\λ}}}_i\left(r\right),(i=\mathrm{0,1},......,t)\\ {\widetilde{\mathrm{\θ}}}_i(r+1)=\widetilde{{\mathrm{\θ}}_{i+1}}\left(r\right),(i=\mathrm{0,1},......2t-1)\\ \mathrm{\γ}(r+1)={\widetilde{\mathrm{\δ}}}_0\left(r\right)\\ k(r+1)=-k\left(r\right)\end{array}\right.;$ Otherwise, $\left\{\begin{array}{c}{\tilde{b}}_i(r+1)=\widetilde{b_{i-1}}\left(r\right),(i=\mathrm{0,1},......,t)\\ {\widetilde{\mathrm{\θ}}}_i(r+1)={\widetilde{\mathrm{\θ}}}_i\left(r\right),(i=\mathrm{0,1},......2t-1)\\ \mathrm{\γ}(r+1)=\mathrm{\γ}\left(r\right)\\ k(r+1)=k\left(r\right)+1\end{array}\right.;$

Wherein, r is an iterations, and i is the power item.

9. device according to claim 8 is characterized in that, described first computing module comprises 2t first calculating sub module, respectively according to formula:

Carry out the interative computation of the 0th 2t-1 power of power to the, wherein, each first calculating sub module comprises:

First multiplier is used for the iteration coefficient of the polynomial coefficient of the improper value of last power and this iteration is carried out multiplying;

First data selector is used for the control command according to control module, selects one from the coefficient of polynomial coefficient of the improper value of described last power and the polynomial Auxiliary polynomial of improper value;

First register, the output that is used to store described first data selector is as the input of the coefficient of the polynomial Auxiliary polynomial of improper value of described first data selector;

Second multiplier is used for the coefficient of polynomial coefficient of the improper value of zero degree power and the polynomial Auxiliary polynomial of described improper value is carried out multiplying;

First adder is used for the multiplication result of described first multiplier and the multiplication result of described second multiplier are carried out addition, obtains the polynomial coefficient of improper value;

Second register is used to store the polynomial coefficient of described improper value, and output.

10. device according to claim 9 is characterized in that, described second computing module comprises t second calculating sub module, respectively according to formula:

Carry out the interative computation of the 0th t power of power to the, wherein, each second calculating sub module comprises:

The 3rd multiplier is used for the iteration coefficient of this iteration and the coefficient of error location polynomial are carried out multiplying;

The 4th multiplier, be used for to the polynomial coefficient of the improper value of zero degree power and next time the coefficient of the Auxiliary polynomial of the error location polynomial of power carry out multiplying;

Second data selector is used for the control command according to control module, from the coefficient of described error location polynomial and described before select one the coefficient of Auxiliary polynomial of error location polynomial of first power;

The 3rd register, the output that is used to store described second data selector is as the coefficient output of the Auxiliary polynomial of the error location polynomial of this power;

Second adder is used for the multiplication result of described the 3rd multiplier and the multiplication result of described the 4th multiplier are carried out addition;

The 4th register, the add operation result who is used to store described second adder, and as the output of the coefficient of error location polynomial.

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