CN102005521A - Processing method of light-emitting diode (LED) chip - Google Patents

Processing method of light-emitting diode (LED) chip Download PDF

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Publication number
CN102005521A
CN102005521A CN2010105456084A CN201010545608A CN102005521A CN 102005521 A CN102005521 A CN 102005521A CN 2010105456084 A CN2010105456084 A CN 2010105456084A CN 201010545608 A CN201010545608 A CN 201010545608A CN 102005521 A CN102005521 A CN 102005521A
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Prior art keywords
led
film
growth
substrate
sio
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CN2010105456084A
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Chinese (zh)
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王明利
王卫国
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Individual
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Individual
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Priority to CN2010105456084A priority Critical patent/CN102005521A/en
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Abstract

The invention belongs to the technical field of semiconductors, relating to a processing method of a light-emitting diode (LED) chip. Sapphire and other materials are commonly used as the substrate of the LED chip, thus the substrate thinning process in the prior art is very complex and expensive. In the invention, a substrate with thinner thickness is selected, and a novel working procedure, namely a stress balance technology is added to grow one or more layers of films on the backside of an LED action layer; the thinning working procedure is eliminated to keep the balance of an LED wafer without warping due to positive an negative stresses during the production process, thereby ensuring subsequent processes to be carried out normally; and when the chip is cut, a shape vertical to the surface can be smoothly cracked to reach the purposes of lowering production cost and improving the finished product rate and production efficiency of the chip.

Description

The processing method of led chip
Technical field
Technical field of the present invention is a technical field of semiconductors, is the production technology about led chip.
Background technology
Widely used sapphire (Al in blue-light LED chip is produced 2O 3) substrate has many good qualities: 1, production technology maturation, device quality is better; 2, high-temperature stability is good, can be used in the high growth temperature process; 3, mechanical strength height is easy to handle and clean.Therefore, most of technologies all are substrate with the sapphire.But the hardness of Sapphire Substrate is very high, and under the prior art condition, when 400 μ m were thinned to the 100 μ m left and right sides, because the required precision height, for fear of breaking, so reduction process was very complicated with its thickness, and cost is very high.
Summary of the invention
A kind of manufacture method of led chip, the method can reduce the manufacturing cost of led chip greatly, improves its production efficiency simultaneously.
The description of prior art
Existing technology is growth N-type nitride semiconductor layer 2 on the Sapphire Substrate 1 of 400 μ m thickness, is luminescent layer 3 then, again growth P-type nitride semiconductor layer 4, the above-mentioned three laminated LED action layers that are called on luminescent layer 3.After treating that above-mentioned LED action layer growth is finished, again the sapphire attenuate is become the substrate 5 of 100 μ m thickness.Because sapphire material itself is very expensive, and hardness is very high, cause attenuate to need a large amount of man-hours, manufacturing cost is very high.
The description of new technology
The present invention reelects 80 μ m thickness Sapphire Substrate 6 on the basis of existing technology, has cancelled the operation that substrate 1 attenuate is become substrate 5; Simultaneously, increase a new operation, the back side of the LED action layer of promptly on substrate 6, growing, the thick Al of the growth about 5 μ m of one deck 2O 3Film 7, or the plural layers of the high low-index material of alternating growth, thereby corresponding reflection LED emission wavelength, the luminous efficiency of raising LED.The present invention one subtracts one and increases on technology, has saved the cost of saphire substrate material cost and reduction process greatly.
Description of drawings
Fig. 1 is the LED workprint schematic diagram (before the substrate thinning) of prior art;
1 is that thickness is 400 μ m Sapphire Substrate among the figure;
2 is N-type semiconductor layer among the figure;
3 is luminescent layers among the figure;
4 is P-type semiconductor layer among the figure.
Fig. 2 is the LED workprint schematic diagram (behind the substrate thinning) of prior art;
5 is that thickness is 100 μ m Sapphire Substrate among the figure.
Fig. 3 is process schematic representation of the present invention (step 1);
6 is that thickness is 80 μ m Sapphire Substrate among the figure;
7 is Al among the figure 2O 3Film.
Fig. 4 is process schematic representation of the present invention (step 2).
Specific embodiment
Embodiment 1
The thickness of Sapphire Substrate is 80 μ m, and the back side at substrate growth LED action layer utilizes magnetron sputtering technique, the Al of the about 5 μ m thickness of sputter 2O 3Film is because Al 2O 3The compression of film makes Sapphire Substrate have certain flexibility, and the amount of this bending is decided according to the stress of front growth LED action layer, makes it double-edged stress and roughly keeps balance, so sputter Al 2O 3During film, finely tune Al 2O 3Various parameters, as air pressure, speed and thickness.A good parameter is: pressure is 0.5Pa, and speed is 0.5nm/s, and thickness is 4.5 μ m.After finish at the back side, again at front growth LED action layer, because double-edged stress equilibrium, so the situation of warpage can not occur.When the LED workprint is cut into small pieces, can be cut into smoothly and the Surface Vertical shape.
Embodiment 2
The thickness of Sapphire Substrate is 80 μ m, earlier at the back side of its growth LED action layer, alternating growth Al 2O 3And SiO 2Plural layers.Al 2O 3, SiO 2The thickness of film be respectively the 1/4 λ optical thickness of wavelength 465nm, the gross thickness of plural layers is approximately 5 μ m, and then on its frontside substrate growth LED action layer.Such purpose is that the stress on two sides keeps balance roughly after making that positive LED action layer growth is finished, and can warpage, thereby when cutting operation, can cut out the small pieces with the Surface Vertical shape smoothly.

Claims (8)

1. the manufacturing process of a led chip.
2. the manufacturing process of led chip according to claim 1, it is characterized in that: backing material is sapphire (Al 2O 3), also can be SiC, Si, GaP, GaAs, InP, AlN or ZnO.
3. backing material according to claim 2 is characterized in that: do not had the technology of substrate thinning, increased the stress equilibrium technology at LED action layer back side growing film, made the LED workprint that warpage not take place when cutting into slices owing to stress keeps balance.
4. according to the described stress equilibrium technology of claim 3, it is characterized in that: the film of the back side growth of LED action layer on the substrate, can before moving layer growth, LED grow, also can after moving layer growth, LED grow.
5. according to the film of the back side growth of LED action layer on the described substrate of claim 3, it is characterized in that: described film can be one deck Al 2O 3Film can be the Si film, also can be Al 2O 3/ SiO 2The plural layers of alternating growth.
6. a Sapphire Substrate according to claim 2 and a film that requires LED action layer back side growth on the 3 described substrates, it is characterized in that: described film can be the SiC film, the material of resilient coating can be AlN, GaN and SiO, because the SiC material has good heat-conducting, to alleviate the heating problem of led chip.
7. the film of substrate LED action layer according to claim 3 back side growth, it is characterized in that: described growth for Thin Film method can be: magnetron sputtering method, ion beam sputtering, electron-beam vapor deposition method, ion assisted deposition method, MOCVD etc.
8. Al according to claim 5 2O 3/ SiO 2Plural layers is characterized in that: it also can be ZrO 2/ SiO 2, TiO 2/ SiO 2, Ta 2O 5/ SiO 2, HfO 2/ SiO 2Or Nb 2O 5/ SiO 2Deng the plural layers of alternating growth to improve the luminosity of LED.
CN2010105456084A 2010-11-16 2010-11-16 Processing method of light-emitting diode (LED) chip Pending CN102005521A (en)

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Application Number Priority Date Filing Date Title
CN2010105456084A CN102005521A (en) 2010-11-16 2010-11-16 Processing method of light-emitting diode (LED) chip

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Application Number Priority Date Filing Date Title
CN2010105456084A CN102005521A (en) 2010-11-16 2010-11-16 Processing method of light-emitting diode (LED) chip

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CN102005521A true CN102005521A (en) 2011-04-06

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106952812A (en) * 2017-03-31 2017-07-14 成都海威华芯科技有限公司 A kind of GaN device bonding method
CN107611012A (en) * 2017-08-31 2018-01-19 长江存储科技有限责任公司 A kind of stress control method and structure of prefabricated back film

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030162368A1 (en) * 2002-02-25 2003-08-28 Connell Michael E. Wafer back side coating to balance stress from passivation layer on front of wafer and be used as a die attach adhesive
US20060132027A1 (en) * 2004-12-22 2006-06-22 Zhanjun Gao Method and display element with reduced thermal stress
JP2007123683A (en) * 2005-10-31 2007-05-17 National Institute Of Advanced Industrial & Technology Ferroelectric thin film and manufacturing method thereof
US20080217717A1 (en) * 2007-03-09 2008-09-11 Lockheed Martin Corporation Cte matched multiplexor

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030162368A1 (en) * 2002-02-25 2003-08-28 Connell Michael E. Wafer back side coating to balance stress from passivation layer on front of wafer and be used as a die attach adhesive
US20060132027A1 (en) * 2004-12-22 2006-06-22 Zhanjun Gao Method and display element with reduced thermal stress
JP2007123683A (en) * 2005-10-31 2007-05-17 National Institute Of Advanced Industrial & Technology Ferroelectric thin film and manufacturing method thereof
US20080217717A1 (en) * 2007-03-09 2008-09-11 Lockheed Martin Corporation Cte matched multiplexor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106952812A (en) * 2017-03-31 2017-07-14 成都海威华芯科技有限公司 A kind of GaN device bonding method
CN107611012A (en) * 2017-08-31 2018-01-19 长江存储科技有限责任公司 A kind of stress control method and structure of prefabricated back film

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Application publication date: 20110406