CN101931765B - Broadband tuner based on band pass sigma-delta modulation and method thereof - Google Patents

Broadband tuner based on band pass sigma-delta modulation and method thereof Download PDF

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CN101931765B
CN101931765B CN 201010250288 CN201010250288A CN101931765B CN 101931765 B CN101931765 B CN 101931765B CN 201010250288 CN201010250288 CN 201010250288 CN 201010250288 A CN201010250288 A CN 201010250288A CN 101931765 B CN101931765 B CN 101931765B
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band
signal
pass filter
input
digital
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CN101931765A (en
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冯向光
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WUXI RFDOT MICROELECTRONICS Inc
RFdot Microelectronics Inc
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WUXI RFDOT MICROELECTRONICS Inc
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Abstract

The invention relates to a broadband tuner based on band pass sigma-delta modulation and a method thereof. The broadband tuner comprises a low noise preamplifier, an anti-aliasing low pass filter and a sigma-delta ADC modulator circuit. The method comprises the following steps: an input signal obtained from an antenna is inputted to the low noise preamplifier of the tuner of the invention; the signal processed by the low noise preamplifier is inputted to the anti-aliasing low pass filter; the signal processed by the anti-aliasing low pass filter is inputted to a band pass sigma-delta modulation circuit for modulation; and after the modulation of the band pass sigma-delta modulator circuit, a digital signal is outputted. The invention utilizes the sigma-delta ADC to sample the input signal, thus an analogue signal can be directly introduced into a digital signal domain, the digital signal is outputted by the tuner, and then reduced frequency processing or filtration processing is carried out on the digital signal, thereby avoiding the defect of integrated level caused by simulating mixed frequency and reduced frequency in the prior art and at the same time, as band pass modulation is used, the broadband of the input signal and the dynamic requirements of the sigma-delta ADC are reduced.

Description

A kind of broad band tuner and method thereof based on the logical ∑ of band-△ modulation
[technical field]
The present invention relates to electronic circuit field, particularly about Digital Television broad band tuner field.
[background technology]
Along with the development of mechanics of communication and compress technique, the television broadcasting in the whole world progressively develops into digital television broadcasting from analog television broadcast.The programmer launches digital program signal in the digital television broadcasting, and user side receives signal and converts the picture that TV can be play to by the Digital Television receiving device.
As shown in Figure 1, the whole signals transmission of existing Digital Television mainly comprises: the radio-frequency (RF) digital programme signal that the antenna reception of digital television receiving apparatus arrives, then the radiofrequency signal that arrives of antenna reception is through the tuner modulation, wherein the function of tuner and general wireless receiver function are close, and it is responsible for the radiofrequency signal that receives being amplified and mixing down to intermediate frequency range.Pass through again analog to digital converter (A/D conversion) through the signal after the tuner frequency reducing and convert digital signal to, then through demodulator digital signal is carried out demodulation, convert the analog signal that to play to through these digital signals of decoder processes afterwards again and play.
In prior art, the tuner chip that is used for Digital Television (digital TV) has two kinds of solutions usually, a kind of is pure modeling scheme, wherein the solution of pure simulation needs the frequency mixer (High Dynamic Range Mixer) of high dynamic space, will solve simultaneously the problem of humorous wave interference (Harmonic Interference).That square wave but not harmonic signal are inevitably introduced odd harmonic and disturbed because common frequency mixer adopts.Because the integrated difficulty of large parameter simulation device is higher, analog filter also is one and relatively is difficult to integrated circuit composition simultaneously.More successful circuit is the Super Heterodyne structure that Microtune company adopts in the pure analog tuner, the again frequency reducing of first raising frequency rate.This scheme efficiently solves the harmonic wave interference problem, but needs the surperficial mechanical wave filter of a peripheral hardware, and integrated level is lower.
Another scheme that is used for the tuner chip of Digital Television (digital TV) is the digital-to-analogue hybrid plan, and the frequency reducing scheme that digital-to-analogue is mixed is widely used in DVB-C, in the digital TV tuner schemes such as DVB-T.The scheme that digital-to-analogue is mixed generally is that the frequency mixer by a large dynamic space directly mixes down to Low Medium Frequency with required frequency band signals, then by analog-to-digital conversion, utilizes the DSP method to remove negative frequency and disturbs.The advantage of the method is that integrated level is high, has avoided the shortcoming of analog filtering.The shortcoming of existing digital-to-analogue hybrid plan is that it needs the analog-digital converter (ADC) of a very high dynamic space when carrying out analog-to-digital conversion, and owing to the existence of a large amount of out of band signals, the interference of phase noise is highly significant also simultaneously.
Therefore, be necessary to propose a kind of new solution to overcome the aforementioned disadvantages of prior art.
[summary of the invention]
The object of the present invention is to provide a kind of integrated level height and the low digital TV tuner of dynamic space requirement.
Another object of the present invention is to provide a kind of modulator approach of digital TV tuner.
For reaching aforementioned purpose, a kind of broad band tuner based on the logical ∑ of band-Δ modulation of the present invention, it comprises low noise preamplifier, anti-aliasing low pass filter, the logical ∑ of band-Δ analog to digital converter, the output of described low noise preamplifier links to each other with the input of described anti-aliasing low pass filter, and the output of described anti-aliasing low pass filter links to each other with the input of the logical ∑ of described band-Δ analog to digital converter; Input signal is input to the low noise preamplifier, amplify the signal of processing through described low noise preamplifier and be input to described anti-aliasing low pass filter, signal after described anti-aliasing low pass filter filtering is input to the logical ∑ of described band-Δ analog to digital converter and modulates, and obtains digital signal through the logical ∑ of described band-Δ analog to digital converter output.
Further, the logical ∑ of wherein said band-Δ analog to digital converter is that the Disgrete Time Domain band that utilizes switching capacity to realize leads to ∑-Δ analog to digital converter.
Further, the logical ∑ of wherein said band-Δ analog to digital converter is that the continuous-time domain band that utilizes analog filter to realize leads to ∑-Δ analog to digital converter.
Further, wherein said band leads to the logical ∑ of band that ∑-Δ analog to digital converter is different orders or different response functions-Δ simulation number converter.
Further, wherein said ∑-Δ analog to digital converter comprises an adder at least, a band pass filter, a comparator, 1 figure place weighted-voltage D/A converter and digital filter and sample decimation circuit, input signal and feedback signal are through inputting described band-pass filter after the described adder summation, signal after described band-pass filter is inputted described comparator and reference voltage and is exported one bit digital signal after making comparisons, described one bit digital signal is converted to analog signal as described feedback signal aforementioned and the input signal summation through described digital to analog converter, and simultaneously described one bit digital signal is through described digital filter and sample decimation circuit output multistation digital signal.
Further, it is adjustable that the parameter of the band pass filter of wherein said ∑-Δ analog to digital converter is based on the sampling clock frequency of described ∑-Δ analog to digital converter.
Further, the structure of the band pass filter of wherein said ∑-Δ analog to digital converter depends on the requirement of sideband inhibition and the requirement of hardware cost.
For reaching aforementioned another purpose, the tuning methods of a kind of broad band tuner of the present invention, its first with analog input signal through modulating and obtains digital signal based on the logical ∑ of the band-broad band tuner of Δ modulation, then digital signal is carried out frequency reducing or filtering and processes and obtain intermediate-freuqncy signal.
Compared with prior art, digital TV tuner of the present invention does not need mixing, directly analog signal is become digital signal by the bandpass modulation circuit conversion first, again digital signal is carried out frequency reducing or filtering processing.Because the present invention adopts bandpass modulation to reduce the bandwidth of input signal, has reduced the dynamic space requirement of ∑-Δ analog-digital converter; By the adjustment to ∑-Δ analog-digital converter ADC response function, this tuner can effectively comprise the Digital Television frequency range of whole 50-800MHz; Owing to avoided large parameter simulation device, this tuner can be effectively and the base band demodulating circuit be integrated in the single-chip.
[description of drawings]
In order to be illustrated more clearly in the technical scheme of the embodiment of the invention, the accompanying drawing of required use was done to introduce simply during the below will describe embodiment, apparently, accompanying drawing in the following describes only is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 receives schematic diagram for the signal of existing Digital Television.
Fig. 2 is the structured flowchart of digital TV tuner of the present invention.
Fig. 3 is the structural representation of analog to digital converter in the digital TV tuner of the present invention.
Fig. 4 is the structural representation of an embodiment of the band pass filter in the analog to digital converter of digital TV tuner of the present invention.
Fig. 5 is the result schematic diagram of another embodiment of the band pass filter in the analog to digital converter in the digital TV tuner of the present invention.
[embodiment]
Below in conjunction with the accompanying drawing in the embodiment of the invention, the technical scheme in the embodiment of the invention is clearly and completely described.Obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, all other embodiment that those of ordinary skills obtain in the situation that does not break away from the present invention's essence and spirit belong to the scope that the present invention is open and protect.
Different local " in one embodiment " that occur may not be to refer to same embodiment in this specification, neither with mutually repel separate of other embodiment or embodiment optionally.
What the present invention relates to is for the tuner that radiofrequency signal is modulated, in one embodiment of the invention, it is the digital TV tuner for the receiving system of Digital Television, because what the present invention related generally to is tuner pack, for other links such as the signal reception of Digital Television, signal encoding, decodings, being familiar with those skilled in the art should understand, and obscures for avoiding content of the present invention caused, and the present invention no longer elaborates to these other links.
See also shown in Figure 2, digital TV tuner of the present invention, it mainly comprises low noise preamplifier 11, anti-aliasing low pass filter 12 and the logical ∑ of band-Δ analog to digital converter 13.
Wherein the radiofrequency signal that arrives of the antenna reception of DTV receiver is carried out signal through low noise preamplifier 11 first and is amplified.
Input anti-aliasing low pass filter 12 through amplifying signal.Because according to sampling thheorem, Minimum sample rate must be the twice of signal frequency.If given conversely speaking, sample frequency, so correctly display and not the peak frequency of distorted be called the Thomas Enqvist frequency, it is half of sample frequency.If comprise the composition that frequency is higher than nyquist frequency in the signal, signal will distort between direct current and Thomas Enqvist frequency.The result that sample rate is excessively low is that the frequency of the signal of reduction looks different from primary signal.The sort signal distortion is called aliasing (alias).The mixing deviation (aliasfrequency) that occurs is the absolute value of the difference of the frequency of input signal and hithermost sample rate integral multiple.The result of sampling will be that the signal that is lower than nyquist frequency can correctly be sampled.And frequency be higher than signal component when sampling of nyquist frequency can distorted.Therefore carrying out needing to arrange an anti-aliasing low pass filter before the A/D conversion.
Anti-aliasing low pass filter 12 will be higher than in the signal after the signal component elimination of nyquist frequency, through the logical ∑ of the signal input tape after the anti-aliasing low pass filter filtering-Δ analog to digital converter 13, the signal that band is led to ∑-rear output of Δ analog to digital converter 13 conversions becomes digital signal.
Wherein the ∑ in one embodiment of the invention-Δ analog to digital converter is a second order es-Δ analog to digital converter, its structured flowchart as shown in Figure 3, it comprises: first adder 21, the first band pass filter 22, second adder 23, the second band pass filter 24,1 bit comparator 25,1 figure place weighted-voltage D/A converter 26, digital filter and sample decimation circuit 27.
In conjunction with shown in Figure 2, input this ∑-Δ ADC transducer through the analog input signal after the anti-aliasing low pass filter filtering, wherein analog input signal Vin and a feedback signal are inputted first adder 21 jointly, carry out carrying out filtering through the first band pass filter 22 after the addition process through first adder 21, because the first band pass filter is band pass filter, can optionally filters the signal of some frequencies and keep the frequency signal of certain bandwidth.Carry out being input to the second band pass filter 24 that links to each other with second adder 23 after the addition process through second adder 23 with a feedback signal through the first band pass filter 22 filtered output signals, input respectively two inputs of described comparator 25 through the second band pass filter 24 filtered output signals and ground signalling, the clock frequency of wherein said comparator 25 is kfs, through 1 the digital signal of being of described comparator 25 outputs.The analog signal that the aforementioned feedback signal of wherein inputting first adder 21 and second adder 23 namely converts to through a digital to analog converter 26 through the digital signal of comparator 25 outputs again.What process comparator 25 was exported is one bit digital signal, and this digital signal is passed through digital filter and sample decimation circuit 27 again, and output becomes the N position digital signal.
It is the structural representation of the used band pass filter of the ∑-Δ analog to digital converter of one embodiment of the invention shown in Figure 3 as shown in Figure 4, described band pass filter comprises operational amplifier as shown in the figure, wherein input signal is through the first input end of capacitor C 1 and switch S 1, S2 input operational amplifier, is connected with a capacitor C 2 between the tie point of two switch S 1, S2 and ground.Be connected with a capacitor C 3 between the first input end of operational amplifier and the output, with two switch S 1, the S2 that mutually connect that have of capacitor C 3 parallel connections, between the tie point of two switches and ground, be connected with a capacitor C 4.Described band pass filter is the Disgrete Time Domain band pass filter that utilizes switching capacity to realize, therefore whole ∑-Δ analog to digital converter is the logical ∑ of the Disgrete Time Domain band that utilizes switching capacity to realize-Δ analog to digital converter.
As shown in the figure, its transfer function H (z) is:
H ( z ) = - C 1 C 2 C 1 + C 2 Z - 1 / 2 C 3 + C 4 - Z - 1 C 3
As shown in Figure 5, it is the structural representation of the band pass filter of continuous-time domain for used band pass filter in one embodiment of the present of invention.As shown in the figure, it comprises an operational amplifier described continuous-time domain band pass filter, wherein input signal is through the resistance R 1 of series connection, the first input end of C1 input operational amplifier, between the tie point of resistance R 1 and capacitor C 1 and ground, be connected with a resistance R 2, be connected with a capacitor C 2 at the tie point of resistance R 1 and capacitor C 1 and the output of operational amplifier, between the first input end of operational amplifier and output, be connected with a resistance R 3.Between the second input of operational amplifier and ground, be connected with a resistance R 4.
Described band pass filter shown in Figure 5 is for utilizing the continuous-time domain band pass filter, and therefore whole ∑-Δ analog to digital converter is the logical ∑ of continuous-time domain band-Δ analog to digital converter.
In actual applications, the parameter of band pass filter selects to depend on the sampling clock frequency, the structure of filter depends on the requirement of sideband inhibition and the limitation of hardware cost, by the adjustment to ∑-Δ analog-digital converter ADC response function, namely adjust by each parameter to band pass filter shown in Figure 4 according to the sampling clock frequency, can realize effectively comprising the Digital Television frequency range of whole 50-800MHz.For example, suppose that sample frequency is 2GHz, realize that 350MHz should respectively be 350/ (2000*2 π), 800/ (2000*2 π) with the height of the filter of passband section by frequency to 800MHz.
The logical ∑ of band of the present invention-Δ analog to digital converter can be that the Disgrete Time Domain band that utilizes switching capacity to realize leads to ∑-Δ analog to digital converter in the aforementioned embodiment, also can be that the continuous-time domain band that utilizes analog filter to realize leads to ∑-Δ analog to digital converter, Fig. 4 and band pass filter shown in Figure 5 are specific embodiments of the invention, being familiar with the person skilled in art can make various changes the concrete structure of band pass filter, and the those of ordinary skill of being familiar with this field can adopt the band pass filter of any structure.In the aforementioned embodiment, band of the present invention leads to the logical analog to digital converter of band that ∑-Δ analog to digital converter is a second order, also can be that the band of different orders or different response functions leads to ∑-Δ simulation number converter etc. in other embodiments.That is to say that ∑ of the present invention-Δ analog to digital converter is the logical ∑ of band-Δ analog to digital converter, all can realize purpose of the present invention.
After aforementioned tuner shown in Figure 2 is modulated analog signal, obtain digital signal, then can carry out frequency reducing or filtering processing to this digital signal by digital frequency reducing unit, finally obtain intermediate-freuqncy signal.Be the technology that those skilled in the art should understand about the processing of digital signal being carried out frequency reducing or filtering, the present invention no longer is explained in detail explanation to this technology.
Digital TV tuner of the present invention does not need mixing, directly analog signal is become digital signal by the bandpass modulation circuit conversion first, again digital signal is carried out frequency reducing or filtering processing.Because the present invention adopts bandpass modulation to reduce the bandwidth of input signal, has reduced the dynamic space requirement of ∑-Δ analog-digital converter; By the adjustment to ∑-Δ analog-digital converter ADC response function, this tuner can effectively comprise the Digital Television frequency range of whole 50-800MHz; Owing to avoided large parameter simulation device, this tuner can be effectively and the base band demodulating circuit be integrated in the single-chip.
Above-mentioned explanation has fully disclosed the specific embodiment of the present invention.It is pointed out that and be familiar with the scope that any change that the person skilled in art does the specific embodiment of the present invention does not all break away from claims of the present invention.Correspondingly, the scope of claim of the present invention also is not limited only to previous embodiment.

Claims (9)

1. broad band tuner based on the logical sigma-delta modulation of band, it is characterized in that: it comprises the low noise preamplifier, anti-aliasing low pass filter, the logical Sigma-delta ADC's of band and digital frequency reducing unit, described low noise preamplifier carries out low-pass filtering through anti-aliasing low pass filter after input signal is amplified, output signal after the anti-aliasing low pass filter filtering converts digital signal output to through the logical Sigma-delta ADC's of band, wherein said Sigma-delta ADC's comprises an adder at least, a band pass filter, a comparator, 1 figure place weighted-voltage D/A converter and digital filter and sample decimation circuit, input signal and feedback signal are through inputting described band-pass filter after the described adder summation, signal after described band-pass filter is inputted described comparator and reference voltage and is exported one bit digital signal after making comparisons, described one bit digital signal is converted to analog signal as described feedback signal aforementioned and the input signal summation through described digital to analog converter, simultaneously described one bit digital signal is through described digital filter and sample decimation circuit output multistation digital signal, and this digital signal is carried out frequency reducing in digital frequency reducing unit or filtering is processed.
2. tuner as claimed in claim 1, the logical Sigma-delta ADC's of wherein said band is the logical Sigma-delta ADC's of Disgrete Time Domain band that utilizes switching capacity to realize, described band pass filter comprises operational amplifier, wherein input signal is through capacitor C 1 and switch S 1, the first input end of S2 input operational amplifier, two switch S 1, be connected with a capacitor C 2 between the tie point of S2 and the ground, be connected with a capacitor C 3 between the first input end of operational amplifier and the output, two switch S 1 of mutually connecting that have with capacitor C 3 parallel connections, S2, be connected with a capacitor C 4 between the tie point of two switches and ground, the transfer function H of described band pass filter (z) is:
Figure FDA00002071710400011
3. tuner as claimed in claim 1, the logical Sigma-delta ADC's of wherein said band is the logical Sigma-delta ADC's of continuous-time domain band that utilizes analog filter to realize, it comprises an operational amplifier described band pass filter, wherein input signal is through the resistance R 1 of series connection, the first input end of C1 input operational amplifier, between the tie point of resistance R 1 and capacitor C 1 and ground, be connected with a resistance R 2, be connected with a capacitor C 2 at the tie point of resistance R 1 and capacitor C 1 and the output of operational amplifier, between the first input end of operational amplifier and output, be connected with a resistance R 3, between the second input of operational amplifier and ground, be connected with a resistance R 4.
4. tuner as claimed in claim 1, the logical sigma-delta simulation of the band number converter that the logical Sigma-delta ADC's of wherein said band is different orders or different response functions.
5. it is adjustable that tuner as claimed in claim 1, the parameter of the band pass filter of wherein said Sigma-delta ADC's are based on the sampling clock frequency of described Sigma-delta ADC's.
6. tuner as claimed in claim 1, the structure of the band pass filter of wherein said Sigma-delta ADC's depend on requirement that sideband is suppressed and the requirement of hardware cost.
7. tuner as claimed in claim 1, the logical sigma-delta simulation of wherein said band number converter is the logical sigma-delta simulation of second order band number converter, it comprises: the first adder that receives analog input, the first adder output connects the first band pass filter input, the first band pass filter output connects the second adder input, second adder output connecting band the second bandpass filter input, the second band pass filter output links to each other with the input of 1 bit comparator, the output of 1 bit comparator respectively with 1 figure place weighted-voltage D/A converter input, digital filter links to each other with the sample decimation circuit input end, the output of 1 figure place weighted-voltage D/A converter respectively with first adder, second adder links to each other and forms closed-loop structure;
The output signal of described analog input and 1 figure place weighted-voltage D/A converter is processed through first adder, the output signal of first adder is input to the first band pass filter, the output signal of the output of the first band pass filter and described 1 figure place weighted-voltage D/A converter is processed through second adder and is input to described the second band pass filter, the output of the second band pass filter realizes the quantification of analog input through described comparator, what obtained by the output of described comparator is the digital signal of 1 bit data stream, described digital signal obtains the digital signal of multidigit through the processing of digital filter and sample decimation circuit.
8. broad band tuner based on the logical sigma-delta modulation of band, it is characterized in that: it comprises low noise preamplifier, anti-aliasing low pass filter, the logical Sigma-delta ADC's of band and digital frequency reducing unit, the output of described low noise preamplifier links to each other with the input of described anti-aliasing low pass filter, and the output of described anti-aliasing low pass filter links to each other with the input of the logical Sigma-delta ADC's of described band; Input signal is input to the low noise preamplifier, amplify the signal of processing through described low noise preamplifier and be input to described anti-aliasing low pass filter, signal after described anti-aliasing low pass filter filtering is input to the logical Sigma-delta ADC's of described band and modulates, obtain digital signal through the logical Sigma-delta ADC's output of described band, digital frequency reducing unit carries out exporting intermediate-freuqncy signal after the frequency reducing to described digital signal.
9. the tuning methods of a broad band tuner is characterized in that: analog input signal is modulated through broad band tuner claimed in claim 1 obtained digital signal first, then digital signal is carried out frequency reducing or filtering and process and obtain intermediate-freuqncy signal.
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