CN101894835B - Pixel structure and manufacturing method thereof - Google Patents
Pixel structure and manufacturing method thereof Download PDFInfo
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- CN101894835B CN101894835B CN2009101433343A CN200910143334A CN101894835B CN 101894835 B CN101894835 B CN 101894835B CN 2009101433343 A CN2009101433343 A CN 2009101433343A CN 200910143334 A CN200910143334 A CN 200910143334A CN 101894835 B CN101894835 B CN 101894835B
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Abstract
The invention provides a pixel structure, which is characterized by manufacturing a thin film transistor channel layer and simultaneously manufacturing a floating semiconductor layer, and then stacking a subsequently manufactured drain shading pattern extension on the floating semiconductor layer so that the total thickness of the stacked floating semiconductor layer and the drain shading pattern extension is obviously increased, thereby enlarging the distance between a gate electrode line and a horizontal line of the drain shading pattern extension to reduce the coupling capacitance between the gate electrode line and the drain shading pattern extension; therefore, the flicker phenomenon of the display panels with low coupling capacitance which adopt the pixel structure can be obviously improved.
Description
Technical field
The invention relates to a kind of dot structure and a kind of production method of pixel structure, refer to a kind of dot structure that can improve display floater film flicker (flicker) phenomenon and preparation method thereof especially.
Background technology
Flat-panel screens has replaced the conventional cathode ray tube display gradually; It wherein is a kind of flat-panel screens that is widely used most at present with the LCD; Its advantage be that build is frivolous, consumption of electric power is low and driving voltage low etc., for example can be applied on the various articles for daily use such as mobile computer, digital camera, Game device.In present LCD, be the trend of industry development to utilize thin-film transistor as the relevant design of the driven unit in the dot structure again.Generally speaking, the conductive layer in the thin-film transistor and can produce the coupling capacitance effect between the conductive layer of other assembly on every side, so that film flicker (flicker) problem appears in display floater easily when showing.Please refer to Fig. 1 and Fig. 2.Fig. 1 is the part schematic top plan view of known display panel dot structure.Fig. 2 has illustrated along the cross-sectional view of Fig. 1 hatching AA '.Like Fig. 1 and shown in Figure 2; Fig. 1 and Fig. 2 illustrate an embodiment of known display panel dot structure; Known display panel dot structure 10 is by one source pole electrode wires 11 and 12 definition of a gate electrode line; Comprise a substrate 13, one source pole electrode wires 11, one source pole electrode 14, a gate electrode line 12 and a gate electrode 15 is located on the substrate 13, a gate dielectric 16 be covered in gate electrode line 12 be arranged on the gate dielectric 16 with gate electrode 15 tops, a drain electrode 17 and a drain electrode light-shielding pattern extension 18, a protective layer 19 is arranged at drain electrode 17, on drain electrode light-shielding pattern extension 18 and the gate dielectric 16, and a transparency electrode 20 is arranged on the protective layer 19.Yet in known display panel dot structure 10, drain electrode 17 can form a parallel capacitance with gate electrode 15 in vertical direction overlapping place, is called the first coupling capacitance C
Gd1, and drain electrode light-shielding pattern extension 18 is because of being parallel to its contiguous gate electrode line 12, and be provided with the gate dielectric 16 and protective layer 19 of insulation between the two, formation one lateral capacitance that therefore can be coupled is called the second coupling capacitance C
Gd2, the first coupling capacitance C wherein
Gd1The capacitance size substantially with drain electrode 17 and 15 vertical direction of gate electrode on overlapping area A be directly proportional and the second coupling capacitance C
Gd2Horizontal overlapping area with drain electrode light-shielding pattern extension 18 and gate electrode line 12 is directly proportional substantially, and and drain electrode light-shielding pattern extension 18 and gate electrode line 12 between air line distance P be inversely proportional to.Known large-scale display panels is in the dot structure design, because the film crystal tube passage is bigger, thereby when calculating coupling capacitance, if only consider the first coupling capacitance C that gate electrode 15 and drain electrode 17 form in vertical direction overlapping area A place
Gd1, it is less that total coupling capacitance is influenced deviation.Yet, on the pixel design of middle-size and small-size display panels, because of the thin-film transistor channel width significantly reduces, so the second coupling capacitance C
Gd2The signal interference phenomenon will more be tending towards obviously during for the display panel pixel structure operation, so that influence becomes big and very important for the flicker of display panel phenomenon.
From the above, the dot structure of known LCD makes display floater when display frame, produce the film flicker phenomenon owing to have higher coupling capacitance effect easily.Therefore, developing the display panel pixel structure with low scintillation is the research and development emphasis that current display industry is needed effort badly.
Summary of the invention
One of the object of the invention is providing a kind of dot structure and a kind of production method of pixel structure, can be used to improve effectively the coupling capacitance effect between gate electrode and drain electrode, reaches effective purpose of improving the flicker of display panel phenomenon.
For reaching above-mentioned purpose, the present invention provides a kind of dot structure.On the semiconductor layer that dot structure of the present invention comprises that a substrate, a first patterning conducting layer are located on the substrate, a gate dielectric is located on the first patterning conducting layer, the semiconductor layer of a patterning is located on the gate dielectric partly, second conductive layer of a patterning is located at patterning partly, a protective layer contacts the hole and is located on the substrate with one; The semiconductor layer of second conductive layer of protective layer overlay patternization, part patterning and part gate dielectric; And the 3rd conductive layer of a patterning is located on the protective layer, and partly the 3rd conductive layer of patterning is formed within the contact hole and with drain electrode and electrically connects.First patterning conducting layer comprises at least one gate electrode line and extends setting along a first direction substantially, and at least one gate electrode is electrically connected on the gate electrode line.The semiconductor layer of patterning comprises a thin-film transistor channel layer and a semiconductor layer of floating and is parallel to first direction substantially.Second conductive layer of patterning comprises one source pole electrode wires, one source pole electrode and a drain electrode and covers partly thin-film transistor channel layer, and a drain electrode light-shielding pattern extension covers the semiconductor layer of partly floating.
For reaching above-mentioned purpose, the present invention provides a kind of production method of pixel structure.Production method of pixel structure of the present invention comprises provides a substrate; It comprises a gate electrode line and at least one gate electrode to form a first patterning conducting layer in substrate surface; On substrate surface, form a gate dielectric and make grid dielectric layer covers utmost point electrode wires and substrate; The semiconductor layer that on gate dielectric, forms semiconductor layer and the patterning of a patterning comprises a thin-film transistor channel layer and a semiconductor layer of floating, and the bearing of trend of the semiconductor layer of floating is parallel to the bearing of trend of gate electrode line substantially.In substrate surface form a patterning second conductive layer its comprise one source pole electrode wires, one source pole electrode, a drain electrode and a drain electrode light-shielding pattern extension; And the drain electrode light-shielding pattern extension of at least one part is to cover the surface of semiconductor layer of floating, and to make drain electrode light-shielding pattern extension bearing of trend be parallel with the semiconductor layer bearing of trend of floating substantially.On second conductive layer of patterning, forming a protective layer contacts the hole and makes protective layer cover partly gate dielectric, the semiconductor layer of part patterning and second conductive layer of patterning simultaneously with one; On protective layer, form the 3rd conductive layer of a patterning; And make the 3rd conductive layer protective mulch of patterning; And partly the 3rd conductive layer of patterning is formed within the contact hole and with drain electrode and electrically connects, and the 3rd conductive layer of at least one part patterning and the semiconductor layer of floating are overlapped mutually on vertical direction.
Dot structure of the present invention is to make the semiconductor layer of floating when utilize making a thin-film transistor channel layer simultaneously; Be made on the semiconductor layer of floating with the storehouse mode by the light-shielding pattern extension that will drain again; So the gross thickness through float semiconductor layer and the drain electrode light-shielding pattern extension of storehouse increases; The gate electrode line and the air line distance of drain electrode light-shielding pattern extension are amplified; Reduce the coupling capacitance of gate electrode line and drain electrode light-shielding pattern extension simultaneously, to reach effective purpose of improving the flicker of display panel phenomenon.In addition, production method of pixel structure of the present invention not only has does not influence pixel aperture ratio originally, also has advantages such as need not increasing extra light shield processing procedure, therefore, has the characteristics that very easily import traditional light shield module group procedure on the implementation.
Description of drawings
Fig. 1 is the part schematic top plan view of known display panel dot structure.
Fig. 2 has illustrated along the cross-sectional view of Fig. 1 hatching AA '.
Fig. 3 is a preferred embodiment sketch map of dot structure of the present invention.
Fig. 4 has illustrated along the cross-sectional view of Fig. 3 hatching BB '.
Fig. 5 a to Fig. 5 c is a pixel structure preparation method sketch map of the present invention.
Embodiment
In the middle of specification and aforesaid right requirement, used some vocabulary to censure specific assembly.Having common knowledge the knowledgeable in the affiliated field should understand, and same assembly may be called with different nouns by manufacturer.This specification and above-mentioned claim are not used as distinguishing the mode of assembly with the difference of title, but the benchmark that is used as distinguishing with the difference of assembly on function.Mentioned in the middle of specification and the above-mentioned claim in the whole text " comprise and comprise " is an open term, so should be construed to " comprise but be not limited to ".In addition, " electric connection " speech is to comprise any indirect means that are electrically connected that directly reach at this.Therefore, be electrically connected at one second device, then represent this first device can be directly connected in this second device, or be connected to this second device through other device or the intersegmental ground connection of connection hand if describe one first device in the literary composition.
Please refer to Fig. 3 and Fig. 4, Fig. 3 is a preferred embodiment sketch map of dot structure of the present invention, and Fig. 4 has illustrated along the cross-sectional view of Fig. 3 hatching BB '.Like Fig. 3 and shown in Figure 4, chat bright structure of the present invention for clear, so simultaneously Fig. 3 and Fig. 4 are explained in the lump.On the semiconductor layer 220 that dot structure 100 of the present invention comprises that a substrate 130, a first patterning conducting layer 210 are located on the substrate 130, a gate dielectric 160 is located on the first patterning conducting layer 210, the semiconductor layer 220 of a patterning is located on the gate dielectric 160 partly, second conductive layer 230 of a patterning is located at patterning partly, a protective layer 190a, a contact hole 190b, and the 3rd conductive layer 240 of a patterning is located on the partial protection layer 190a.In the present embodiment, as shown in Figure 3, first patterning conducting layer 210 comprises at least one gate electrode line 120 and extends setting along first direction X substantially, and at least one gate electrode 150 is electrically connected on gate electrode line 120.The semiconductor layer 220 of patterning comprises a thin-film transistor channel layer 220a and the semiconductor layer 220b that floats; The semiconductor layer 220b that floats is parallel to first direction X substantially; And thin-film transistor channel layer 220a thickness equates with the semiconductor layer 220b thickness of floating substantially, yet particular restriction can adjusted and not have to thin-film transistor channel layer 220a thickness respectively according to circumstances with the semiconductor layer 220b thickness of floating.Second conductive layer 230 of patterning comprises one source pole electrode wires 110, one source pole electrode 140, a drain electrode 170 and a drain electrode light-shielding pattern extension 180; Wherein source electrode 140 covers partly thin-film transistor channel layer 220a with drain electrode 170; And drain electrode light-shielding pattern extension 180 covers the semiconductor layer 220b that partly floats, and is parallel to first direction substantially.In addition, second conductive layer 230 of protective layer 190b overlay patternization, the semiconductor layer 220 of patterning with gate dielectric 160, contact hole 190b is located among the protective layer 190b, makes protective layer 190b expose part drain electrode 170.The 3rd conductive layer 240 of patterning is located on the protective layer 190a; And partly the 3rd conductive layer 240 of patterning is formed within the contact hole 190b and electrically connects with drain electrode 170; The 3rd conductive layer 240 of patterning is preferable to be formed with transparent material, can be used as dot structure 100 of the present invention.In addition; On dot structure 100 spatial configuration of the present invention following characteristic is arranged; The bearing of trend of drain electrode light-shielding pattern extension 180 is the bearing of trend that is parallel to the semiconductor layer 220b that floats substantially; This is to cover to be overlapped on the semiconductor layer 220b that floats; And the bearing of trend of the semiconductor layer 220b that floats is the bearing of trend that is parallel to gate electrode line 120 substantially, that is first direction X, and the 3rd conductive layer 240 of at least one part patterning is mutual overlapping with the semiconductor layer 220b that floats in vertical direction.Again; It is parallel and be adjacent to partly gate electrode line 120 that the 3rd conductive layer 240 of patterning has a border 240a; And the semiconductor layer 220b that floats is positioned at the partly below of border 240a, that is the drain electrode light-shielding pattern extension 180 gate electrode lines 120 also adjacent thereto of float semiconductor layer 220b and its top parallel.In dot structure 100 of the present invention; Drain electrode 170 has overlapping area A ' with gate electrode 150 on vertical direction; And be provided with gate dielectric 160 between drain electrode 170 and the gate electrode 150, therefore locate to form the first coupling capacitance C at overlapping area A '
Gd1'.As again from dot structure section of the present invention; The vertical direction cross-section structure that can be illustrated with reference to figure 4; Because drain electrode light-shielding pattern extension 18` and part of grid pole electrode wires 120 have a horizontal overlapping area; And be provided with gate dielectric 160 and protective layer 190a between the two, therefore draining also to form the second horizontal coupling capacitance C between light-shielding pattern extension 180 and the part of grid pole electrode wires 120
Gd2'.What be worth explanation is that dot structure 100 of the present invention is that drain electrode light-shielding pattern extension 180 is stacked on the semiconductor layer 220b that floats, and has improved the air line distance P ' between drain electrode light-shielding pattern extension 180 and the gate electrode line 120 by this.Therefore, the air line distance P ' of dot structure 100 of the present invention is greater than the air line distance P of known display panel dot structure 10, that is the second coupling capacitance C of dot structure of the present invention 100
Gd2' can be less than the second coupling capacitance C of known display panel dot structure 100
Gd2'.
In addition, as shown in Figure 3, in the present embodiment, first patterning conducting layer 210 can comprise for example metal material with second conductive layer 230 of patterning, but not as limit; The material of the semiconductor layer 220 of patterning can be for example amorphous silicon (amorphous silicon), polysilicon (polysilicon), compound semiconductor (complex compound) and organic semiconductor layer materials such as (organicsemiconductor), but not as limit; The 3rd conductive layer 240 is a transparent conductive material, for example be tin indium oxide (Indium Tin Oxide, ITO) or indium zinc oxide (Indium Zinc Oxide, IZO) material, but not can be the electric conducting material of other form as limit; Gate dielectric 160 can be silicon dioxide (S for example
iO
2) or silicon nitride (S
iN
X) wait material, but not as limit; Protective layer 190a can be silicon nitride (S for example
I3N
4) wait material, but not as limit.
Please refer to Fig. 5 a to Fig. 5 c, Fig. 5 a to Fig. 5 c is the manufacture method sketch map of dot structure 100 of the present invention.Shown in Fig. 5 a; At first on substrate 130, form a conductive layer; It for example is a metal level; Use the first road light shield that the conductive layer on the substrate 130 is made into a first patterning conducting layer 210 then, and first patterning conducting layer 210 comprise at least one gate electrode line 120 and at least one gate electrode 150.Then, form a gate dielectric 160, and make gate dielectric 160 cover first conductive layer 210 and substrate 130 in substrate 130 surfaces.Shown in 5b figure; Then use the second road light shield on gate dielectric 160, to form the semiconductor layer 220 of a patterning; And the semiconductor layer 220 of patterning comprises a thin-film transistor channel layer 220a and the semiconductor layer 220b that floats, and wherein part thin-film transistor channel layer 220a is the top that is positioned at gate electrode 150.It should be noted that the bearing of trend of the semiconductor layer 220b that floats that forms according to pixel structure preparation method of the present invention is parallel to the bearing of trend of gate electrode line 120 substantially, as shown in Figure 3.Secondly; Utilize one the 3rd road light shield; Form second conductive layer 230 of a patterning again in substrate 130 surfaces; And second conductive layer 230 of patterning comprises one source pole electrode wires (not being shown among Fig. 5 b), one source pole electrode 140, a drain electrode 170 and a drain electrode light-shielding pattern extension 180, and the drain electrode light-shielding pattern extension 180 of at least one part is to be covered in the semiconductor layer 220b surface of floating.It should be noted that as shown in Figure 3ly, the bearing of trend of the drain electrode light-shielding pattern extension 180 that forms according to pixel structure preparation method of the present invention is the bearing of trend that is parallel to float semiconductor layer 220b and gate electrode line 120 substantially.Shown in 5c figure; Then use the 4th road light shield on second conductive layer 230 of patterning, to form a protective layer 190a and contact hole 190b with one, and make protective layer 190a cover gate dielectric layer 160, the semiconductor layer 220 of patterning and the second partially patterned conductive layer 230 simultaneously.Use the 5th road light shield to go up the 3rd conductive layer 240 that forms a patterning in protective layer 190a at last; And make the 3rd conductive layer 240 part protective mulch 190a of patterning; And partly the 3rd conductive layer 240 of patterning also is formed among the contact hole 190b, is electrically connected on drain electrode 170.In addition; In the manufacture method step of the invention described above dot structure 100; Wherein the step of the 3rd conductive layer 240 of second conductive layer 230 of the semiconductor layer 220 of first conductive layer 210 of pattern-makingization, patterning, protective layer 190a, patterning and patterning is to utilize a patterning process, and comprising for example is little shadow and etching (photolithography-etching process) processing procedure, but not as limit; Can adjust patterning process according to circumstances, and not have particular restriction.Gate dielectric 160 and protective layer 190a are that to utilize a deposition manufacture process for example be chemical vapour deposition (CVD) (chemical vapor deposition; CVD) and physical vapour deposition (PVD) (physical vapor deposition; But not can be other deposition manufacture process PVD), as limit.
What be worth explanation is; Pixel structure preparation method of the present invention is when making semiconductor layer; Except forming a thin-film transistor channel layer, make simultaneously the semiconductor layer of floating dexterously, be made on the semiconductor layer of floating with the storehouse mode by the light-shielding pattern extension that will drain again; So that the air line distance of drain electrode light-shielding pattern extension and gate electrode line obviously increases, can effectively reduce the capacitance of the lateral electric capacity between light-shielding pattern extension and the gate electrode line that drains.From the above, dot structure of the present invention and production method of pixel structure can be utilized to reach effective purpose of improving the flicker of display panel phenomenon.
In sum, dot structure of the present invention and production method of pixel structure have following advantage:
Dot structure of the present invention is to make the semiconductor layer structure of floating when utilize making a thin-film transistor channel layer simultaneously; Be made on the semiconductor layer of floating with the storehouse mode by the light-shielding pattern extension that will drain again; So the gross thickness through float semiconductor layer structure and the drain electrode light-shielding pattern extension of storehouse increases; Make the gate electrode line and the air line distance of drain electrode light-shielding pattern extension amplify the coupling capacitance that reduces gate electrode line and drain electrode light-shielding pattern extension simultaneously by this, dot structure of the present invention by this can reach effective purpose of improving the flicker of display panel phenomenon.
Production method of pixel structure of the present invention not only has not to be influenced the script pixel aperture ratio and has advantages such as not needing extra increase light shield processing procedure quantity; And very easily combine traditional thin-film transistor processing procedure on the implementation, in other words can utilize existing dot structure processing procedure and reach the obvious purpose of improving the image frame of two-d display panel.
The above is merely preferred embodiment of the present invention, and all equalizations of doing according to claim of the present invention change and modify, and all should belong to covering scope of the present invention.
Claims (10)
1. a dot structure is characterized in that, comprising:
One substrate;
One first patterning conducting layer is located on this substrate, and it comprises:
At least one gate electrode line extends setting along a first direction substantially; And
At least one gate electrode is electrically connected on this gate electrode line;
One gate dielectric is located on this first patterning conducting layer;
The semiconductor layer of one patterning is located on this gate dielectric of part, and it comprises:
One thin-film transistor channel layer; And
One semiconductor layer of floating is parallel to this first direction substantially;
Second conductive layer of one patterning is located on the semiconductor layer of this patterning of part, and it comprises:
The one source pole electrode wires;
An one source pole electrode and a drain electrode, this thin-film transistor channel layer of cover part; And
One drain electrode light-shielding pattern extension, this semiconductor layer of floating of whole cover parts of this extension;
One protective layer is located on this substrate, and this protective layer covers second conductive layer of this patterning, semiconductor layer and this gate dielectric of part of this patterning of part; And
The 3rd conductive layer of one patterning is located on this protective layer, and electrically connects with this drain electrode.
2. dot structure as claimed in claim 1 is characterized in that, this first patterning conducting layer or second conductive layer comprise a metal material.
3. dot structure as claimed in claim 1 is characterized in that, this thin-film transistor channel layer thickness equates with this semiconductor layer thickness of floating substantially.
4. dot structure as claimed in claim 1 is characterized in that, this drain electrode light-shielding pattern extension of at least one part is covered in this semiconductor layer surface of floating.
5. dot structure as claimed in claim 1 is characterized in that, the bearing of trend of this drain electrode light-shielding pattern extension is the bearing of trend that is parallel to this semiconductor layer of floating substantially.
6. dot structure as claimed in claim 1 is characterized in that, the bearing of trend of this semiconductor layer of floating is the bearing of trend that is parallel to this gate electrode line substantially.
7. dot structure as claimed in claim 1 is characterized in that, the 3rd conductive layer of at least one this patterning of part and this semiconductor layer of floating is mutual overlapping in vertical direction.
8. dot structure as claimed in claim 1 is characterized in that, the 3rd conductive layer have a border parallel and be adjacent to the part this gate electrode line, and this semiconductor layer of floating be positioned at the part this border the below.
9. production method of pixel structure includes the following step:
One substrate is provided;
Form a first patterning conducting layer in this substrate surface, it comprises at least one gate electrode line and at least one gate electrode;
Form a gate dielectric at this substrate surface, and make this gate dielectric cover this gate electrode line and this substrate;
On this gate dielectric, form the semiconductor layer of a patterning; Wherein the semiconductor layer of this patterning comprises a thin-film transistor channel layer and a semiconductor layer of floating, and the bearing of trend of this semiconductor layer of floating is parallel to the bearing of trend of this gate electrode line substantially;
Form second conductive layer of a patterning in this substrate surface; It comprises one source pole electrode wires, one source pole electrode, a drain electrode and a drain electrode light-shielding pattern extension; And this drain electrode light-shielding pattern extension of at least one part is the surface that covers this semiconductor layer of floating, and to make this drain electrode light-shielding pattern extension bearing of trend be parallel with this semiconductor layer bearing of trend of floating substantially;
On second conductive layer of this patterning, form a protective layer, and make this protective layer cover partly this gate dielectric, the semiconductor layer of this patterning of part and second conductive layer of this patterning simultaneously; And
On this protective layer, form the 3rd conductive layer of a patterning; And make the 3rd conductive layer of this patterning cover this protective layer; And electrically connect with this drain electrode, and the 3rd conductive layer of at least one this patterning of part and this semiconductor layer of floating are overlapped mutually on vertical direction.
10. production method of pixel structure as claimed in claim 9; It is characterized in that the 3rd conductive layer of second conductive layer, this protective layer and this patterning of making semiconductor layer, this patterning of this first patterning conducting layer, this gate dielectric, this patterning is to utilize a patterning process.
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| CN2009101433343A CN101894835B (en) | 2009-05-21 | 2009-05-21 | Pixel structure and manufacturing method thereof |
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| CN2009101433343A CN101894835B (en) | 2009-05-21 | 2009-05-21 | Pixel structure and manufacturing method thereof |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20010087345A (en) * | 2000-03-06 | 2001-09-15 | 가나이 쓰토무 | Liquid crystal display element having controlled storage capacitance |
| JP2005070746A (en) * | 2003-08-04 | 2005-03-17 | Seiko Epson Corp | Electrooptical device, method of manufacturing the same, and electronic equipment |
| CN1971910A (en) * | 2005-11-22 | 2007-05-30 | 奇美电子股份有限公司 | LCD apparatus, pixel array base plate and method for preventing flicker of display panel |
| CN101030588A (en) * | 2007-04-24 | 2007-09-05 | 友达光电股份有限公司 | Array base plate and its production |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20010087345A (en) * | 2000-03-06 | 2001-09-15 | 가나이 쓰토무 | Liquid crystal display element having controlled storage capacitance |
| JP2005070746A (en) * | 2003-08-04 | 2005-03-17 | Seiko Epson Corp | Electrooptical device, method of manufacturing the same, and electronic equipment |
| CN1971910A (en) * | 2005-11-22 | 2007-05-30 | 奇美电子股份有限公司 | LCD apparatus, pixel array base plate and method for preventing flicker of display panel |
| CN101030588A (en) * | 2007-04-24 | 2007-09-05 | 友达光电股份有限公司 | Array base plate and its production |
Non-Patent Citations (2)
| Title |
|---|
| JP特开2006-221095A 2006.08.24 |
| JP特开2006-350327A 2006.12.28 |
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