CN101894755B - Method for etching groove and device for measuring groove depth - Google Patents

Method for etching groove and device for measuring groove depth Download PDF

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CN101894755B
CN101894755B CN2009100841256A CN200910084125A CN101894755B CN 101894755 B CN101894755 B CN 101894755B CN 2009100841256 A CN2009100841256 A CN 2009100841256A CN 200910084125 A CN200910084125 A CN 200910084125A CN 101894755 B CN101894755 B CN 101894755B
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etching
groove
depth
dense
place
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CN101894755A (en
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张海洋
孙武
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Semiconductor Manufacturing International Beijing Corp
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Semiconductor Manufacturing International Beijing Corp
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Abstract

The invention discloses a method for etching a groove, comprising the following steps of firstly, setting etching parameters of an etching reaction cavity; secondly, etching and forming the groove; thirdly, measuring the groove depth, including the groove depth at a single line (Iso) part and a dense line (Dense) part, on a wafer, and extending a measuring device into the bottom of the groove in the process of measurement; fourthly, judging whether the measuring device achieves the target groove depth, if so, finishing etching, and otherwise, resetting the etching parameters, and etching the groove until achieving the target depth. The invention also discloses a device for measuring the groove depth. By adopting the method and the device, the groove depth can be accurately measured, whether the difference for etching the groove depth generated by different etching reaction cavities or different groove depths at the Iso part and the Dense part generated by micro loading effect can be both accurately measured, thereby flexibly regulating the etching technological parameters and enabling the groove depths at the Iso part and the Dense part to accord with a target value.

Description

The method of etching groove and the device of measuring groove depth
Technical field
The present invention relates to technical field of manufacturing semiconductors, particularly the device of a kind of method of etching groove and measuring groove depth.
Background technology
At present, be accompanied by the develop rapidly of semiconductor fabrication, semiconductor device is in order to reach arithmetic speed faster, bigger memory data output and more function, and wafer develops towards higher component density, high integration direction.In the last part technology of semiconductor device, the yardstick that has begun to carry out intraconnection dwindles and realizes the multilayer intraconnection.
In the last part technology of semiconductor device; Can the multiple layer metal interconnection layer be set according to different needs; Every layer of metal interconnecting layer comprises metal interconnecting wires and insulating barrier, and this just need make groove and connecting hole, plated metal in above-mentioned groove and connecting hole then to above-mentioned insulating barrier; The metal of deposition is metal interconnecting wires, generally selects for use copper as metal interconnected wire material.Fig. 1 is in the prior art; The generalized section of part copper interconnection layer: etching groove 103 and connecting hole 104 on the insulating barrier that comprises etch stop layer 101 and silicon oxide layer 102; Plated metal copper in groove 103 and connecting hole 104 then; Copper interconnecting line 103 ' in the formation groove 103 and the copper interconnecting line 104 ' in the connecting hole 104, said copper interconnecting line 104 ' is connected with the copper interconnecting line 105 of lower floor.For for simplicity, Fig. 1 only shows the part metals interconnection layer.Obviously, be formed on the Semiconductor substrate, also have the number of metal interconnection layer, wherein can form various device architectures on the Semiconductor substrate, for example be defined in active area, isolated area on the Semiconductor substrate, and transistorized source/leakage and the grid in the active area.
In this copper wiring technique; Etch stop layer is a silicon nitride film, has about 7 relative dielectric constant, significantly greater than be about 4 silicon oxide layer relative dielectric constant; This has increased whole intermetallic dielectric layer (Intermetal Dielectric; IMD) relative dielectric constant, thus the parasitic capacitance between copper interconnecting line is increased, therefore can cause the signal delay of semiconductor device or the defective that power consumption increases.In concrete manufacturing process; In the multilayer intraconnection; Than comparatively dense, other interconnection layers are relatively more responsive relatively, so adopt low-k dielectric materials to replace silicon oxide layer usually with respect to other interconnect layer copper wirings in the copper wiring of bottom copper interconnection layer; Further reduce the parasitic capacitance between the copper interconnecting line of bottom copper interconnection layer, so etching is stopped the BD material that deposit on the film contains the similar oxide (Oxide) of silicon, oxygen, carbon, protium.The dielectric constant of BD is 3, but the BD material is relatively more expensive, so still adopt silica as insulating barrier in the general technology processing procedure.
In existing etching technics, general using plasma etching forms groove 103 and connecting hole 104.Generally in semiconductor manufacturing factory, a plurality of reaction chambers that carry out etching technics are arranged, even the equipment Default Value is identical; Etching parameters is also identical; The gash depth that etching forms in the different etching reaction chamber remains difference to some extent, and this is that mainly there is certain difference certainly in different equipment, and this can't change; And size of devices is meticulous more, and this species diversity is also obvious more.
Therefore, in the prior art, at main etching (Main Etch; ME) form groove after, utilize AFM (atomic force microscope, AFM); Gash depth to all devices is measured, if there are differences, and the etching depth in the etching reaction chamber that promptly the has gash depth that departs from objectives; Then adjust the etching parameters in this etching reaction chamber, for example the force value in reaction chamber when etch period and etching reaches the target gash depth up to the gash depth that etches.
Wherein, AFM used in the prior art is along with development of technology, and development forms gradually.In microscopical evolution, first on behalf of light microscope, and second on behalf of electron microscope, and the third generation is a scanning probe microscopy, wherein just comprise have atom definition, applicable to the AFM of non-conductive sample.AFM comprises elastic cantilever and probe, and probe is processed silicon materials by focused particle beam (FIB).When the probe scanning sample surfaces; Be probe pinpoint during very near sample, the interatomic active force of the atom on its needle point top and sample surfaces can make elastic cantilever crooked, departs from original position; Measure above-mentioned drift condition through laser beam, can obtain the surface topography map of sample atoms level.Having now often utilizes AFM to obtain the degree of depth of groove in the semiconductor technology.
Need to prove that device go up to form at wafer (wafer), thus can be on wafer etching groove.It is different that single line on same wafer (Iso) is located to locate the groove width that etching forms with close line (Dense).The difference at Iso place and Dense place is meant that the density of the last pattern distribution of wafer is different.Particularly, than broad, critical size (CD) is also bigger in the groove pitch at Iso place, and relatively narrow in the groove pitch at Dense place, CD also compares less.For example, in 90 nm technology node, the gash depth at Iso place and Dense place is 350~400 nanometers, the CD at Iso place, and promptly groove width is 130~170 nanometers, and the groove width at the Dense place is merely 90~110 nanometers.In wafer, have several chip unit (Die), have several single lines and close line in each chip unit, to Mi Xianchu, spacing reduces gradually from single line.But the probe of above-mentioned existing AFM is taper, though needle point is thinner, after the needle point height of needle point 100 nanometers; Probe diameter increases sharply; Make when the FIB probe pinpoint does not also enter into the narrow dark channel bottom at Dense place, just limited, because probe is stuck by narrow groove width; Can't extend into channel bottom, thereby also just can't measure the gash depth at Dense place.Can only measure zone sparse especially in the wafer, i.e. so the gash depth at Iso place, and the gash depth at Dense place can't be measured is can only be with the gash depth at the Iso place gash depth as entire wafer.Even the gash depth at Dense place does not reach target depth like this, AFM also can't discern, and measure error is bigger, has had a strong impact on the performance of device.
Summary of the invention
In view of this, the present invention's technical problem that will solve is: accurately measure gash depth.
For solving the problems of the technologies described above, technical scheme of the present invention specifically is achieved in that
The invention discloses a kind of method of etching groove, may further comprise the steps:
The etching parameters in etching reaction chamber is set;
Etching forms groove;
With measuring equipment the gash depth that comprises single line Iso place and close line Dense place on the wafer is measured, said measuring equipment comprises elastic cantilever and probe, and said probe is column structure, and diameter is less than groove width;
Judge whether to reach the target gash depth,, then finish etching if reach target depth; Otherwise reset said etching parameters, carry out etching groove, until arriving target depth.
Force value when said etching parameters comprises etch period and etching in the reaction chamber.
The invention also discloses a kind of device of measuring groove depth, comprise elastic cantilever and probe, said probe can extend into the channel bottom of single line place and Mi Xianchu, and gash depth is measured.
Said probe is column structure, and diameter is less than groove width.
Said device is CNT AFM CNT AFM.
Visible by above-mentioned technical scheme, the present invention has overcome measurement defective of the prior art, can extend into the measurement mechanism of wafer Dense place channel bottom; Be applied in the semiconductor fabrication process; Accurately measuring groove depth truly reflects the gash depth at Iso place and Dense place, if do not reach target depth; Can readjust the etching parameters in etching reaction chamber, carry out the etching of groove.And unlike prior art; Can only measure the gash depth in very sparse zone; Therefore the defective in the time of also just can't reflecting etching; For example because the difference in etching reaction chamber causes the difference of the etching groove degree of depth, perhaps the Iso place that causes of micro loading effect (Micro loading Effect) and Dense place gash depth is different, makes the device performance reduction of formation.
Description of drawings
Fig. 1 is the generalized section of part copper interconnection layer in the prior art.
Fig. 2 carries out the method flow sketch map of etching groove for the present invention.
Embodiment
For make the object of the invention, technical scheme, and advantage clearer, below with reference to the accompanying drawing embodiment that develops simultaneously, to further explain of the present invention.
The present invention can extend into the measurement mechanism of wafer Dense place channel bottom; Be applied in the semiconductor fabrication process; Accurately measuring groove depth truly reflects the gash depth at Iso place and Dense place, if do not reach target depth; Can readjust the etching parameters in etching reaction chamber, carry out the etching of groove.
Fig. 2 shows the method flow sketch map that the present invention carries out etching groove.
Step 21, the etching parameters in etching reaction chamber is set, for example the force value in reaction chamber when etch period and etching is carried out the main etching step, and etching forms groove.
Step 22, employing measurement mechanism of the present invention measure gash depth, comprise Iso place and Dense place.
It should be noted that; AFM can only measure the gash depth in the zone of sparse especially (Iso) in the prior art; Because the local size of the relative Dense of these local groove widths is bigger, the probe of existing AFM can not blocked by groove, and enters into the channel bottom at Iso place.And the device that the present invention adopted, probe presents column structure, and the diameter of needle point is very little; No matter 90 nm technology generation; Still 65 higher nanometers, 45 nm technology generation, probe can both extend into Iso place and Dense place channel bottom, and gash depth is accurately measured.
Along with the development of nanometer technology, CNT and AFM are combined, (carbon nano tube, CNT) AFM promptly are made up of the probe of AFM CNT to have constituted CNT.CNTAFM comprises elastic cantilever and probe.CNT can be accomplished very little size, and its CNT probe presents column structure, and the diameter of needle point has only 20 nanometers, and on the length of whole needle point, keeps constant, and therefore, CNT AFM is more suitable for carrying out the measurement of the narrow deep trench of high-aspect-ratio.So the preferred embodiment that the present invention accurately measures gash depth is CNT AFM; No matter 90 nm technology generation; Still high-tech generation more; Can both extend into Iso place and Dense place channel bottom, therefore not only can measure the gash depth in Iso zone, but also can measure the gash depth in Dense zone.
Step 23, will measure size and feed back, judge whether to reach the target gash depth; If the gash depth at Iso place and Dense place reaches target depth, then execution in step 24, finish etching;
If the gash depth at Iso place or Dense place does not reach the target gash depth; Then again execution in step 21, readjust etching parameters; Force value when comprising etch period and etching in the reaction chamber, the gash depth until Iso place that etches and Dense place meets desired value.
Obviously can find out from above-mentioned; No matter be because the difference in etching reaction chamber causes the difference of the etching groove degree of depth; Or Iso place that Micro loading Effect causes and Dense place gash depth is different; Can accurately measure through measurement mechanism of the present invention, thereby adjust the etching technics parameter flexibly, make the gash depth at Iso place and Dense place meet desired value.Micro loading Effect refers to the local different pattern density of wafer, influences etch rate, and the little local etching phase in hole is to more difficult to get access; So the local etching with respect to the hole is big is slow; Under the identical etching condition, the degree of depth of etching groove is different, and the little gash depth in hole is more shallow.Need to prove that the device of measuring groove depth of the present invention includes but not limited to CNT AFM, as long as can extend into Iso place and Dense place channel bottom, the device that carries out depth survey all should be included within protection scope of the present invention.
The above is merely preferred embodiment of the present invention, is not to be used to limit protection scope of the present invention.All within spirit of the present invention and principle, any modification of being done, be equal to replacement and improvement etc., all should be included within protection scope of the present invention.

Claims (2)

1. the method for an etching groove may further comprise the steps:
The etching parameters in etching reaction chamber is set;
Etching forms groove;
With measuring equipment the gash depth that comprises single line Iso place and close line Dense place on the wafer is measured, said measuring equipment comprises elastic cantilever and probe, and said probe is column structure, and diameter is less than groove width, and said probe is made up of CNT; Judge whether to reach the target gash depth,, then finish etching if reach target depth; Otherwise reset said etching parameters, carry out etching groove, the gash depth until Iso place that etches and Dense place arrives target depth.
2. the method for claim 1 is characterized in that, the force value when said etching parameters comprises etch period and etching in the reaction chamber.
CN2009100841256A 2009-05-20 2009-05-20 Method for etching groove and device for measuring groove depth Active CN101894755B (en)

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CN102479732B (en) * 2010-11-30 2013-12-25 中国科学院微电子研究所 Method for monitoring gate groove etching
CN102420152A (en) * 2011-04-29 2012-04-18 上海华力微电子有限公司 Method for controlling thickness of surplus silicon oxide in groove of power device in on-line manner
TWI452644B (en) * 2011-05-17 2014-09-11 Univ Nat Yunlin Sci & Tech Method and apparatus for measuring etching depth
CN103378151B (en) * 2012-04-23 2016-02-03 中芯国际集成电路制造(上海)有限公司 A kind of silicon germanium structure reducing load effect and forming method thereof
CN112638048A (en) * 2020-12-30 2021-04-09 重庆凯歌电子股份有限公司 PCB protection type printing method

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1977364A (en) * 2004-06-29 2007-06-06 优利讯美国有限公司 Method and apparatus for reducing aspect ratio dependent etching in time division multiplexed etch processes
CN101133362A (en) * 2005-01-03 2008-02-27 英特尔公司 Methods for repairing an alternating phase-shift mask
CN101313206A (en) * 2005-12-06 2008-11-26 国际商业机器公司 Y-shaped carbon nanotubes as afm probe for analyzing substrates with angled topography

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1977364A (en) * 2004-06-29 2007-06-06 优利讯美国有限公司 Method and apparatus for reducing aspect ratio dependent etching in time division multiplexed etch processes
CN101133362A (en) * 2005-01-03 2008-02-27 英特尔公司 Methods for repairing an alternating phase-shift mask
CN101313206A (en) * 2005-12-06 2008-11-26 国际商业机器公司 Y-shaped carbon nanotubes as afm probe for analyzing substrates with angled topography

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