CN101840240A - Adjustable multi-value output reference voltage source - Google Patents
Adjustable multi-value output reference voltage source Download PDFInfo
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Abstract
The invention discloses an adjustable multi-value output reference voltage source. The voltage source comprises a reference generating circuit and a reference voltage output circuit, wherein a starting circuit and a mirror current source negative feedback loop are connected between the reference generating circuit and the reference voltage output circuit; one end of the starting circuit is connected with the reference generating circuit, while the other end is connected with the mirror current source negative feedback loop; and the other end of the mirror current source negative feedback loop is connected with the reference voltage output circuit. The adjustable multi-value output reference voltage source has the advantages of low circuit power consumption, low temperature drift and high power supply inhibiting capacity. In the adjustable multi-value output reference voltage source of the invention, the mirror current source negative feedback loop is used by replacing a high voltage gain amplifier, so that a circuit structure is simpler; a source follower connected with the output end of the mirror current source negative feedback loop provides a bipolar transistor basis voltage and generates a band gap reference voltage at the same time; and simultaneously an output voltage value with a small temperature coefficient can be obtained.
Description
Technical field
The present invention relates to the used reference voltage source of integrated circuit, specifically be meant a kind of band gap (bandgap) reference voltage voltage source.
Background technology
Reference voltage source typically refers to the voltage source of the high stable that is used as benchmark in circuit.Along with the high speed development of integrated circuit, system architecture is further complicated, to analog electrical rood basic module, has higher requirement as A/D, D/A converter, voltage detecting comparator circuit etc., and high precision, high stability, low-power consumption are the main flows of design.For these modules, voltage reference is considerable module, and the stability of reference voltage source is directly connected to the duty of circuit and the serviceability of circuit.One good voltage reference requirement temperature coefficient is little, power supply inhibition ability is strong.
The principle of work of band-gap reference is according to the band gap voltage of silicon materials and supply voltage and the irrelevant characteristic of temperature, utilizes V
BEPositive temperature coefficient (PTC) and bipolar transistor V
BENegative temperature coefficient cancel out each other, realize that low temperature floats, high-precision reference voltage.Bipolar transistor provides emitter bias voltage V
BE, by the V between two transistors
BEProduce V
T, by resistor network with V
TAmplify several times, promptly with two voltage additions
Select suitable multiple, make the temperature of two voltages float coefficient and cancel out each other, thereby obtain the voltage reference of the zero-temperature coefficient under a certain temperature, representative value is 1.25V.
In the led drive circuit of BUCK type, the voltage of current sense resistor feedback is an extremely low magnitude of voltage, and we determine the on off state of the POWERMOS of driving circuit by the magnitude of voltage that compares the current sense resistor feedback.The stability of reference voltage that is used for comparison is very important.General bandgap voltage reference can not directly meet this requirement, and the voltage conversion circuit that need design other is to reduce the output reference voltage value, and this also makes design difficulty increase greatly.
Publication number is that CN101470458A, application number are that 200710303891.8 Chinese invention patent discloses a kind of bandgap voltage reference circuit, it comprises: the VBE voltage generator, this VBE voltage generator comprises a self-bias current source that is used to produce two branch road reference circuits, and the bias generator that is used to produce two-way VBE voltage that is coupled in this self-bias current source; Reference voltage regulator, this reference voltage regulator comprise operation transconductance amplifier and reference voltage regulon, are used to produce a constant reference voltage.Such scheme need use operation transconductance amplifier, makes circuit complicated, and cost is higher.
Granted publication number is that CN100459197C, the patent No. are that the Chinese invention patent of ZL200510120849.3 discloses a kind of reference voltage source for low temperature coefficient with gap, and it comprises following circuit: the PTAT current generating circuit is used to produce PTAT electric current I PTAT; The reference voltage start-up circuit links to each other with described PTAT current generating circuit, is used to overcome the zero current working point of PTAT current generating circuit, guarantees that PTAT electric current I PTAT can produce; The reference voltage combiner circuit links to each other with described PTAT current generating circuit output terminal, is used to produce reference voltage; The base current bucking circuit links to each other with described reference voltage combiner circuit, is used for offsetting this reference voltage combiner circuit transistor and produces extra base current, guarantees the correct generation of reference voltage; First current mirror circuit, being used for that described PTAT current generating circuit is generated the PTAT current mirror duplicates, and export described PTAT current generating circuit respectively to, the reference voltage start-up circuit, reference voltage combiner circuit and base current bucking circuit, this reference voltage source for low temperature coefficient with gap also comprises the second-order temperature compensating current generating circuit, with described first current mirror circuit, the reference voltage combiner circuit links to each other, input IPTAT electric current, bandgap voltage reference, by utilizing the quadratic relationship of metal-oxide-semiconductor drain-source current and grid source pressure reduction, produce the second order offset current and export the reference voltage combiner circuit to and produce the second order bucking voltage, the second-order temperature coefficient of standard of compensation voltage, the reference voltage of generation extremely low temperature coefficient.Such scheme can not be realized the many-valued way of output on the one hand; The mode that produces bandgap voltage reference on the other hand is comparatively complicated, power consumption, temperature are floated with power supply and are suppressed very ideal of ability, thereby it is to make the source voltage of the identical MN1 of making of electric current, the MN2 that flow through MN1 and MN2 identical by MN1, MN2 with the current mirror that MP1, MP2 form, and then obtains at the two ends of R1
The voltage of this positive temperature coefficient (PTC), thus obtain flowing through the PTAT electric current of R1, on resistance R 2, obtain the voltage V of positive temperature coefficient (PTC) through the circuit mirror image
R2, and negative temperature coefficient voltage is the V of bipolar transistor P3, P4
BeAddition constitutes, and from accompanying drawing as can be seen, its bandgap voltage reference is
Wherein,
M is the base area ratio of bipolar transistor P2, P1.
Summary of the invention
The problem that the present invention need solve provide a kind ofly have that circuit power consumption is little, temperature floats reference voltage source little, that power supply suppresses the strong adjustable multi-value output of ability.
To achieve these goals, the present invention designs a kind of reference voltage source of adjustable multi-value output, the reference voltage source of adjustable multi-value output, comprise reference generating circuit and reference voltage output circuit, between reference generating circuit and reference voltage output circuit, be connected with start-up circuit and mirror current source feedback loop, described start-up circuit one end is connected with reference generating circuit, the other end is connected with the mirror current source feedback loop, and the other end of mirror current source feedback loop is connected with reference voltage output circuit.
Described mirror current source feedback loop comprises that PMOS pipe MP5, MP6, NMOS manage MN1, MN2, the grid of PMOS pipe MP5 is connected with reference generating circuit, the source electrode of MP5 meets VDD, the drain electrode of NMOS pipe MN2 is received in the drain electrode of MP5, the source ground of NMOS pipe MN2, the grid of NMOS pipe MN2 connects the grid of NMOS pipe MN1, the drain electrode of NMOS pipe MN1 connects the drain electrode of PMOS pipe MP6, the grid of PMOS pipe MP6 is connected with reference generating circuit, PMOS pipe MP6 source electrode meets VDD, and PMOS pipe MP6 drain electrode is connected with reference voltage output circuit.
Described start-up circuit comprises PMOS pipe MP3, MP4 and bipolar transistor Q3, Q4, the source termination VDD of PMOS pipe MP3, the source end of drain terminal and PMOS pipe MP4 joins, ground connection after the grid of PMOS pipe MP3 and MP4 joins, the drain terminal of PMOS pipe MP4 is received the collector of bipolar transistor Q4, the grounded emitter of bipolar transistor Q4, its collector and base stage short circuit connect the base stage of bipolar transistor Q3 simultaneously, and the emitter and collector of bipolar transistor Q3 is connected with reference generating circuit respectively.
Described reference voltage output circuit is many-valued reference voltage output circuit, it comprises source follower Q5, divider resistance R4, R5, R6, the drain electrode of PMOS pipe MP6 in the base stage of source follower Q5 and the mirror current source feedback loop is connected, the collector of Q5 meets VDD, emitter connecting resistance R6 also draws reference voltage V 2 output terminals, the other end of resistance R 6 is connected with reference generating circuit with resistance R 5, and between resistance R 6 and R5, draw bandgap voltage reference VREF output terminal, the other end of resistance R 5 is connected with resistance R 4, and between resistance R 5 and R4, draw reference voltage V 1 output terminal, the other end ground connection of resistance R 4.
Described reference generating circuit comprises PMOS pipe MP1, MP2, bipolar transistor Q1, Q2, resistance R 1, R2, R3, the source electrode of PMOS pipe MP1 and MP2 meets VDD, the grid short circuit of PMOS pipe MP1 and MP2, the drain electrode of PMOS pipe MP1 and the collector of bipolar transistor Q1 are connected with the grid that PMOS in the mirror current source feedback loop manages MP5, the drain electrode of PMOS pipe MP2 and the collector of bipolar transistor Q2 are connected with the grid that PMOS in the mirror current source feedback loop manages MP6, resistance R 3 one ends are connected with the base stage of bipolar transistor Q2, the other end and the base stage of bipolar transistor Q1 are connected with resistance R 6 in the reference voltage output circuit, resistance R 2 is connected the emitter of bipolar transistor Q2, and resistance R 1 is connected bipolar transistor Q1, between Q2 emitter concurrent and the ground.
The reference voltage source of adjustable multi-value output of the present invention uses the mirror current source feedback loop to replace the high voltage gain amplifier, make circuit structure simpler, produce bandgap voltage reference when will provide the bipolar transistor bias voltage by the source follower of mirror current source feedback loop output termination, and the connection of optimization circuit, thereby when work, can obtain the output voltage values of less temperature coefficient.According to the needs of system, can obtain the output of multichannel reference voltage simultaneously simultaneously.The reference voltage source of adjustable multi-value of the present invention output has that circuit power consumption is little, temperature is floated little, power supply and suppressed the strong characteristics of ability.
Description of drawings:
Fig. 1 is the reference voltage source functional-block diagram of adjustable multi-value output of the present invention;
Fig. 2 is the reference voltage source circuit figure of adjustable multi-value output of the present invention.
Embodiment
For the ease of those skilled in the art's understanding, structural principle of the present invention is described in further detail below in conjunction with specific embodiment and accompanying drawing:
As shown in Figure 1, a kind of reference voltage source of adjustable multi-value output, the reference voltage source of adjustable multi-value output, the reference voltage source of adjustable multi-value output, comprise reference generating circuit and reference voltage output circuit, between reference generating circuit and reference voltage output circuit, be connected with start-up circuit and mirror current source feedback loop, described start-up circuit one end is connected with reference generating circuit, the other end is connected with the mirror current source feedback loop, and the other end of mirror current source feedback loop is connected with reference voltage output circuit.
As shown in Figure 2, described mirror current source feedback loop comprises that PMOS pipe MP5, MP6, NMOS manage MN1, MN2, the grid of PMOS pipe MP5 is connected with reference generating circuit, the source electrode of MP5 meets VDD, the drain electrode of NMOS pipe MN2 is received in the drain electrode of MP5, the source ground of NMOS pipe MN2, the grid of NMOS pipe MN2 connects the grid of NMOS pipe MN1, the drain electrode of NMOS pipe MN1 connects the drain electrode of PMOS pipe MP6, the grid of PMOS pipe MP6 is connected with reference generating circuit, PMOS pipe MP6 source electrode meets VDD, and PMOS pipe MP6 drain electrode is connected with reference voltage output circuit.
Described start-up circuit comprises PMOS pipe MP3, MP4 and bipolar transistor Q3, Q4, the source termination VDD of PMOS pipe MP3, the source end of drain terminal and PMOS pipe MP4 joins, ground connection after the grid of PMOS pipe MP3 and MP4 joins, the drain terminal of PMOS pipe MP4 is received the collector of bipolar transistor Q4, the grounded emitter of bipolar transistor Q4, its collector and base stage short circuit connect the base stage of bipolar transistor Q3 simultaneously, and the emitter and collector of bipolar transistor Q3 is connected with reference generating circuit respectively.
Described reference voltage output circuit is many-valued reference voltage output circuit, it comprises source follower Q5, divider resistance R4, R5, R6, the drain electrode of PMOS pipe MP6 in the base stage of source follower Q5 and the mirror current source feedback loop is connected, the collector of Q5 meets VDD, emitter connecting resistance R6 also draws reference voltage V 2 output terminals, the other end of resistance R 6 is connected with reference generating circuit with resistance R 5, and between resistance R 6 and R5, draw bandgap voltage reference VREF output terminal, the other end of resistance R 5 is connected with resistance R 4, and between resistance R 5 and R4, draw reference voltage V 1 output terminal, the other end ground connection of resistance R 4.
Described reference generating circuit comprises PMOS pipe MP1, MP2, bipolar transistor Q1, Q2, resistance R 1, R2, R3, the source electrode of PMOS pipe MP1 and MP2 meets VDD, the grid short circuit of PMOS pipe MP1 and MP2, the drain electrode of PMOS pipe MP1 and the collector of bipolar transistor Q1 are connected with the grid that PMOS in the mirror current source feedback loop manages MP5, the drain electrode of PMOS pipe MP2 and the collector of bipolar transistor Q2 are connected with the grid that PMOS in the mirror current source feedback loop manages MP6, resistance R 3 one ends are connected with the base stage of bipolar transistor Q2, the other end and the base stage of bipolar transistor Q1 are connected with resistance R 6 in the reference voltage output circuit, resistance R 2 is connected the emitter of bipolar transistor Q2, and resistance R 1 is connected bipolar transistor Q1, between Q2 emitter concurrent and the ground.
The present invention is connected with reference voltage output circuit by the output terminal of mirror current source feedback loop, this reference voltage output circuit is many-valued reference voltage output circuit, the source follower that this reference voltage output circuit comprises provides base bias to bipolar transistor on the one hand, exports a plurality of reference voltages by divider resistance on the one hand.
Use mirror current source feedback loop of the present invention replaces the high voltage gain amplifier, makes circuit structure simpler.Specifically as shown in Figure 2.In Fig. 2, all NMOS pipes all are the same breadth length ratios, and all PMOS also are the same breadth length ratios.Mirror image by MP1, MP5, MN2, MN1, electric current on MP1, the Q1 branch road is mirrored onto on MN1, the MP6 branch road, right by MP1, MP2 mirror image simultaneously, the saturation current that the saturation current that flows through on the MP2 equals to flow through on the MP1, when the output bandgap voltage reference, MP1, MP2, MP6 and MN1 are operated in the saturation region, the electric current of MP1, MP2, MP6 of flowing through equates, VGSMP1=VGSMP6 is VDSMP1=VDSMP2, has eliminated image current that the MOSFET second-order effect brings and has lost, has guaranteed
The source electrode of PMOS pipe MP2 meets VDD, grid and PMOS pipe MP1 short circuit, the grid of PMOS pipe MP5 is received in drain electrode, the source electrode of PMOS pipe MP5 is received VDD, the drain electrode of NMOS pipe MN2 is received in drain electrode, the source ground of NMOS pipe MN2, grid connects the grid of NMOS pipe MN1, and the drain electrode of NMOS pipe MN1 connects the drain electrode of PMOS pipe MP6.The source termination VDD of PMOS pipe MP1, its grid leak short circuit inserts the grid of PMOS pipe MP6, and PMOS pipe MP6 source electrode meets VDD.Source follower bipolar transistor Q5 is as source follower, and its collector meets VDD, and its base stage connects the drain terminal of PMOS pipe MP6, the current input terminal of its emitter connecting resistance R6 and at this output reference voltage V2.The current input terminal of the current output terminal connecting resistance R5 of resistance R 6 and for bipolar transistor Q1, Q2 provide base bias produces bandgap voltage reference VREF.The current input terminal of the current output terminal connecting resistance R4 of resistance R 5 also produces reference voltage V 1.The current output terminal ground connection of resistance R 4.
In the circuit of the present invention, PMOS pipe MP3, MP4 and bipolar transistor Q3, Q4 constitute start-up circuit.The source termination VDD of PMOS pipe MP3, the source end of drain terminal and PMOS pipe MP4 joins, and PMOS pipe MP3 and MP4 join and receive ground.The drain terminal of PMOS pipe MP4 is received the collector of bipolar transistor Q4.The grounded emitter of bipolar transistor Q4, its collector and base stage short circuit connect the base stage of bipolar transistor Q3 simultaneously.The emitter of bipolar transistor Q3 inserts the current input terminal of resistance R 1, and its collector is received the drain terminal of MP2.When circuit powered on, the base-emitter voltage difference of bipolar transistor Q3, Q4 produced the current start circuit on resistance R 1.
In the present invention, positive temperature coefficient (PTC) is by bipolar transistor Q1, Q2
Produce.The collector of bipolar transistor Q1 connects the drain terminal of PMOS pipe MP1, the current output terminal of base stage connecting resistance R6, emitter connecting resistance R1 current input terminal.The collector of bipolar transistor Q2 connects the drain terminal of PMOS pipe MP2, the current output terminal of base stage connecting resistance R3, the current output terminal of the current input terminal connecting resistance R6 of resistance R 3, emitter connecting resistance R2 current input terminal, resistance R 2 current output terminal connecting resistance R1 current input terminals, resistance R 1 current output terminal ground connection.
Find out that by formula resistance R 3 can be revised positive temperature coefficient voltages, resistance R 3 can be converted among the R2.Below the detailed temperature coefficient of derivation reference voltage.We can obtain by accompanying drawing 2:
Wherein, V
BE1As follows with the relational expression of temperature:
Convolution (1) (2) (3) can obtain
According to the expression formula of (4) formula, can obtain, the emitter area that bipolar transistor Q1, Q2 reasonably be set than and the ratio of resistance R 1, R2, can be at specified temp T
0The place obtains zero-temperature coefficient.The base current of bipolar transistor Q2 flows into resistance R 2, and the voltage that produces positive temperature coefficient (PTC) is had contribution.Because it is very little to flow through the collector current of bipolar transistor Q1, Q2, β increases with temperature, can the second order term of reference voltage be compensated when temperature is higher as can be known in conjunction with formula (2).
As shown in Figures 1 and 2, the output terminal of the source follower of mirror current source feedback loop output termination provides base bias to bipolar transistor on the one hand through dividing potential drop, exports a plurality of reference voltages by divider resistance on the one hand.Wherein
By formula we as can be seen, by the ratio between the resistance is set, we can obtain the reference voltage value of a wide region.On the branch road at R1, R2, R3 place, we can segment down these three resistances, promptly realize same series connection resistance by a plurality of resistance, and we can obtain another reference voltage between resistance so.As: we get
Between R11 and R12, just can export a reference voltage.
Because flow through some base current of electric current of resistance R 3, so this electric current and reference voltage V as bipolar transistor Q1, Q2
2Precision between have and compromisely to consider.
In sum, the present invention can export a plurality of reference voltages.When exporting the reference voltage of 200mV in-40 ℃ ~+125 ℃, temperature is floated and is lower than 0.5mV
The reference voltage source of adjustable multi-value output of the present invention (is made up of MP1, MP2, MP5, MP6, MN1, MN2 and Q5, R6, R3, Q1, Q2 by the feedback loop that current mirror is arranged, this loop is the architecture basics of many-valued output) collector current that flows through bipolar transistor Q1, Q2 is equated, and then on resistance R 2, produce positive temperature coefficient voltages
, negative temperature coefficient voltage is the V of bipolar transistor Q1
BeConstitute, from accompanying drawing as can be seen, its bandgap voltage reference is
Wherein,
M is the base area ratio of bipolar transistor Q2, Q1.Q1, Q2, MP1, MP2, R2 branch road have produced the PTAT electric current, and bandgap voltage reference generates in the base stage of Q1 simultaneously.
Foregoing is preferred embodiment of the present invention only, is not to be used to limit embodiment of the present invention, and those skilled in the art are according to design of the present invention, and appropriate adaptation of being made or modification all should be within protection scope of the present invention.
Claims (3)
1. the reference voltage source of adjustable multi-value output, comprise reference generating circuit and reference voltage output circuit, it is characterized in that: between reference generating circuit and reference voltage output circuit, be connected with start-up circuit and mirror current source feedback loop, described start-up circuit one end is connected with reference generating circuit, the other end is connected with the mirror current source feedback loop, and the other end of mirror current source feedback loop is connected with reference voltage output circuit.
2. reference voltage source according to claim 1, it is characterized in that: described mirror current source feedback loop comprises PMOS pipe MP5, MP6, NMOS manages MN1, MN2, the grid of PMOS pipe MP5 is connected with reference generating circuit, the source electrode of MP5 meets VDD, the drain electrode of NMOS pipe MN2 is received in the drain electrode of MP5, the source ground of NMOS pipe MN2, the grid of NMOS pipe MN2 connects the grid of NMOS pipe MN1, the drain electrode of NMOS pipe MN1 connects the drain electrode of PMOS pipe MP6, the grid of PMOS pipe MP6 is connected with reference generating circuit, PMOS pipe MP6 source electrode meets VDD, and PMOS pipe MP6 drain electrode is connected with reference voltage output circuit.
3. reference voltage source according to claim 1 and 2, it is characterized in that: described reference voltage output circuit is many-valued reference voltage output circuit, it comprises source follower Q5, divider resistance R4, R5, R6, the drain electrode of PMOS pipe MP6 in the base stage of source follower Q5 and the mirror current source feedback loop is connected, the collector of Q5 meets VDD, emitter connecting resistance R6 also draws reference voltage V 2 output terminals, the other end of resistance R 6 is connected with reference generating circuit with resistance R 5, and between resistance R 6 and R5, draw bandgap voltage reference VREF output terminal, the other end of resistance R 5 is connected with resistance R 4, and between resistance R 5 and R4, draw reference voltage V 1 output terminal, the other end ground connection of resistance R 4.
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