CN101835253B - UE (User Equipment) side uplink power control device and method in TD-SCDMA (Time Division-Synchronous Code Division Multiple Access) system - Google Patents

Abstract

The invention relates to UE (User Equipment) side uplink power control device and method in a TD-SCDMA (Time Division-Synchronous Code Division Multiple Access) system. The UE side uplink power control device comprises an interface module and an uplink power control processing module. The UE side uplink power control method comprises the following steps of: calculating open loop power PDPCH of each uplink time-slot code composite transmission channel CCTrCH of the current subframe when the uplink power control processing module controls the open loop power after receiving the power intensity of a received chip of a main public physical channel; regulating the transmitting power of a corresponding time slot in the next subframe according to the PDPCH; judging whether a downlink time-slot power control command is extracted or not; if so, entering closed-loop power control from the open-loop power control; calculating the closed-loop power of the uplink time slot CCTrCH; and regulating the transmitting power of the corresponding time slot in the next subframe according to the obtained closed-loop power. The invention not only reduces calculation amount, but also increases the power precision, thereby increasing the power control accuracy, improving the call quality and avoiding call drop.

Description

Device and method for UE side uplink power control in TD-SCDMA system

Technical Field

The present invention relates to a cdma system, and more particularly, to a device and method for implementing uplink power control at a UE (User Equipment) side in a TD-SCDMA (time Division-Synchronous Code Division Multiple Access) system.

Background

Power control is one of the most important requirements in cellular systems. In most systems, both the base station and the UE can dynamically adjust the power in real time, improving the performance of the system. The TD-SCDMA system is an interference limited system, and due to the near-far effect, the capacity of the TD-SCDMA system is mainly limited by the interference between the UEs in the system and the base station, so if the signal of each UE reaches the base station, the minimum signal-to-noise ratio required for ensuring the communication quality can be achieved and the system synchronization is maintained, the capacity of the TD-SCDMA system will be maximized.

The power control is a measure taken to overcome the near-far effect, and the measure is to change the transmitting power timely to compensate the path loss and fading in the wireless channel on the basis of evaluating the received signal strength or signal-to-noise ratio and other indexes at the end of the UE transmitter, thereby not only maintaining the communication quality, but also not generating additional interference to other users in the same wireless resource. In addition, power control allows the UE transmitter power to be reduced, thereby extending battery life.

Taking uplink closed-loop power control as an example, after receiving an uplink signal from the UE, the base station determines whether to increase or decrease the transmit power of the UE according to a set criterion, the base station transmits a corresponding power control command (TPC) generated by the base station to the UE through a downlink feedback channel, and the UE adjusts the transmit power of an uplink timeslot in a closed-loop power control process after receiving the TPC.

For the TD-SCDMA system, the necessary conditions for the uplink closed loop power control to work well are: the downlink feedback channel needs to maintain a certain communication quality. If the communication quality of the downlink feedback channel is reduced, the uplink closed-loop power control is affected and even fails.

Similarly, if the uplink transmission power of the UE is too low, uplink reception of the base station may be affected, so that the error rate is increased, and even reception fails; if the uplink transmission power of the UE is too high, the base station will interfere with the reception of other UEs, so that the signal-to-noise ratio of other users is reduced, and other users also need to increase the transmission power. Therefore, reasonable transmission power of the UE is important for improving system performance.

The 3GPP power control is separated into two parts of ring power control and closed-loop power control. The power calculation in the open-loop power control is a complex process, and particularly when different coded transmission channels of different services (including HSDPA (High Speed Downlink packet Access)) are involved, the power calculation is complex, and different calculation methods are adopted, which greatly affects the performance of the system.

Disclosure of Invention

The technical problem to be solved by the present invention is to provide a device and method for realizing UE side uplink power control in TD-SCDMA system. The invention can improve the accuracy of open-loop power control and the call quality, avoid call drop and simultaneously provide a solution for uplink power control of a multi-coding combined channel.

The invention discloses a device for realizing UE side uplink power control in a TD-SCDMA system, which comprises an interface module and an uplink power control processing module

The interface module is used for receiving downlink dedicated physical channel DPCH configuration, uplink dedicated physical channel configuration and receiving chip power strength RSCP of primary common physical channel PCCPCH issued by an upper layer_PCCPCHAnd forwarding to the uplink power control processing module;

the uplink power control processing module is used for receiving RSCP_PCCPCHTime-starting open-loop power control for extracting the lower of the configuration when receiving the DPCH configurationA power control command TPC of the downlink time slot is used for switching from open-loop power control to closed-loop power control when the TPC of the downlink time slot is extracted; the open loop/closed loop power used for calculating each up time slot coding composite transmission channel CCTrCH; for adjusting the transmission power of each uplink time slot in the next sub-frame.

The interface module comprises an upper layer interface sub-module and a measurement interface sub-module

An upper layer interface submodule: the uplink power control processing module is used for receiving DPCH configuration and uplink dedicated physical channel configuration sent by an upper layer and forwarding the DPCH configuration and the uplink dedicated physical channel configuration to the uplink power control processing module;

the measurement interface sub-module: for receiving RSCP_PCCPCHAnd forwards the uplink power control processing module.

The uplink power control processing module comprises an open-loop power control submodule, a TPC extraction numbering submodule and a closed-loop power control submodule, wherein the open-loop power control submodule, the TPC extraction numbering submodule and the closed-loop power control submodule are arranged in the uplink power control processing module

An open-loop power control submodule for receiving RSCP forwarded by the measurement interface module_PCCPCHOpen loop power control is started in time and is used for calculating open loop power of each uplink time slot CCTrCH; the transmitting power of each uplink time slot in the next sub-frame is adjusted according to the open loop power of each uplink time slot CCTrCH;

a TPC extraction numbering sub-module, configured to extract a downlink timeslot TPC in the configuration when receiving the DPCH configuration forwarded by the upper interface module, and number the downlink timeslot TPC according to a corresponding subframe number and a channel number of the subframe when extracting the downlink timeslot TPC, and configured to send the numbered downlink timeslot TPC to the closed-loop power control sub-module;

the closed-loop power control submodule is used for starting closed-loop power control when receiving a downlink time slot TPC, mapping the downlink time slot TPC to an uplink time slot and calculating the closed-loop power of each uplink time slot CCTrCH; and the power control symbol is used for calculating the power control symbol of each uplink time slot, judging the positive and negative of the power control symbol, and adjusting the transmitting power of each uplink time slot in the next subframe according to the judgment result and the closed loop power of each uplink time slot CCTrCH.

The uplink power control processing module further comprises a path loss calculation submodule, a spreading factor gain calculation submodule, a CCTrCH gain calculation submodule and a power summation submodule, wherein the CCTrCH gain calculation submodule comprises a CCTrCH gain calculation submodule and a CCTrCH gain calculation submodule

A path loss calculation submodule for calculating a path loss according to RSCP_PCCPCHAnd the transmission power P of the main common physical channel in the uplink dedicated physical channel configuration_PCCPCHCalculating path loss L of a wireless link_PCCPCH；

A spreading factor gain calculation submodule for calculating a spreading factor gain of 10 log [ (gamma)₁ ²+γ₂ ²)*16]；

A code combining gain calculation submodule for calculating a code combining gain of 10 × log [ beta ]_j ²]；

And the power summation submodule is used for calculating the open-loop/closed-loop power sum of the CCTrCH when at least two CCTrCHs exist in the uplink time slot.

The closed-loop power control sub-module comprises a TPC mapping module, and the TPC mapping module is used for mapping the received downlink time slot TPC to the uplink time slot.

The invention also discloses a method for realizing the uplink power control of the UE side in the TD-SCDMA system, which comprises the following steps:

the uplink power control processing module receives RSCP forwarded by the interface module_PCCPCHThen, open-loop power control is carried out, and the open-loop power P of each uplink time slot CCTrCH of the current subframe is calculated by adopting the following formula_DPCH：

$P_{\mathrm{DPCH}}={\mathrm{PRX}}_{\mathrm{DPCHdes}}+L_{\mathrm{PCCPCH}}+10*\log [({\mathrm{\γ}}_1^2+{\mathrm{\γ}}_2^2)*16]+10*\log \left[{\mathrm{\β}}_j^2\right]$

Wherein, PRX_DPCHdesThe transmission power of the uplink dedicated physical channel expected by the base station;

and according to P_DPCHAdjusting the transmitting power of the corresponding time slot in the next subframe; and simultaneously judging whether a downlink time slot TPC is extracted from the DPCH configuration forwarded by the interface module, if so, entering closed-loop power control from open-loop power control, calculating the closed-loop power of the CCTrCH (channel state channel) of the uplink time slot, and adjusting the transmitting power of the corresponding time slot in the next subframe according to the obtained closed-loop power.

After the power control module enters open-loop power control, 10 × log [ (gamma) is calculated firstly₁ ²+γ₂ ²)*16]、10*log[β_j ² ]And according to RSCP_PCCPCHAnd P_PCCPCHCalculating L_PCCPCHThe value of (c).

When the method is used for open-loop power control, if only one CCTrCH exists in the uplink time slot, the transmitting power value of the uplink time slot in the next subframe is the open-loop power value of the CCTrCH; if at least two CCTrCHs exist in the uplink time slot, the transmitting power value of the uplink time slot in the next subframe is the power sum P of all CCTrCH open loop powers; the power sum P is obtained by the following method:

step a: finding the maximum P among the open-loop powers of all CCTrCHs_maxAnd a minimum value P_min；

Step b: calculating the P_maxAnd P_minThe difference Pi of (d);

step c: comparing the magnitude of the Pi with a preset threshold value, and if the Pi is larger than or equal to the threshold value, P is equal to P_max(ii) a Otherwise, P ═ P_max+100*log(1+1/(10^(Pi/100)))。

After the uplink power control processing module switches to closed-loop power control, the following steps are specifically executed:

step A: numbering the extracted downlink time slot TPC according to the current subframe number and the code channel number of the subframe and mapping the downlink time slot TPC to an uplink time slot;

and B: calculating the power control coincidence of the uplink time slot CCTrCH, if the power control coincidence is positive, the transmitting power value of the uplink time slot in the next frame is the CCTrCH closed-loop power value plus the power adjustment step length; if the transmission power value of the uplink time slot in the next frame is negative, the transmission power value of the uplink time slot in the next frame is the CCTrCH closed-loop power value minus the power adjustment step length; and if the transmission power value of the uplink time slot in the next frame is zero, the transmission power value of the uplink time slot in the next frame is the CCTrCH closed-loop power value.

The method for calculating the closed loop power of the uplink time slot CCTrCH is the same as the method for calculating the open loop power of the uplink time slot CCTrCH.

If at least two CCTrCHs exist in the uplink time slot, the transmitting power value of the uplink time slot in the next subframe is the power sum of all CCTrCH closed-loop powers of the corresponding time slot, or the power sum of all CCTrCH closed-loop powers of the corresponding time slot is the power sum of the CCTrCH closed-loop powers and the power adding/subtracting adjustment step length, and the calculation method of the power sum of the CCTrCH closed-loop powers is the same as the power sum of the open-loop powers.

The invention considers the influence of the uplink special physical channel configuration on the power control effect during the open loop power calculation, namely, the power is subjected to gain adjustment, thereby not only reducing the calculation amount, but also improving the power precision, further improving the accuracy of power control, improving the quality of conversation and avoiding call drop. The method of the invention is also suitable for the power adjustment of multi CCTrCHs including HSDPA and HSUPA.

Drawings

FIG. 1 is a schematic block diagram of the apparatus of the present invention;

FIG. 2 is an overall flow diagram of the method of the present invention;

FIG. 3 is a flow chart of open loop power control in the present invention;

fig. 4 is a flow chart of closed loop power control in the present invention.

Detailed Description

The invention is described in further detail below with reference to the accompanying drawings and preferred embodiments:

as shown in fig. 1, the schematic diagram of the uplink power control device at the UE side in the TD-SCDMA system according to the present invention is shown, where the uplink power control device includes an interface module and an uplink power control processing module, where the interface module includes an upper interface sub-module and a measurement interface sub-module; the uplink power control processing module comprises an open-loop power control submodule, a TPC extraction numbering submodule, a closed-loop power control submodule, a path loss calculation submodule, a spread spectrum factor gain calculation submodule, a coding combination gain calculation submodule and a power summation submodule; wherein,

the upper layer interface sub-module is used for receiving DPCH configuration and uplink dedicated physical channel configuration sent by the upper layer and forwarding the DPCH configuration and the uplink dedicated physical channel configuration to the uplink power control processing module;

the measurement interface sub-module: for receiving RSCP_PCCPCHAnd forwarding to the uplink power control processing module;

an open-loop power control submodule for receiving RSCP forwarded by the measurement interface module_PCCPCHOpen loop power control is started in time and is used for calculating open loop power of each uplink time slot CCTrCH; for open loop power according to each uplink time slot CCTrCHAdjusting the transmitting power of each uplink time slot in the next subframe;

a TPC extraction numbering submodule, configured to extract a downlink time slot TPC in a DPCH configuration forwarded by an upper interface module when the configuration is received, and number the downlink time slot TPC according to a corresponding subframe number and a channel number of the subframe when the downlink time slot TPC is extracted, and configured to send the numbered downlink time slot TPC to a closed-loop power control submodule;

the closed-loop power control submodule is used for starting closed-loop power control when receiving a downlink time slot TPC, mapping the downlink time slot TPC to an uplink time slot and calculating the closed-loop power of each uplink time slot CCTrCH; the system is used for calculating the power control symbol of each uplink time slot according to a majority theorem, judging the positive and negative of the power control symbol, and adjusting the transmitting power of each uplink time slot in the next subframe according to the judgment result and the closed loop power of each uplink time slot CCTrCH; the module comprises a TPC mapping module for mapping the received downlink time slot TPC to the corresponding uplink time slot according to the principle of section 5A2.2.2 of the GPP (3rd generation Partnership Project) specification 25.221;

a path loss calculation submodule for calculating a path loss according to RSCP_PCCPCHAnd the transmission power P of the main common physical channel in the uplink dedicated physical channel configuration_PCCPCHCalculating path loss L of a wireless link_PCCPCH；

A spreading factor gain calculation submodule for calculating a spreading factor gain of 10 log [ (gamma)₁ ²+γ₂ ²)*16]；

A code combining gain calculation submodule for calculating a code combining gain of 10 × log [ beta ]_j ²]；

And the power summation submodule is used for calculating the power sum of the open-loop/closed-loop power of the CCTrCH when at least two CCTrCHs exist in the uplink time slot.

Fig. 2 is a flowchart illustrating an overall method for implementing uplink power control at UE side in TD-SCDMA system according to the present invention; in this embodiment, assuming that there is only one CCTrCH in each uplink timeslot, the method specifically includes the following steps:

step 201: if the upper layer interface sub-module of the interface module receives the DPCH configuration (including the uplink time slot number, whether the time slot has the TPC symbol, the number of the TPC symbols, and the PRX) issued by the upper layer_DPCHdes、P_PCCPCHThe uplink power control step length (Pstep _ ul), the spreading factor), the uplink dedicated physical channel configuration (including: the number of transmission channels, the static parameters of the transmission channels (including rate matching attribute, cyclic redundancy size, and number of dynamic transmission formats), the dynamic parameters of the transmission channels (transmission block number, transmission block size), the corresponding relationship between the transmission coding combination and the transmission channel coding index, including the corresponding relationship between beta and beta_j) If the currently sent data configuration (transport format combination indication, transport channel number, number of transport blocks, size of transport block, etc.), forwarding the currently sent data configuration to the uplink power control processing module; if the measuring interface sub-module of the interface module receives RSCP_PCCPCHThen forwarding to the uplink power control processing module;

step 202: if the uplink power control processing module receives RSCP_PCCPCHIf yes, the open-loop power control submodule of the uplink power control processing module starts open-loop power control;

step 203: the open-loop power control sub-module calculates the open-loop power P of each uplink time slot CCTrCH of the current sub-frame according to the calculation results of the path loss calculation sub-module, the spread spectrum factor gain calculation sub-module and the coding combination gain calculation sub-module_DPCHAccording to P_DPCHAdjusting the transmitting power of the corresponding time slot in the next subframe; meanwhile, the TPC extraction numbering submodule extracts a downlink time slot TPC from DPCH configuration, and if the TPC is extracted, the step 204 is executed; otherwise, continue to step 203;

the transmitting power of the corresponding uplink time slot in the next frame is the open loop power of the CCTrCH;

step 204: numbering the downlink time slot TPC, and then sending the downlink time slot TPC to a closed-loop power control submodule;

step 205: after receiving the downlink time slot TPC, the closed-loop power control submodule starts closed-loop power control;

step 206: mapping the downlink time slots TPC to corresponding uplink time slots according to the principles of section 5A2.2.2 of GPP (3rd generation partnership Project) specification 25.221;

step 207: calculating the closed loop power of the uplink time slot CCTrCH;

the calculation method is the same as in open loop.

Step 208: calculating a power control symbol TPC (i, n) of the uplink time slot according to a majority theorem;

TPC (i, n) represents TPC mapped from TPC of a downlink n-2 subframe to the ith slot of an uplink nth subframe;

step 209: judging the positive and negative of TPC (i, n), if so, executing step 210; if negative, go to step 211; if 0, go to step 212;

step 210: the CCTrCH closed loop power value plus the power adjustment step length is taken as the transmission power value of the corresponding uplink time slot in the next frame;

step 211: the CCTrCH closed loop power value minus the power adjustment step length is used as the transmission power value of the corresponding uplink time slot in the next frame;

step 212: the CCTrCH closed-loop power value is the transmit power value for the next frame for the corresponding uplink timeslot.

As shown in fig. 3, it is a flow chart of open-loop power control when there are multiple cctrchs in the current uplink timeslot in the method of the present invention; the method specifically comprises the following steps:

step 301: according to RSCP_PCCPCHAnd P_PCCPCHCalculating L_PCCPCH；

L_PCCPCH＝P_PCCPCH-RSCP_PCCPCH

Step 302: calculate the initial of each CCTrCHOpen loop power P_{DPCH_1}；

P_{DPCH_1}＝PRX_DPCHdes+L_PCCPCH

Step 303: calculate 10 log [ (gamma.)₁ ²+γ₂ ²)*16]And the influence on the initial open loop power to obtain the intermediate power P_{DPCH_2}；

$P_{\mathrm{DPCH}\_2}=P_{\mathrm{DPCH}\_1}+10*\log [({\mathrm{\γ}}_1^2+{\mathrm{\γ}}_2^2)*16]$

Step 304: calculate 10 × log [ beta ]_j ²]And influence on initial open loop power to obtain open loop power P of CCTrCH_DPCH；

P_DPCH＝P_{DPCH_2}+10*log[β_j ²]

Step 305: calculating the power sum of the open loop power of the CCTrCH;

step 306: and adjusting the transmission power of the current time slot in the next frame according to the power sum.

In the closed-loop power control, if a plurality of cctrchs also exist in a certain uplink timeslot, the closed-loop power calculation method is the same as that in the open-loop power control, and will not be described again here.

As shown in fig. 4, a flowchart of calculating CCTrCH power and P in the present invention includes:

step 401: finding the maximum P of the open/closed loop power of all CCTrCHs_maxAnd a minimum value P_min；

Step 402: calculating the P_maxAnd P_minThe difference Pi of (d);

step 403: comparing the Pi with a preset threshold value of 100, and if the Pi is greater than or equal to 100, executing step 404; otherwise, go to step 405;

step 404: p ═ P_max；

Step 405: p ═ P_max+100*log(1+1/(10^(Pi/100)))。

In this case, if the uplink subframe is performing open-loop power control, the transmit power of the uplink subframe in the next frame is the sum of the powers of all CCTrCH open-loop powers; if the uplink sub-frame is performing closed-loop power control, the transmission power of the uplink sub-frame in the next frame is the power of all CCTrCH open-loop power and the power adjustment step length of addition/subtraction (determined according to the power control symbol).

The following is a specific example, assuming:

the downlink physical channel has 3 time slots, which are respectively: time slot 4, time slot 5 and time slot 6, each time slot has 2 channelization codes of 0 and 1, γ corresponding to the channelization codes is 16, and 1 TPC is located on channelization code 0.

The uplink physical channel has 2 time slots, which are respectively: time slot 1 and time slot 2, time slot 1 has a physical channel, channelization code is 0, spreading factor is 8; slot 2 has a physical channel with channelization code 0 and spreading factor 16.

P_PCCPCH6dbm, maximum power of the UE: p_UE＝24dbm，PRX_DPCHdes＝-69dbm，Pstep_ul＝1db，β＝7。

Let RSCP be set_PCCPCH-65dbm, then:

L_PCCPCH＝P_PCCPCH-RSCP_PCCPCH

＝6-(-65)＝70(dbm)

P_{DPCH_1}＝PRX_DPCHdes+L_PCCPCH

＝-69+70＝1dbm

since the spreading factor of slot 1 is 8, as known from 3GPP protocol 25223, $\mathrm{\γ}=\sqrt{2}/4,$ therefore, it is

$P_{\mathrm{DPCH}\_21}=P_{\mathrm{DPCH}\_1}+10*\log [({\mathrm{\γ}}_1^2+{\mathrm{\γ}}_2^2)*16]$

$=1+10*\log [{(\sqrt{2}/4)}^2*16]$

$=1+3=4\left(\mathrm{dbm}\right)$

Since the spreading factor of timeslot 2 is 16, as known from the 3GPP protocol 25223, γ is 1/4, so

$P_{\mathrm{DPCH}\_22}=P_{\mathrm{DPCH}\_1}+10*\log [({\mathrm{\γ}}_1^2+{\mathrm{\γ}}_2^2)*16]$

$=1+10*\log [{(1/4)}^2*16]$

$=1+0=1\left(\mathrm{dbm}\right)$

When β is 7, β can be found by looking up the 3GPP protocol 25223_j8/8, so for time slot 1, P_DPCH1＝P_{DPCH_21}+10*log[β_j ²]

＝4+10*log[(8/8)^2]

＝4(dbm)

For time slot 2, P_DPCH2＝P_{DPCH_22}+10*log[β_j ²]

＝1+10*log[(8/8)^2]

＝1(dbm)

That is, the open loop power of the time slot 1 is 4dbm, and the open loop power of the time slot 2 is 1 dbm; suppose that no TPC for the downlink slot is received from subframe 1 to subframe 56, and RSCP is received from subframe 1 to 56_PCCPCHAnd if not, the transmission power of the slot 1 is 4dbm and the transmission power of the slot 2 is 1dbm from the subframe 1 to the subframe 56.

And if the TPC of the downlink time slot is received in the subframe 57, the closed-loop power control is started, the closed-loop power is calculated, and the beta value is set to be unchanged.

Because the TPC has 2 sub-frame delays to the uplink power, the transmitting power in the sub-frames 57 and 58 is consistent with the open loop transmitting power, namely, the transmitting power of the time slot 1 is 4dbm and the transmitting power of the time slot 2 is 1dbm when the sub-frames 57 and 58 are in the open loop transmitting power;

the TPC bits received in the 57 subframe, slot 4, slot 5, and slot 6 are: -1, -1,1,

in 58 subframes, slot 4, slot 5, and slot 6, the received TPCs are: -1,1,1,

according to the mapping relationship of the protocol,

59 sub-frame, the up time slot 1 corresponds to 57 sub-frame down time slot 4, TPC of time slot 5, is-1, -1;

the uplink time slot 2 corresponds to TPC of the downlink time slot 4 of the 57 subframes, and the power control is in accordance with-1;

60 subframes, wherein the uplink time slot 1 corresponds to TPC of the downlink time slot 4 of the 58 subframes, and the power control is in accordance with-1;

the uplink time slot 2 corresponds to the TPC of the downlink time slot 6 of the 58 subframes, and the power control symbol is 1;

by using a large number calculation method, then

In 59 frames, the timeslot 1 is decreased by 1 power control step (assuming that the power control step is 1dbm), and the timeslot 2 is increased by 1 power control step, at this time

The closed loop power of slot 1 is 4-1-3 (dbm),

closed loop power of time slot 2 ═ 1+1 ═ 2(dbm)

In 60 sub-frames, the time slot 1 is decreased by 1 power control step length, and the time slot 2 is increased by 1 power control step length

Closed loop power of time slot 1-3-1-2 (dbm)

Closed loop power of time slot 2+1 3(dbm)

And in addition, assuming that the time slot 1 also has an uplink control channel corresponding to high-speed service, the channelization code is 2, and the spreading factor is 16, the transmission power is 3dbm in the 59 th subframe, and is 3dbm in the 60 th subframe.

Then at the 59 th, 60 th sub-frame, slot 1 has 2 cctrchs to transmit, which need to be summed, then:

59 subframe power is summed as follows:

maximum values were taken for 2 cctrchs: pmax ═ max (3, 3) ═ 3

Take the minimum for 2 CCTRCHs: pmin min (3, 3) 3

And (3) calculating the difference between the maximum value and the minimum value: pi is Pmax-Pmin is 3-3 is 0,

since Pi is less than 100, P ═ P_max+100*log(1+1/(10^(Pi/100)))

＝3+100*log(1+1/(10^(0/100)))

＝3+3＝6(dbm)

The 60 subframe power sums as follows:

maximum for 2 CCTRCHs: pmax (2, 3) is 3

Take the minimum for 2 CCTRCHs: pmin min (2, 3) 2

And (3) calculating the difference between the maximum value and the minimum value: pi is Pmax-Pmin is 3-2 is 1

Since Pi is less than 100, P ═ P_max+100*log(1+1/(10^(Pi/100)))

＝3+100*log(1+1/(10^(1/100)))

＝3+2.5＝5.5(dbm)

In the 60 th sub-frame, decimal fraction appears in the power calculation, and the protocol is required to be accurate to 0.5db, so that the power calculation is enlarged by 10 times, and the accuracy is not influenced.

The above description is only for the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. It should be understood that those skilled in the art to which the invention pertains may make corresponding changes or substitutions according to the technical solutions and concepts of the present invention, and all such changes or substitutions shall fall within the protection scope of the appended claims.

Claims (11)

1. A device for realizing UE side uplink power control in TD-SCDMA system is characterized in that the device comprises an interface module and an uplink power control processing module, the device comprises a control module, a control module and a control module

The interface module is used for receiving downlink dedicated physical channel DPCH configuration, uplink dedicated physical channel configuration and receiving chip power strength RSCP of primary common physical channel PCCPCH issued by an upper layer_PCCPCHAnd forwarding to the uplink power control processing module;

the uplink power control processing module is used for receiving RSCP_PCCPCHTime-starting open-loop power control, usingWhen receiving DPCH configuration, extracting a downlink time slot power control command TPC in the configuration, and switching from open-loop power control to closed-loop power control when extracting the downlink time slot TPC; the open loop/closed loop power used for calculating each up time slot coding composite transmission channel CCTrCH; for adjusting the transmission power of each uplink time slot in the next sub-frame.

2. The apparatus of claim 1, wherein the interface module comprises an upper interface sub-module and a measurement interface sub-module, and the interface module comprises the upper interface sub-module and the measurement interface sub-module

An upper layer interface submodule: the uplink power control processing module is used for receiving DPCH configuration and uplink dedicated physical channel configuration sent by an upper layer and forwarding the DPCH configuration and the uplink dedicated physical channel configuration to the uplink power control processing module;

the measurement interface sub-module: for receiving RSCP_PCCPCHAnd forwards the uplink power control processing module.

3. The apparatus of claim 2, wherein the uplink power control processing module comprises an open-loop power control sub-module, a TPC extraction numbering sub-module, and a closed-loop power control sub-module, and wherein the TPC extraction numbering sub-module is configured to perform the TPC operation on the UE side in the TD-SCDMA system

An open-loop power control submodule for receiving RSCP forwarded by the measurement interface submodule_PCCPCHOpen loop power control is started in time and is used for calculating open loop power of each uplink time slot CCTrCH; the transmitting power of each uplink time slot in the next sub-frame is adjusted according to the open loop power of each uplink time slot CCTrCH;

a TPC extraction numbering submodule, configured to extract a downlink time slot TPC in the configuration when receiving the DPCH configuration forwarded by the upper interface submodule, and number the downlink time slot TPC according to a corresponding subframe number and a channel number of the subframe when the downlink time slot TPC is extracted, and configured to send the numbered downlink time slot TPC to the closed-loop power control submodule;

the closed-loop power control submodule is used for starting closed-loop power control when receiving a downlink time slot TPC, mapping the downlink time slot TPC to an uplink time slot and calculating the closed-loop power of each uplink time slot CCTrCH; and the power control symbol is used for calculating the power control symbol of each uplink time slot, judging the positive and negative of the power control symbol, and adjusting the transmitting power of each uplink time slot in the next subframe according to the judgment result and the closed loop power of each uplink time slot CCTrCH.

4. The apparatus of claim 3, wherein the uplink power control processing module further comprises a path loss calculation sub-module, a spreading factor gain calculation sub-module, a coding combination gain calculation sub-module, and a power summation sub-module, wherein the uplink power control processing module further comprises a spreading factor gain calculation sub-module, a coding combination gain calculation sub-module, and a power summation sub-module, and wherein the uplink power control processing module further comprises a power summation sub-module

A path loss calculation submodule for calculating a path loss according to RSCP_PCCPCHAnd the transmission power P of the main common physical channel in the uplink dedicated physical channel configuration_PCCPCHCalculating path loss L of a wireless link_PCCPCH；

A spreading factor gain calculation sub-module for calculating a spreading factor gainThe gamma is₁And gamma₂Is a weighting factor; the weighting factor gamma₁、γ₂The value of (c) is determined by the spreading factor on the corresponding DPCH;

a coding combination gain calculation sub-module for calculating coding combination gain

Beta is the same as_jA gain factor for a jth transport format;

and the power summation submodule is used for calculating the open-loop/closed-loop power sum of the CCTrCH when at least two CCTrCHs exist in the uplink time slot.

5. The apparatus of claim 3 for implementing uplink power control on UE side in TD-SCDMA system, wherein the closed loop power control sub-module includes a TPC mapping module, and the TPC mapping module is used for mapping the received downlink time slot TPC to the uplink time slot.

6. A method for realizing UE side uplink power control in TD-SCDMA system is characterized in that the method comprises the following steps:

the uplink power control processing module receives the received chip power strength RSCP forwarded by the interface module_PCCPCHThen, open-loop power control is carried out, and the open-loop power P of each uplink time slot CCTrCH of the current subframe is calculated by adopting the following formula_DPCH：

$P_{\mathrm{DPCH}}={\mathrm{PRX}}_{\mathrm{DPCHdes}}+L_{\mathrm{PCCPCH}}+10*\log [({\mathrm{\γ}}_1^2+{\mathrm{\γ}}_2^2)*16]+10*\log \left[{\mathrm{\β}}_j^2\right]$

Wherein, PRX_DPCHdesFor the transmit power of the uplink dedicated physical channel desired by the base station, said L_PCCPCHFor the path loss of the radio link, said β_jThe gain factor for the jth transport format, said γ₁And gamma₂As a weighting factor, said weighting factor γ₁、γ₂The value of (c) is determined by the spreading factor on the corresponding DPCH;

and according to P_DPCHAdjusting the transmitting power of the corresponding time slot in the next subframe; meanwhile, whether a downlink time slot TPC is extracted from the DPCH configuration forwarded by the interface module is judged, if yes, the open-loop power control enters the closed-loop power control, and the uplink time slot TPC is calculatedAnd the closed loop power of the CCTrCH adjusts the transmitting power of the corresponding time slot in the next subframe according to the obtained closed loop power.

7. The method of claim 6 for implementing UE side uplink power control in TD-SCDMA system, wherein the uplink power control processing module firstly calculates after entering open loop power control $10*\log [({\mathrm{\γ}}_1^2+{\mathrm{\γ}}_2^2)*16],10*\log \left[{\mathrm{\β}}_j^2\right]$ And according to RSCP_PCCPCHAnd P_PCCPCHCalculating L_PCCPCHThe value of (c).

8. The method of claim 6 for implementing UE side uplink power control in TD-SCDMA system, wherein when performing open loop power control, if there is only one CCTrCH in the uplink timeslot, the transmission power value of the uplink timeslot in the next subframe is the open loop power value of the CCTrCH; if at least two CCTrCHs exist in the uplink time slot, the transmitting power value of the uplink time slot in the next subframe is the power sum P of all CCTrCH open loop powers; the power sum P is obtained by the following method:

step a: finding the maximum P among the open-loop powers of all CCTrCHs_maxAnd a minimum value P_min；

Step b: calculating the P_maxAnd P_minThe difference Pi of (d);

step c: comparing the magnitude of the Pi with a preset threshold value, and if the Pi is larger than or equal to the threshold value, P is equal to P_max(ii) a If not, then,P＝P_max+100*log(1+1/(10^(Pi/100)))。

9. the method of claim 6, wherein after the uplink power control processing module switches to closed-loop power control, the following steps are specifically executed:

step A: numbering the extracted downlink time slot TPC according to the current subframe number and the code channel number of the subframe and mapping the downlink time slot TPC to an uplink time slot;

and B: calculating the power control coincidence of the uplink time slot CCTrCH, if the power control coincidence is positive, the transmitting power value of the uplink time slot in the next frame is the CCTrCH closed-loop power value plus the power adjustment step length; if the transmission power value of the uplink time slot in the next frame is negative, the transmission power value of the uplink time slot in the next frame is the CCTrCH closed-loop power value minus the power adjustment step length; and if the transmission power value of the uplink time slot in the next frame is zero, the transmission power value of the uplink time slot in the next frame is the CCTrCH closed-loop power value.

10. The method of claim 6 or 9 for implementing UE-side uplink power control in TD-SCDMA system, wherein the method for calculating the closed loop power of the uplink timeslot CCTrCH is the same as the method for calculating the open loop power thereof.

11. The method of claim 9 for implementing UE-side uplink power control in TD-SCDMA system, wherein if there are at least two cctrchs in the uplink timeslot, the transmit power value of the uplink timeslot in the next subframe is the power sum of all closed loop powers of the CCTrCH in the corresponding timeslot, or the power sum of all closed loop powers of the CCTrCH in the corresponding timeslot is the power sum of the add/subtract power adjustment step length, and the calculation method for the power sum of the closed loop powers of the CCTrCH is the same as the power sum of the open loop powers thereof.

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