CN101800084A - Data protection method of programmable device based on cyclic redundancy check - Google Patents
Data protection method of programmable device based on cyclic redundancy check Download PDFInfo
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- CN101800084A CN101800084A CN200910046015A CN200910046015A CN101800084A CN 101800084 A CN101800084 A CN 101800084A CN 200910046015 A CN200910046015 A CN 200910046015A CN 200910046015 A CN200910046015 A CN 200910046015A CN 101800084 A CN101800084 A CN 101800084A
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Abstract
The invention discloses a data protection method of a programmable device based on cyclic redundancy check. The method comprises the following steps of: performing calculation of the cyclic redundancy check when data in the programmable device is stored every time, and storing the new cyclic redundancy check code into the programmable device to substitute the original cyclic redundancy check code; and performing the calculation of the cyclic redundancy check once when the data in the programmable device is read, comparing the calculated check code with the previously stored check code, and proving that the data is valid if the calculated check code is identical to the previously stored check code, and otherwise, the data is invalid. The invention can effectively improve the data accuracy of the programmable device as the data of the programmable device is verified based on the cyclic redundancy check.
Description
Technical field
The present invention relates to a kind of data guard method of programming device, be specifically related to a kind of data guard method of the programming device based on cyclic redundancy check (CRC).
Background technology
Cyclic redundancy check (CRC) (sign indicating number) (Cyclic Redundancy Check (Code) abbreviates CRC as) is a class important linear block code, and the Code And Decode method is simple, and the EDC error detection and correction ability is strong, is widely used for realizing Error Control in the communications field.
Programming device (Programmable Read-Only Memory, abbreviate PROM as), main product is to adopt double-deck grid (two layers of poly) structure, erasable and programable memory (Erasable Programmable Read-Only Memory is wherein arranged, abbreviate EPROM as) and EEPROM (Electrically Erasable Programmable Read Only Memo) (Electrically Erasable Programmable Read-OnlyMemory abbreviates EEPROM as) etc.EEPROM is the storage chip that data are not lost after a kind of power down, can wipe existing information, reprogramming on specialized equipment.Generally be used in some electronic products, be used for depositing some the important information of product and the parameter of equipment; Prevent that under unexpected situation takes place during as unexpected generations such as product power down, some important informations of product are also preserved to some extent.
EPROM is identical substantially with the EEPROM principle of work, and primary structure as shown in Figure 1.
When not having electronics to inject in the floating boom, when the control gate making alive, the electronics in the floating boom is gone to the upper strata, and the hole appears in lower floor.Because induction just can attract electronics, and open raceway groove.When if the injection of electronics is arranged in the floating boom, i.e. the threshold voltage of the pipe of Jia Daing, raceway groove is in closed condition.So just reached switching function.
The ablation process of EEPROM is to have utilized tunnel effect, and promptly energy can pass through potential barrier arrival another side less than the electronics of energy barrier.Quantum mechanics thinks that electronics will present undulatory property when physical size is suitable with the electronics free path, is exactly here to show little that object will be enough.With regard to PN junction, when the impurity concentration of P and N reaches certain level, and space charge is when few, and electronics will move to conduction band because of tunnel effect.The energy of electronics is in certain rank and allows other scope of level to be called " band ", and lower being with is called valence band, and higher being with is called conduction band.Just can move freely between atom when electronics arrives higher conduction band, this motion is exactly an electric current.The EEPROM ablation process as shown in Figure 2, according to tunnel effect, surrounds the SiO of floating boom
2, must be as thin as a wafer to reduce potential barrier.Source-drain electrode ground connection is in conducting state.On control gate, apply the high pressure that is higher than threshold voltage,, attract electronics to pass through to reduce electric field action.
Reach the requirement of cancellation electronics, EEPROM also reaches by tunnel effect.As shown in Figure 3, add high pressure in drain electrode, control gate is 0V, and the upset direction of pull is pulled out electronics from floating boom.This action if control badly, the result of cancellation can occur.
Because wiping of EEPROM need be by means of miscellaneous equipment, it revises its content with electronic signal, and be to be minimal modifications unit with byte (Byte), will data all not wash off just and can write, thoroughly broken away from the constraint of EPROM eraser and programmable device.EEPROM still will utilize certain program voltage just the content in the corresponding address can be made modification when writing data.
Now increasing electronic product all is implanted into EEPROM in the hardware circuit of oneself, stores some important product informations and some hardware parameters.And these data all can have very big influence to our product in case mistake occurs, also can bring very big hidden danger sometimes.Just even more important for automobile product, therefore the data protection to programming device needs further research.
Summary of the invention
Technical matters to be solved by this invention provides a kind of data guard method of the programming device based on cyclic redundancy check (CRC), and it can improve the data accuracy of programming device.
In order to solve above technical matters, the invention provides a kind of data guard method of the programming device based on cyclic redundancy check (CRC), comprise: when storing the data in the programming device at every turn, carrying out a cyclic redundancy check (CRC) calculates, new cyclic redundancy check (CRC) code is deposited in the programming device, substitutes original cyclic redundancy check (CRC) code; When reading the data in the programming device at every turn, also carry out cyclic redundancy check (CRC) and calculate, check code that calculates and the check code that had before deposited in are compared, identically prove that then data are effective, difference proves that then data are invalid.
Because the present invention uses based on cyclic redundancy check (CRC) the data of programming device are verified, can effectively improve the data accuracy of programming device.
Description of drawings
Below in conjunction with the drawings and specific embodiments the present invention is described in further detail.
Fig. 1 is that programming device adopts double-deck grid (two layers of Poly) structural representation;
Fig. 2 is the ablation process of EEPROM;
Fig. 3 is the process of cancellation electronics;
Fig. 4 is based on the process flow diagram of data guard method of the programming device of cyclic redundancy check (CRC).
Embodiment
As shown in Figure 4, the data guard method of the programming device based on cyclic redundancy check (CRC) of the present invention, comprise: when storing the data in the programming device at every turn, carrying out a cyclic redundancy check (CRC) calculates, new cyclic redundancy check (CRC) code is deposited in the programming device, substitutes original cyclic redundancy check (CRC) code; When reading the data in the programming device at every turn, also carry out cyclic redundancy check (CRC) and calculate, check code that calculates and the check code that had before deposited in are compared, identically prove that then data are effective, difference proves that then data are invalid.
Embodiment one
CRC calculates with common division calculation different.Common division calculation is that borrow is subtracted each other, and it then is XOR that CRC calculates.Any one division arithmetic all needs to choose a divisor, and we are referred to as poly in the CRC computing, and width W is exactly the position of poly most significant digit.W such as poly 1001 is 3, rather than 4.Note most significant digit always 1, when your selected width, you only need to select low everybody value of W so.If we want to calculate the CRC sign indicating number of a bit string, and will guarantee that each is all processed, so we need add W individual 0 in target bit string back.Illustrate the process of CRC algorithm below.
In this example, we suppose that bit string is 110101101.
Poly=10011 (width W=4)
The bit string end increases W 0 back=110,101,101 0000
10011/1101011010000/110000101 (we are indifferent to the merchant of this computing)
10011||||||||
-----||||||||
10011|||||||
10011|||||||
-----|||||||
00001||||||
00000||||||
-----||||||
00010|||||
00000|||||
-----|||||
00101||||
00000||||
-----||||
01010|||
00000|||
-----|||
10100||
10011||
-----||
01110|
00000|
-----|
11100
10011
-----
1111->remainder->the CRC sign indicating number
Computation process is summarized as follows:
1. having only the most significant digit when bit string is 1, and we just do XOR (XOR) computing with it and poly, otherwise we just move to left one with bit string.
2. the result of XOR comes down to be operated the result that computing is carried out in the low W position of bit string and poly, because most significant digit always is 0.
Based on above-mentioned principle, that algorithm design is as follows:
Because the algorithm of bit arithmetic is very slow and inefficiency, carry out if calculating is placed on each byte, efficient will improve greatly so, therefore cyclic redundancy check (CRC) is carried out computing based on byte, the width of divisor is the integral multiple of 8 (byte lengths), and for example selecting a width for use is 32 poly (W=32).
Deposit temporary transient CRC result with a register, claim that below it is CRC register or register.Dextrosinistral mobile bit string, when the position of shifting out from the left side is 1, then whole register is carried out the XOR computing with the low W position of poly.(being 32 in this example).
Register value is before moving: 10110100 when from 4 of the right immigrations, and high 4 of the left side will be moved out of, and 1011 will be moved out of in this example, and 1101 be moved into.
Situation is as follows:
Current 8 CRC registers: 01001101
What just be moved out of is high 4: 1011
Select this poly for use: 101011100, width W=8
Use now and give an account of the new value that the method that continues is come counter register.
Top register
---- --------
1,011 01001101 high four and current register values
1010 11100+ (* 1) Poly is placed on the top most significant digit and carries out XOR computing (because the there is 1)
-------------
0,001 10101101 operation result
Still have one 1 now high 4:
0,001 10101101 previous step result
The lowest order that 1 01011100+ (* 2) Poly is placed on the top carries out XOR computing (because the there is 1)
-------------
0,000 11,110,001 second step operation result
Now high four all positions are 0, so need not carry out the XOR computing with poly.Top computation process can obtain identical result, then result and register value is XOR if earlier XOR is in (* 1) and (* 2).The characteristic of standard x OR computing that Here it is: (a XOR b) XORc=a XOR (b XOR c) thus, it also is correct releasing following order of operation.
1,010 11100 poly (* 1) are placed on the top most significant digit
1 01011100+ poly (* 2) is placed on the top lowest order
-------------
1,011 10111100 (* 3) XOR operation result
Result (* 3) does the XOR computing with (* 3) and the value of register
1011 10111100
1011 01001101+
-------------
0000 11110001
Obtain the same result like this! What (* 3) became now is important, always equals 10111100 because the top is the value of 1010 (3), this means that you can precompute the XOR value of any top bit combination.Note top results always 0, result that the combination xor operation causes that Here it is.
Embodiment two, value table (direct table) algorithm:
Algorithm above-mentioned can be optimised.Byte in the byte serial there is no need before being used to through whole register.With this new algorithm, can directly go byte serial of XOR by this byte is shifted out register with a byte.The result points to a value in the precalculated table, and this value is to be used for being done the XOR computing by the value of register.
Embodiment three, reflected value table (reflected direct Table) algorithm:
Reflected direct Table algorithm is and direct table algorithm corresponding " reflection " algorithm, proposing " reflection " is because UART (chip of a kind of IO of operation) sends out lowest order (0) earlier, sends most significant digit (promptly the 7th) at last.This is a contrary with normal byte location.
In order to carry out CRC check, on algorithm, done corresponding adjustment, Here it is reflected direct Table algorithm at this data.In this algorithm except bit string is not done reflection, before carrying out next step operation, with its in data all do reflection and handle.So when the calculated value table, the position moves right, and poly did reflection to handle.Certainly, when calculating CRC, register also will move right, and the value table also must be to reflect.Algorithm is as follows:
1, register an is moved right byte.
Which byte that 2, will just shift out and the new byte in the byte serial are done the XOR computing, draw a sensing value table table[0..255] index
3, the tabular value and the register of index indication are done the XOR computing.
4, all do not handle as data, then jump to step 1.
In sum, when to EEPROM storage data, used the algorithm of above-mentioned CRC check after, when storing corresponding data toward EEPROM, the CRC check sign indicating number while that will calculate again also is deposited among the EEPROM.Like this, when afterwards these data being operated, we can carry out the calculating of a CRC check to these data, when the CRC check sign indicating number that calculates is identical with the CRC check sign indicating number that had before deposited in, just can believe data among the EEPROM be do not have ruined.
Claims (4)
1. the data guard method based on the programming device of cyclic redundancy check (CRC) is characterized in that, comprising:
When storing the data in the programming device at every turn, carry out a cyclic redundancy check (CRC) and calculate, new cyclic redundancy check (CRC) code is deposited in the programming device, substitute original cyclic redundancy check (CRC) code;
When reading the data in the programming device at every turn, also carry out cyclic redundancy check (CRC) and calculate, check code that calculates and the check code that had before deposited in are compared, identically prove that then data are effective, difference proves that then data are invalid.
2. the data guard method of the programming device based on cyclic redundancy check (CRC) as claimed in claim 1 is characterized in that, described cyclic redundancy check (CRC) is based on byte and carries out computing, and the width of the divisor in the described cyclic redundancy check (CRC) is 8 integral multiple.
3. the data guard method of the programming device based on cyclic redundancy check (CRC) as claimed in claim 2 is characterized in that described cyclic redundancy check (CRC) is the value table algorithm.
4. the data guard method of the programming device based on cyclic redundancy check (CRC) as claimed in claim 2 is characterized in that described cyclic redundancy check (CRC) is the reflected value table algorithm.
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Cited By (5)
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CN102708021A (en) * | 2010-11-09 | 2012-10-03 | 国际商业机器公司 | Error detection in a mirrored data storage system |
CN109947590A (en) * | 2019-03-27 | 2019-06-28 | 奇瑞商用车(安徽)有限公司 | A kind of method of data redundancy verification in automobile electronic system |
CN111145826A (en) * | 2018-11-05 | 2020-05-12 | 珠海格力电器股份有限公司 | Memory built-in self-test method, circuit and computer storage medium |
CN111739575A (en) * | 2020-08-25 | 2020-10-02 | 武汉精鸿电子技术有限公司 | Storage chip quality detection method, device, equipment and readable storage medium |
CN112148522A (en) * | 2019-06-28 | 2020-12-29 | 西部数据技术公司 | Error correction scheme in flash memory |
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2009
- 2009-02-06 CN CN200910046015A patent/CN101800084A/en active Pending
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102708021A (en) * | 2010-11-09 | 2012-10-03 | 国际商业机器公司 | Error detection in a mirrored data storage system |
US8874958B2 (en) | 2010-11-09 | 2014-10-28 | International Business Machines Corporation | Error detection in a mirrored data storage system |
CN102708021B (en) * | 2010-11-09 | 2015-05-13 | 国际商业机器公司 | Error detection in a mirrored data storage system |
CN111145826A (en) * | 2018-11-05 | 2020-05-12 | 珠海格力电器股份有限公司 | Memory built-in self-test method, circuit and computer storage medium |
CN109947590A (en) * | 2019-03-27 | 2019-06-28 | 奇瑞商用车(安徽)有限公司 | A kind of method of data redundancy verification in automobile electronic system |
CN112148522A (en) * | 2019-06-28 | 2020-12-29 | 西部数据技术公司 | Error correction scheme in flash memory |
CN112148522B (en) * | 2019-06-28 | 2024-07-23 | 西部数据技术公司 | Error correction scheme in flash memory |
CN111739575A (en) * | 2020-08-25 | 2020-10-02 | 武汉精鸿电子技术有限公司 | Storage chip quality detection method, device, equipment and readable storage medium |
CN111739575B (en) * | 2020-08-25 | 2020-12-01 | 武汉精鸿电子技术有限公司 | Storage chip quality detection method, device, equipment and readable storage medium |
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Application publication date: 20100811 |