CN101763834B - Liquid-crystal display device - Google Patents

Liquid-crystal display device Download PDF

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Publication number
CN101763834B
CN101763834B CN 200910215248 CN200910215248A CN101763834B CN 101763834 B CN101763834 B CN 101763834B CN 200910215248 CN200910215248 CN 200910215248 CN 200910215248 A CN200910215248 A CN 200910215248A CN 101763834 B CN101763834 B CN 101763834B
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pixel
coupled
gate
bar
many
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CN101763834A (en
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田沛霖
陈耿铭
洪集茂
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AU Optronics Corp
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AU Optronics Corp
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Abstract

The invention discloses a liquid-crystal display device, comprising a liquid-crystal display panel, a source electrode drive circuit and a gate drive circuit. The liquid-crystal display panel is provided with a pixel module in OTGD and Z-shaped layout, so the channel number of the gate drive circuit can be reduced under same resolution, a display effect of three-point reversion or point inversion can be reached in a line reversion drive method with low energy consumption, and at the same time a TDP framework can be realized to achieve a narrow-border effect.

Description

Liquid crystal indicator
Technical field
The present invention relates to a kind of liquid crystal indicator, espespecially a kind of employing OTGD(one-three gate driving) and the Z-shaped layout reach the liquid crystal indicator of a counter-rotating and narrow frame effect.
Background technology
Liquid crystal display (liquid crystal display, LCD) have low radiation, volume is little and the advantage such as low power consuming, replace gradually traditional cathode-ray tube (CRT) (cathode ray tube, CRT) display, and then be widely used in notebook computer, personal digital assistant (personal digital assistant, PDA), flat-surface television, or on the information products such as mobile phone.
Please refer to Fig. 1, Fig. 1 is the schematic diagram of a liquid crystal indicator 500 in prior art.Liquid crystal indicator 500 comprises a display panels 510, one source pole driving circuit 520, and a gate driver circuit 530.Display panels 510 is provided with many panel data line DL 1～DL m, many parallel gate polar curve GL 1～GL n, and a picture element matrix.Picture element matrix comprises a plurality of pixel cell P 11～P mn(m and n are positive integer) is arranged at respectively the confluce of corresponding data line and gate line.Gate driver circuit 530 can be exported respectively gate drive signal SG 1～SG nTo gate lines G L 1～GL n, and then control the unlatching of each row pixel cell or close.Source electrode drive circuit 520 can be exported respectively data drive signal SD 1～SD mTo data line DL 1～DL m, and then every delegation pixel cell is charged.Therefore, each pixel cell can come show image according to corresponding data drive signal and gate drive signal.
Please refer to Fig. 2, the sequential chart when Fig. 2 is liquid crystal indicator 500 running of prior art.Fig. 2 has shown gate drive signal SG 1～SG nWaveform.Prior art is sequentially opened and is coupled to gate lines G L 1～GL nPixel cell, and then data are write corresponding pixel cell.If drive liquid crystal indicator 500 with a counter-rotating (dot inversion), the data drive signal polarity that exports each pixel cell to all need be reversed, and therefore can consume than multi-energy.
Summary of the invention
The invention provides a kind of liquid crystal display, comprise: many data lines are used for respectively transmitting a plurality of data drive signal; Many gate lines are used for respectively transmitting a plurality of gate drive signals; One pel array, comprise a plurality of row pixels and a plurality of row pixel, in these a plurality of row pixels, a capable pixel of m is located in these many data lines between two adjacent m bar data lines and m+1 bar data line, and in these a plurality of row pixels, 3n-2 is listed as to 3n row pixel and is located in these many gate lines between two adjacent n bar gate lines and n+1 bar gate line, wherein m and n-1 are positive integer, and in the capable pixel of this m, a 3n-2 row pixel is controlled by the gate drive signal that n-1 bar gate line transmits; In the capable pixel of this m, a 3n-1 row pixel is controlled by the gate drive signal that n bar gate line transmits; And in the capable pixel of this m, a 3n row pixel is controlled by the gate drive signal that n+1 bar gate line transmits; In the capable pixel of m, the odd column pixel receives the data drive signal that m+1 bar data line transmits, and the even column pixel receives the data drive signal that m bar data line transmits.
Above-mentioned liquid crystal display, wherein this 3n-2 row pixel comprises a 3n-2 switch, and it comprises: a control end is coupled to this n-1 bar gate line; One first end; And one second end; This 3n-1 row pixel comprises a 3n-1 switch, and it comprises: a control end is coupled to this n bar gate line; One first end is coupled to the second end of this 3n-2 switch; And one second end; And this 3n row pixel comprises a 3n switch, and it comprises: a control end is coupled to this n+1 bar gate line; One first end is coupled to the second end of this 3n-1 switch; And one second end.
Above-mentioned liquid crystal display, wherein in the capable pixel of this m, a 3n+1 row pixel is controlled by the gate drive signal that n bar gate line transmits; In the capable pixel of this m, a 3n+2 row pixel is controlled by the gate drive signal that n+1 bar gate line transmits; And in the capable pixel of this m, a 3n+3 row pixel is controlled by the gate drive signal that n+2 bar gate line transmits.
Above-mentioned liquid crystal display, wherein this 3n+1 row pixel comprises a 3n+1 switch, and it comprises: a control end is coupled to this n bar gate line; One first end; And one second end; This 3n+2 row pixel comprises a 3n+2 switch, and it comprises: a control end is coupled to this n+1 bar gate line; One first end is coupled to the second end of this 3n+1 switch; And one second end; And this 3n+3 row pixel comprises a 3n+3 switch, and it comprises: a control end is coupled to this n+2 bar gate line; One first end is coupled to the second end of this 3n+2 switch; And one second end.
Above-mentioned liquid crystal display wherein separately comprises: a gate driver circuit, be coupled to this many gate lines, and be used to provide this a plurality of gate drive signals; And a data drive circuit, be coupled to this many data lines, be used to provide this a plurality of data drive signal.
Above-mentioned liquid crystal display wherein separately comprises: one drive circuit, be arranged at a side of these many gate lines, and be coupled to these many gate lines and this many data lines, be used to provide these a plurality of gate drive signals and these a plurality of data drive signal.
The present invention separately provides a kind of liquid crystal display, comprises: many data lines are used for respectively transmitting many data drive signal; Many gate lines are used for respectively transmitting many gate drive signals; One pel array, comprise multirow pixel and multiple row pixel, in this multirow pixel, the odd column pixel of a capable pixel of m is located in these many data lines between two adjacent m bar data lines and m+1 bar data line, the even column pixel is located in these many data lines between two adjacent m-1 bar data lines and m bar data line, wherein m and n are positive integer, and this 3n-2 row pixel to the 3n row pixel is all controlled by the gate drive signal that n+1 bar gate line transmits; In the capable pixel of m, the odd column pixel receives the data drive signal that m bar data line transmits, and the even column pixel receives the data drive signal that m-1 bar data line transmits.
Above-mentioned liquid crystal display, wherein this 3n-2 row pixel comprises a 3n-2 switch, and it comprises: a control end is coupled to this n+1 bar gate line; One first end; And one second end; This 3n-1 row pixel comprises a 3n-1 switch, and it comprises: a control end is coupled to this n+1 bar gate line; One first end is coupled to a 3n-5 pixel in the capable pixel of this m, and wherein 3n-5 is positive integer; And one second end; And this 3n row pixel comprises a 3n switch, and it comprises: a control end is coupled to this n+1 bar gate line; One first end is coupled to the 3n-4 pixel of the capable pixel of this m; And one second end.
Above-mentioned liquid crystal display, wherein this 3n+1 row pixel to the 3n+3 row pixel is all controlled by the gate drive signal that the n+2 gate line transmits.
Above-mentioned liquid crystal display, wherein this 3n+1 row pixel comprises a 3n+1 switch, and it comprises: a control end is coupled to this n+2 bar gate line; One first end; And one second end, be coupled to a 3n+5 pixel in the capable pixel of this m; This 3n+2 row pixel comprises a 3n+2 switch, and it comprises: a control end is coupled to this n+2 bar gate line; One first end is coupled to the second end of this 3n-2 switch; And one second end, be coupled to a 3n+6 pixel in the capable pixel of this m; And this 3n+3 row pixel comprises a 3n+3 switch, and it comprises: a control end is coupled to this n+2 bar gate line; One first end is coupled to the second end of this 3n-1 switch; And one second end.
Above-mentioned liquid crystal display wherein separately comprises: a gate driver circuit, be coupled to this many gate lines, and be used to provide this many gate drive signals; And a data drive circuit, be coupled to this many data lines, be used to provide this many data drive signal.
Above-mentioned liquid crystal display wherein separately comprises: one drive circuit, be arranged at a side of these many gate lines, and be coupled to these many gate lines and this many data lines, be used to provide these many gate drive signals and these many data drive signal.
Above-mentioned liquid crystal display, wherein in this pel array, and these many gate lines are arranged in this pel array with parallel arrangement these many data lines with the bending layout setting.
Description of drawings
Fig. 1 is the schematic diagram of a liquid crystal indicator in prior art;
Fig. 2 is the sequential chart in liquid crystal indicator when running of prior art;
Fig. 3 is the schematic diagram of a liquid crystal indicator in first embodiment of the invention;
Fig. 4 has illustrated that in the first embodiment of the invention, the polarity of picture element matrix is arranged;
Fig. 5 is the schematic diagram of a liquid crystal indicator in second embodiment of the invention;
Fig. 6 has illustrated that in the second embodiment of the invention, the polarity of picture element matrix is arranged;
Fig. 7 is the schematic diagram of a liquid crystal indicator in third embodiment of the invention;
Fig. 8 is the schematic diagram of a liquid crystal indicator in fourth embodiment of the invention;
Sequential chart when Fig. 9 is liquid crystal indicator running of the present invention.
Wherein, Reference numeral
DL 0～DL mData line GL 0～GL nGate line
P 11～P mnPixel cell PX1～PX13 pixel
140 driving circuits
100,200,300,400,500 liquid crystal indicators
110,210,310,410,510 display panels
120,220,520 source electrode drive circuits
130,230,530 gate driver circuits
Embodiment
Please refer to Fig. 3, Fig. 3 is the schematic diagram of a liquid crystal indicator 100 in first embodiment of the invention.Liquid crystal indicator 100 comprises a display panels 110, one source pole driving circuit 120, and a gate driver circuit 130.Display panels 110 is provided with many panel data line DL 0～DL m, many parallel gate polar curve GL 0～GL n, and a picture element matrix.Picture element matrix comprises a plurality of pixel cell P 11～P mn(m and n are positive integer), each pixel cell comprises a red pixel, a green pixel and a blue pixel.Each pixel comprises a thin film transistor (TFT) (thin film transistor, TFT) switch, vertically is arranged at the confluce of corresponding data line and gate line.For instance, pixel cell P 13Comprise red pixel PX1, green pixel PX5 and blue pixel PX9, and pixel cell P 24Comprise red pixel PX4, green pixel PX8 and blue pixel PX12.
In liquid crystal indicator 100, picture element matrix adopts OTGD(one-three gate driving) layout, that is gate line is controlled three pixels in the one-row pixels unit.In first embodiment of the invention, the red pixel of each pixel cell, green pixel and blue pixel are controlled by different gate drive signals.With pixel cell P 13Be example, the TFT switch of red pixel PX1 is by gate lines G L 1The gate drive signal SG that transmits 1Control, the TFT switch of green pixel PX5 is by gate lines G L 2The gate drive signal SG that transmits 2Control, and the TFT switch of blue pixel PX9 is by gate lines G L 3The gate drive signal SG that transmits 3Control.Therefore, under same resolution, the liquid crystal indicator 100 of first embodiment of the invention utilizes the OTGD layout to reduce the number of gate line, so can reduce the output channel of gate driver circuit 130.
Simultaneously, the picture element matrix of first embodiment of the invention adopts the Z-shaped layout, that is odd column pixel cell P 11～P m1, P 13～P m3..., P 1 (n-1)～P M (n-1)Receive the data drive signal that the data line on its right side transmits, and even column pixel cell P 12～P m2, P 14～P m4..., P 1n～P mnReceive the data-signal (supposing that n is even number) that transmits of data line in its left side.For instance, pixel cell P 13Can receive its right side data line DL by blue pixel PX9 1The data drive signal SD that transmits 1, and pixel cell P 24Can receive its left data line DL by blue pixel P12 1The data drive signal SD that transmits 1Fig. 4 has illustrated that in the first embodiment of the invention, the polarity of picture element matrix is arranged.By the Z-shaped layout, the liquid crystal indicator 100 of first embodiment of the invention only needs to drive to go inversion mode, need not consume the better display effect that excessive power can reach 3 counter-rotatings (three dot inversion).
Please refer to Fig. 5, Fig. 5 is the schematic diagram of a liquid crystal indicator 200 in second embodiment of the invention.Liquid crystal indicator 200 comprises a display panels 210, one source pole driving circuit 220, and a gate driver circuit 230.Display panels 210 is provided with many data line DL 1～DL m, many parallel gate polar curve GL 0～GL n, and a picture element matrix.Picture element matrix comprises a plurality of pixel cell P 11～P mn(m and n are positive integer), each pixel cell comprises a red pixel, a green pixel and a blue pixel.Each pixel comprises a thin film transistor switch, vertically is arranged at the confluce of corresponding data line and gate line.For instance, pixel cell P 11Comprise red pixel PX1, green pixel PX13 and blue pixel PX3.
In liquid crystal indicator 200, picture element matrix adopts the OTGD layout, that is gate line is controlled three pixels in the one-row pixels unit.In second embodiment of the invention, the red pixel of same row pixel cell, green pixel and blue pixel are controlled by identical gate drive signal.With pixel cell P 11Be example, the TFT switch of red pixel PX1, green pixel PX13 and blue pixel PX3 is all by gate lines G L 1The gate drive signal SG that transmits 1Control.Therefore, under same resolution, the liquid crystal indicator 200 of second embodiment of the invention utilizes the OTGD layout to reduce the number of gate line, so can reduce the output channel of gate driver circuit 230.
Simultaneously, the data line DL of second embodiment of the invention 1～DL mAdopt the bending layout, that is data line DL 1～DL mBe arranged at respectively odd column pixel cell P 11～P m1, P 13～P m3..., P 1 (n-1)～P M (n-1)The left side, and be arranged at respectively even column pixel cell P 12～P m2, P 14～P m4..., P 1n～P mnThe right side, wherein each pixel cell receives the data drive signal that its left data line transmits.Take the second row pixel cell as example, the data line DL of bending layout 2Be arranged at pixel cell P 21Left side and pixel cell P 22The right side, so pixel cell P 21Can receive its left data line DL by blue pixel P14 2The data drive signal SD that transmits 2, and pixel cell P 22To receive its left data line DL by blue pixel PX6 1The data drive signal SD that transmits 1Fig. 6 has illustrated that in the second embodiment of the invention, the polarity of picture element matrix is arranged.Data line DL by the bending layout 1～DL m, the liquid crystal indicator 200 of second embodiment of the invention only needs to drive to go inversion mode, need not consume the better display effect that excessive power can reach a counter-rotating.
Please refer to Fig. 7, Fig. 7 is the schematic diagram of a liquid crystal indicator 300 in third embodiment of the invention.Liquid crystal indicator 300 comprises a display panels 310 and one drive circuit 140.Similar with display panels 110 structures of first embodiment of the invention, be provided with equally many panel data line DL on the display panels 310 of third embodiment of the invention 0～DL m, many parallel gate polar curve GL 0～GL n, and a picture element matrix.Picture element matrix comprises a plurality of pixel cell P 11～P mn(m and n are positive integer) adopts OTGD layout and Z-shaped layout equally, therefore can reduce the number of gate line under same resolution, and can reach in the lower line inversion driving mode of power consumption the better display effect of 3 counter-rotatings.Simultaneously, TDP(track data pixel is realized in the space that third embodiment of the invention utilizes the OTGD layout to save) framework, that is utilize driving circuit 140 to export gate drive signal SG 0～SG nWith data drive signal SD 0～SD mTherefore can reach the effect of narrow frame.
Please refer to Fig. 8, Fig. 8 is the schematic diagram of a liquid crystal indicator 400 in fourth embodiment of the invention.Liquid crystal indicator 400 comprises a display panels 410 and one drive circuit 140.Similar with display panels 210 structures of second embodiment of the invention, be provided with equally many data line DL that bend layouts on the display panels 410 of fourth embodiment of the invention 1～DL m, many parallel gate polar curve GL 0～GL n, and a picture element matrix.Picture element matrix comprises a plurality of pixel cell P 11～P mn(m and n are positive integer) adopts the OTGD layout equally, therefore can reduce the number of gate line under same resolution, and can reach in the lower line inversion driving mode of power consumption the better display effect of a counter-rotating.Simultaneously, the TDP framework is realized in the space that fourth embodiment of the invention utilizes the OTGD layout to save, that is utilizes driving circuit 140 to export gate drive signal SG 0～SG nWith data drive signal SD 0～SD mTherefore, can reach the effect of narrow frame.
Please refer to Fig. 9, Fig. 9 is the sequential chart in liquid crystal indicator when running of the embodiment of the present invention.Fig. 9 has shown gate drive signal SG 1～SG nWaveform.When cycle T 1, gate drive signal SG 1～SG 3The tool noble potential, so data can write by gate lines G L 1～GL 3All pixel cells of controlling, but this moment be mainly to pixel cell PX1 charging, that is cycle T 1 is the main charge cycle of pixel cell P1, and is the precharge cycle of other pixel cell.When cycle T 2, gate drive signal SG 1And SG 2The tool noble potential, so data can write by gate lines G L 1And GL 2All pixel cells of controlling, but this moment be mainly to pixel cell PX2 charging, that is cycle T 2 is the main charge cycle of pixel cell PX2, and is the precharge cycle of other pixel cell.When cycle T 3, gate drive signal SG 1The tool noble potential, so data can write by gate lines G L 1The pixel cell PX3 that controls, that is cycle T 3 is the main charge cycle of pixel cell PX3.When cycle T 4, gate drive signal SG 2～SG 4The tool noble potential, so data can write by gate lines G L 2～GL 4All pixel cells of controlling, but this moment be mainly to pixel cell PX4 charging, that is cycle T 4 is the main charge cycle of pixel cell PX4, and is the precharge cycle of other pixel cell.When cycle T 5, gate drive signal SG 2And SG 3The tool noble potential, so data can write by gate lines G L 2And GL 3All pixel cells of controlling, but this moment be mainly to pixel cell PX5 charging, that is cycle T 5 is the main charge cycle of pixel cell PX5, and is the precharge cycle of other pixel cell.When cycle T 6, gate drive signal SG 2Tool noble potential, data can writing pixel unit PX6, that is cycle T 6 is the main charge cycle of pixel cell PX6, the rest may be inferred.
In sum, liquid crystal indicator of the present invention adopts the OTGD layout, therefore can reduce the number of gate line under same resolution, and can reach in the lower line inversion driving mode of power consumption the better display effect of 3 counter-rotatings or some counter-rotating.Simultaneously, the TDP framework is realized in the space that the present invention also can utilize the OTGD layout to save, and therefore can reach the effect of narrow frame.
Certainly; the present invention also can have other various embodiments; in the situation that do not deviate from spirit of the present invention and essence thereof; those of ordinary skill in the art work as can make according to the present invention various corresponding changes and distortion, but these corresponding changes and distortion all should belong to the protection domain of the appended claim of the present invention.

Claims (13)

1. a liquid crystal display, is characterized in that, comprises:
Many data lines are used for respectively transmitting a plurality of data drive signal;
Many gate lines are used for respectively transmitting a plurality of gate drive signals;
One pel array, comprise a plurality of row pixels and a plurality of row pixel, in these a plurality of row pixels, a capable pixel of m is located in these many data lines between two adjacent m bar data lines and m+1 bar data line, and in these a plurality of row pixels, 3n-2 is listed as to 3n row pixel and is located in these many gate lines between two adjacent n bar gate lines and n+1 bar gate line, wherein m and n-1 are positive integer, and
In the capable pixel of this m, a 3n-2 row pixel is controlled by the gate drive signal that n-1 bar gate line transmits;
In the capable pixel of this m, a 3n-1 row pixel is controlled by the gate drive signal that n bar gate line transmits; And
In the capable pixel of this m, a 3n row pixel is controlled by the gate drive signal that n+1 bar gate line transmits;
In the capable pixel of m, the odd column pixel receives the data drive signal that m+1 bar data line transmits, and the even column pixel receives the data drive signal that m bar data line transmits.
2. liquid crystal display according to claim 1 is characterized in that:
This 3n-2 row pixel comprises a 3n-2 switch, and it comprises:
One control end is coupled to this n-1 bar gate line;
One first end; And
One second end;
This 3n-1 row pixel comprises a 3n-1 switch, and it comprises:
One control end is coupled to this n bar gate line;
One first end is coupled to the second end of this 3n-2 switch; And
One second end; And
This 3n row pixel comprises a 3n switch, and it comprises:
One control end is coupled to this n+1 bar gate line;
One first end is coupled to the second end of this 3n-1 switch; And
One second end.
3. liquid crystal display according to claim 1 is characterized in that:
In the capable pixel of this m, a 3n+1 row pixel is controlled by the gate drive signal that n bar gate line transmits;
In the capable pixel of this m, a 3n+2 row pixel is controlled by the gate drive signal that n+1 bar gate line transmits; And
In the capable pixel of this m, a 3n+3 row pixel is controlled by the gate drive signal that n+2 bar gate line transmits.
4. liquid crystal display according to claim 3 is characterized in that:
This 3n+1 row pixel comprises a 3n+1 switch, and it comprises:
One control end is coupled to this n bar gate line;
One first end; And
One second end;
This 3n+2 row pixel comprises a 3n+2 switch, and it comprises:
One control end is coupled to this n+1 bar gate line;
One first end is coupled to the second end of this 3n+1 switch; And
One second end; And
This 3n+3 row pixel comprises a 3n+3 switch, and it comprises:
One control end is coupled to this n+2 bar gate line;
One first end is coupled to the second end of this 3n+2 switch; And
One second end.
5. liquid crystal display according to claim 1, is characterized in that, separately comprises:
One gate driver circuit is coupled to this many gate lines, is used to provide this a plurality of gate drive signals; And
One data drive circuit is coupled to this many data lines, is used to provide this a plurality of data drive signal.
6. liquid crystal display according to claim 1, is characterized in that, separately comprises:
One drive circuit is arranged at a side of these many gate lines, is coupled to these many gate lines and this many data lines, is used to provide these a plurality of gate drive signals and these a plurality of data drive signal.
7. a liquid crystal display, is characterized in that, comprises:
Many data lines are used for respectively transmitting many data drive signal;
Many gate lines are used for respectively transmitting many gate drive signals;
One pel array, comprise multirow pixel and multiple row pixel, in this multirow pixel, the odd column pixel of a capable pixel of m is located in these many data lines between two adjacent m bar data lines and m+1 bar data line, the even column pixel is located in these many data lines between two adjacent m-1 bar data lines and m bar data line, wherein m and n are positive integer, and
This 3n-2 row pixel to the 3n row pixel is all controlled by the gate drive signal that n+1 bar gate line transmits; In the capable pixel of m, the odd column pixel receives the data drive signal that m bar data line transmits, and the even column pixel receives the data drive signal that m-1 bar data line transmits.
8. liquid crystal display according to claim 7 is characterized in that:
This 3n-2 row pixel comprises a 3n-2 switch, and it comprises:
One control end is coupled to this n+1 bar gate line;
One first end; And
One second end;
This 3n-1 row pixel comprises a 3n-1 switch, and it comprises:
One control end is coupled to this n+1 bar gate line;
One first end is coupled to a 3n-5 pixel in the capable pixel of this m, and wherein 3n-5 is positive integer; And
One second end; And
This 3n row pixel comprises a 3n switch, and it comprises:
One control end is coupled to this n+1 bar gate line;
One first end is coupled to the 3n-4 pixel of the capable pixel of this m; And
One second end.
9. liquid crystal display according to claim 8 is characterized in that:
This 3n+1 row pixel to the 3n+3 row pixel all has the gate drive signal that the n+2 gate line transmits to control.
10. liquid crystal display according to claim 9 is characterized in that:
This 3n+1 row pixel comprises a 3n+1 switch, and it comprises:
One control end is coupled to this n+2 bar gate line;
One first end; And
One second end is coupled to a 3n+5 pixel in the capable pixel of this m;
This 3n+2 row pixel comprises a 3n+2 switch, and it comprises:
One control end is coupled to this n+2 bar gate line;
One first end is coupled to the second end of this 3n-2 switch; And
One second end is coupled to a 3n+6 pixel in the capable pixel of this m; And
This 3n+3 row pixel comprises a 3n+3 switch, and it comprises:
One control end is coupled to this n+2 bar gate line;
One first end is coupled to the second end of this 3n-1 switch; And
One second end.
11. liquid crystal display according to claim 7 is characterized in that, separately comprises:
One gate driver circuit is coupled to this many gate lines, is used to provide this many gate drive signals; And
One data drive circuit is coupled to this many data lines, is used to provide this many data drive signal.
12. liquid crystal display according to claim 7 is characterized in that, separately comprises:
One drive circuit is arranged at a side of these many gate lines, is coupled to these many gate lines and this many data lines, is used to provide these many gate drive signals and these many data drive signal.
13. liquid crystal display according to claim 7 is characterized in that, in this pel array, and these many gate lines are arranged in this pel array with parallel arrangement these many data lines with the bending layout setting.
CN 200910215248 2009-12-31 2009-12-31 Liquid-crystal display device Expired - Fee Related CN101763834B (en)

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US9626895B2 (en) * 2015-08-25 2017-04-18 Chunghwa Picture Tubes, Ltd. Gate driving circuit
CN107204165B (en) * 2017-06-06 2019-04-12 惠科股份有限公司 Driving method and driving device of display panel and display device
CN112987421B (en) * 2019-12-18 2022-10-28 京东方科技集团股份有限公司 Array substrate, driving method thereof, display module and display device

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CN101251697A (en) * 2008-04-03 2008-08-27 友达光电股份有限公司 LCD device based on point reverse turn operation
CN101387804A (en) * 2008-11-03 2009-03-18 友达光电股份有限公司 LCD with double-point inversion
CN101419372A (en) * 2008-12-01 2009-04-29 友达光电股份有限公司 LCD and liquid crystal display board thereof

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