CN101710588B - Top gate medium for carbon-based field-effect transistors, and preparation method thereof - Google Patents
Top gate medium for carbon-based field-effect transistors, and preparation method thereof Download PDFInfo
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Abstract
The invention discloses a top gate medium for carbon-based field-effect transistors, and a preparation method thereof. Yttrium oxide is directly taken as the top gate medium of carbon-based field-effect transistors. The preparation method comprises: taking carbon nanotubes or grapheme and other carbon-based materials as a conductive channel; growing a yttrium thin film a channel region; oxidizing yttrium into yttrium oxide by a thermal oxidation method; and obtaining a yttrium oxide thin film taken as the top gate medium. The preparation method realizes that high-permittivity top gate media are directly grown on the surfaces of carbon nanotubes and graphene for the first time, and solves the problem that atomic layer deposition cannot nucleate or grow high-permittivity gate dielectric film on the surfaces of carbon nanotubes or grapheme. An yttrium oxide top gate medium has high permittivity and good insulation property, realizes efficient gate modulation, and is simple in manufacture process and low in material and process cost, thereby providing a solution for realizing carbon-based high-performance devices and meeting the demand of carbon-based large-scale integrated circuits.
Description
Invention field
The invention belongs to the nano-electron technical field, relate to top grid field effect transistor, particularly top gate medium of carbon-based field-effect transistors and preparation method thereof based on material with carbon element.
Background technology
With the material with carbon element is that basic nanoelectronics, especially CNT (Carbon Nanotube) and Graphene (Graphene) is the nanoelectronics of base, is considered to have great application prospect, the most potential silicon-based technologies now that substitutes.Since CNT in 1991 and Graphene in 2004 are successfully prepared by people respectively [Iijima, S.Nature 1991,354,56-58.Novoselov, K.S.; Geim, A.K.; Morozov, S.V.; Jiang, D.; Zhang, Y.; Dubonos, S.V.; Grigorieva, I.V.; Firsov, A.A.Science 2004,306,666-669.], the electronics of carbon back has been obtained huge progress.Selection Metal Palladium that people are successful and metal scandium can be respectively form the cavity type (p type) that need not to mix and ohmic contact [Javey, the A. of electron type (n type) with CNT; Guo, J.; Wang, Q.; Lundstrom, M.; Dai, H.J.Nature2003,424,654-657.Zhang, Z.Y.; Liang, X.L.; Wang, S.; Yao, K.; Hu, Y.F.; Zhu, Y.Z.; Chen, Q.; Zhou, W.W.; Li, Y.; Yao, Y.G.; Zhang, J.; Peng, L.-M.Nano Lett.2007,7,3603-3607.], and introduce high dielectric constant material and pushed the performance of the field-effect transistor of cavity type and electron type to ultimate attainment [Javey, A. as gate dielectric layer; Guo, J.; Farmer, D.B.; Wang, Q.; Yenilmez, E.; Gordon, R.G.; Lundstrom, M.; Dai, H.J.Nano Lett.2004,4,1319-1322.Zhang, Z.Y.; Wang, S.; Ding, L.; Liang, X.L.; Pei, T.; Shen, J.; Xu, H.L.; Chen, Q.; Cui, R.L.; Li, Y.; Peng, L.-M.Nano Lett.2008,8; 3696-3701.], further, obtained the cavity type and the electron type field-effect transistor of almost ideal symmetry; And it is combined complementary metal-oxide-semiconductor (CMOS) inverter [Zhang, the Z.Y. that has obtained ideal symmetrical; Wang, S.; Wang, Z.X.; Ding, L.; Pei, T.; Hu, Z.D.; Liang, X.L.; Chen, Q.; Li, Y.; Peng, L.-M.ACS Nano 2009, ArticlesASAP, DOI:10.1021/nn901079p.].Simultaneously, also obtain very big progress [Li, X.L. based on the electronics of Graphene in recent years; Wang, X.R.; Zhang, L.; Lee, S.W.; Dai, H.J.Science, 2008,319,1229-1232.Wang, X.R.; Li, X.L.; Zhang, L.; Yoon, Y.K; Weber, P.K.; Wang, H.L.; Guo, J.; Dai, H.J.Science, 2009,324,768-771.], its high mobility receives people's favor; The energy gap of graphene nanobelt is along with the variation of width increases this characteristic has also been prepared the all-semiconductor type by people's utilization graphene nanobelt field-effect transistor [Wang, X.R.; Ouyang, Y.J.; Li, X.L.; Wang, H.L.; Guo, J.; Dai, H.J.Phys.Rev.Lett.2008,100,206803.].Electronics based on carbon back is little because of its size, speed is fast, low in energy consumption, technology is simple etc., and characteristics receive People more and more pays close attention to widely.
The performance of field-effect transistor receives the influence of two most important factors; One is the material of raceway groove, and it has determined the potentiality of device performance, and another is exactly a gate dielectric material; Because it directly contacts with raceway groove, its performance can influence the performance of entire device greatly.Why silicon-based technologies can go to today, is not because how outstanding silicon materials have, and benefits from the gate dielectric layer of silicon dioxide largely, and silicon dioxide has been shifted silicon-based technologies onto today as the natural gate medium of silicon.Realizing the raising of field-effect transistor performance, can shorten channel length, improve the electric capacity that carrier mobility perhaps improves grid, the most effectively is exactly the thickness and the dielectric constant that improves gate medium that reduces gate medium and improve grid capacitance.For the leakage current of effective suppressor electrode, we can not reduce the physical thickness of gate medium too for a short time, so unique approach is exactly effectively to improve the dielectric constant of gate medium.
Based on carbon-based material---in the electronic device of CNT and Graphene, preparing ultra-thin high-k top gate medium is a general difficult problem.For growing method---the ald of the high-dielectric-coefficient grid medium that generally uses, because CNT and the existence of Graphene surface is the π key of non-localized, so there are not dangling bonds to be provided as nuclear location [Lu, Y.R. for its growth; Bangsaruntip, S.; Wang, X.R.; Zhang, L.; Nishi, Y.; Dai, H.J.J.Am.Chem.Soc.2006,128,3518-3519.Wang, X.R.; Tabakman, S.M.; Dai, H.J.J.Am.Chem.Soc.2008,130,8152-8153.], the ultra-thin gate dielectric layer of layer of even of therefore can't directly on carbon-based material, growing.In order to make gate medium that good insulating properties can be arranged; Usually the solution that adopts is that the very thick gate medium of growing is submerged in whole CNT or graphene nanobelt wherein; Like this, will greatly reduce the control ability of gate electrode, thereby be difficult to make device performance to reach best raceway groove.If we will prepare the performance that very thin gate medium improves device, just need carry out before the ald material surface being carried out functionalization, common method has DNA (DNA) molecular functionization, nitrogen dioxide (NO
2) molecular functionization, ozone (O
3) functionalization [Lu, Y.R.; Bangsaruntip, S.; Wang, X.R.; Zhang, L.; Nishi, Y.; Dai, H.J.J.Am.Chem.Soc.2006,128,3518-3519.Farmer, D.B.; Gordon, R.G.Nano Lett.2006,6,699-703.Lee, B.K.; Park, S.-Y.; Kim, H.-C.; Cho, K.J.; Vogel, E.M.; Kim, M.J.; Wallace, R.M.; Kim, J.Y.Appl.Phys.Lett.2008,92,203102.] etc.Some top grid solutions that also have other are proceeded the ald growth such as the aluminium with evaporation as nucleation site, perhaps directly obtain silica such low-k gate medium [Kim, S. with the method for sputter; Nah, J.; Jo, I.; Shahrjerdi, D.; Colombo, L.; Yao, Z.; Tutuc, E.; Banerjee, S.K.Appl.Phys.Lett.2009,94,062107.Lemme, M.C.; Echtermeyer, T.J.; Baus, M.; Kurz, H.IEEE Electron Device Lett.2007,28,282-284.].These methods maybe can be introduced the performance that some extra scattering centers reduce devices, thereby or can between conducting channel and gate medium, introduce of the modulation of one deck unimolecule weakening top grid to raceway groove, or can directly damage [Lin, Y.-M. to carbon skeleton; Jenkins, K.A.; Valdes-Garcia, A.; Small, J.P.; Farmer, D.B.; Avouris, P.Nano Lett.2009,9,422-426.Pirkle, A.; Wallace, R.M.; Colombo, L.Appl.Phys.Lett.2009,95,133106.].One novel, simple, clean, do not have top gate medium injury, high performance carbon back high-k and preparation method thereof and will play very important effect the development of integrated circuits of carbon back.
Summary of the invention
The object of the present invention is to provide a kind of high performance top gate medium that is used for the carbon-based nano field-effect transistor; And the preparation method of this top gate medium, wherein said carbon-based nano field-effect transistor mainly is meant with CNT and the Graphene device as conductive channel.
Above-mentioned purpose realizes through following technical scheme:
With the top gate medium material of yittrium oxide as carbon-based field-effect transistors.
Thus, the invention provides a kind of carbon-based field-effect transistors, comprise conductive channel, source electrode, drain electrode, gate dielectric layer and gate electrode; Said conductive channel is a carbon-based material; Source, drain electrode lay respectively at the conductive channel two ends, and gate dielectric layer covers on the conductive channel between source, the drain electrode, and gate electrode is positioned on the gate dielectric layer; It is characterized in that said gate dielectric layer is one deck Yttrium oxide thin film.
Thickness as the Yttrium oxide thin film of top gate medium is advisable with 1～20 nanometer.
Above-mentioned carbon-based material as conductive channel mainly is meant CNT and Graphene, comprises the various forms of Graphene, like large stretch of Graphene, graphene nanobelt etc.
Thickness to source, drain electrode does not have specific (special) requirements, and the material of source, drain electrode is advisable forming the good material that contacts with conductive channel.The thickness of gate electrode does not have specific (special) requirements, and gate electrode can be selected any electric conducting material as required, forms metal simple-substance film or other conductive film.
The present invention prepares the layer of even Yttrium oxide thin film through following method and is used as top gate medium on carbon-based material:
Conductive channel between source, drain electrode (being channel region) is gone up deposition layer of metal yttrium film earlier, and the method with thermal oxidation is oxidized to yittrium oxide with metallic yttrium then, obtains one deck Yttrium oxide thin film as the top gate medium layer.
The top gate medium that said method forms has very high dielectric constant and good insulation performance character, deposits one deck conductive metal film above that again as the top gate electrode.
In the said method, plated metal yttrium film can deposited by electron beam evaporation or the method for thermal evaporation or magnetron sputtering, and metallic yttrium can evenly cover on the carbon-based material.The thickness of metallic yttrium film is generally to be advisable preferred 1～10 nanometer less than 10 nanometers.
Thermal oxidation is not limited to concrete method, adopts hot plate heating, baking oven heating, tube furnace heating etc. can provide the method for certain high temperature all passable, and the temperature of thermal oxidation is at 100～500 degrees centigrade, and the time of thermal oxidation was advisable at 1 minute～5 hours.
Core of the present invention is to propose a kind of high-k top gate medium and preparation method thereof of nano field-effect transistor of carbon back, for the realization of carbon back high performance device provides a solution, has satisfied the demand of carbon back scale integrated circuit.Particularly, yittrium oxide is as the gate medium of carbon-based field-effect transistors, and its advantage is mainly reflected in:
1. the infiltration of yittrium oxide and CNT and Graphene good (referring to Fig. 1 and Fig. 2); And has very high dielectric constant; Also have good insulation performance character, can be effectively as the high-k top gate medium of carbon-based nano field-effect transistor, and obtain the grid modulation of good top;
2. metallic yttrium is oxidized easily; Can it be direct oxidation into yittrium oxide through the method for thermal oxidation; Such processing method is simple, clean, cheap; Can not introduce the performance that unnecessary disturbing factor influences device, having the most important thing is to solve Atomic layer deposition method simultaneously can't realize at CNT and Graphene surface direct growth high-k top gate medium in the problem of CNT and Graphene surface nucleation first;
3. the very thin dielectric layer of can growing evenly covers on the carbon-based material, and need not flood the method growth gate medium of nano material through the very thick oxide of growth.
Description of drawings
Fig. 1 is transmission electron microscope (TEM) image of showing yittrium oxide and the fine infiltration of CNT ability, wherein, is coated with the yittrium oxide of one deck 5 nanometers on the CNT, and lower right corner engineer's scale is 20 nanometers among the figure.
Fig. 2 is AFM (AFM) image of showing yittrium oxide and the fine infiltration of Graphene ability, wherein, is coated with the yittrium oxide of one deck 5 nanometers on the blocky graphite alkene in the middle of the image, and lower right corner engineer's scale is 1 micron among the figure.
Fig. 3 is based on the structural representation of the yittrium oxide high-k top grid field effect transistor of single-root carbon nano-tube.
Fig. 4 is the transfer characteristic (I of the yittrium oxide high-k top grid field effect transistor of embodiment 1 preparation
Ds-V
Gs) curve, wherein, V
DsBe respectively 0.5V from top to down, 0.3V, 0.1V, the sub-threshold slope of this field-effect transistor of dash lines show among the figure has reached the 60mV/dec of theoretical limit.
Fig. 5 is the output characteristic (I of the yittrium oxide high-k top grid field effect transistor of embodiment 1 preparation
Ds-V
Ds) curve, wherein, V
GsFrom 1.4V to-1V, every curve reduces 0.2V from top to bottom.
Embodiment
Below in conjunction with accompanying drawing,, but do not limit the present invention in any way through embodiment further explain the present invention.
Embodiment 1:
As shown in Figure 3 is source-drain electrode with the metal scandium, and yittrium oxide is that gate medium, Titanium are the carbon nanotube field-effect transistor of gate electrode.Two scandium electrodes that are distributed on the CNT 1 on the dielectric base 6 are respectively source electrode 2 and drain electrode 3, and gate dielectric layer 4 is the Yttrium oxide thin films that obtained by the metallic yttrium thermal oxidation, the Titanium that gate electrode layer 5 obtains for evaporation.Concrete preparation process is following:
1. on semiconductor carbon nanometer tube, form the shape of source, drain electrode through photoetching, the scandium metal level of vapor deposition one deck 80 nanometer thickness is put sample in the acetone into then and is peeled off as the source-drain electrode layer, removes unwanted metal level and promptly obtains the source and leak metal electrode;
2. photoetching forms gate shapes, and the metallic yttrium through about electron-beam evaporation mode growth one deck 3 nanometers is placed on sample on the hot plate then, with 200 degrees centigrade of oxidations 5 minutes in air, metallic yttrium is oxidized to yittrium oxide;
At once the Titanium of method vapor deposition one deck 10 nanometer thickness through electron beam evaporation as gate electrode;
4. sample is put in the acetone and peeled off, prepare grid.
Transfer characteristic curve and output characteristic curve that the prepared nano field-effect transistor that comes out obtains through experiment measuring; Respectively like Fig. 4 and shown in Figure 5; Can find out that the transistor that obtains by this method has very big sub-threshold slope; Reached the theoretical limit 60mV/dec under the room temperature, can find out that in output characteristic curve the mutual conductance of its normalization (the diameter 1.2nm through CNT comes normalization) is 4200S/m simultaneously, this demonstrates this gate medium and has good modulation effect.
Embodiment 2:
As shown in Figure 3 is source-drain electrode with the Metal Palladium, and yittrium oxide is that gate medium, crome metal are the carbon nanotube field-effect transistor of gate electrode.Two palladium electrodes that are distributed on the CNT 1 on the dielectric base 6 are respectively source electrode 2 and drain electrode 3, and gate dielectric layer 4 is the Yttrium oxide thin films that obtained by the metallic yttrium thermal oxidation, the crome metal that gate electrode layer 5 obtains for evaporation.Concrete preparation process is following:
1. on semiconductor carbon nanometer tube, form gate shapes through photoetching, the metallic yttrium through about electron-beam evaporation mode growth one deck 5 nanometers is placed on sample on the hot plate then, with 200 degrees centigrade of oxidations 10 minutes in air, metallic yttrium is oxidized to yittrium oxide;
At once the crome metal of method vapor deposition one deck 20 nanometer thickness through electron beam evaporation as gate electrode;
3. sample is put in the acetone and peeled off, prepare grid;
4. photoetching forms the shape of source, drain electrode, and the palladium metal layer of vapor deposition one deck 50 nanometer thickness is put sample in the acetone into then and peeled off as the source-drain electrode layer, removes unwanted metal level and promptly obtains source leakage metal electrode.
Claims (9)
1. carbon-based field-effect transistors; Comprise conductive channel, source electrode, drain electrode, gate dielectric layer and gate electrode, said conductive channel is a carbon-based material, and source, drain electrode lay respectively at the conductive channel two ends; Gate dielectric layer covers on the conductive channel between source, the drain electrode; Gate electrode is positioned on the gate dielectric layer, it is characterized in that, said gate dielectric layer is one deck Yttrium oxide thin film; This Yttrium oxide thin film is through first deposition layer of metal yttrium film on the conductive channel between source, the drain electrode, with the method for thermal oxidation metallic yttrium is oxidized to yittrium oxide then and obtains.
2. carbon-based field-effect transistors as claimed in claim 1 is characterized in that, said carbon-based material is CNT or Graphene.
3. carbon-based field-effect transistors as claimed in claim 1 is characterized in that, the thickness of said gate dielectric layer is 1～20 nanometer.
4. the preparation method of the top gate medium of a carbon-based field-effect transistors; Said carbon-based field-effect transistors is conductive channel with the carbon-based material; The two ends of conductive channel are respectively source, drain electrode; On the conductive channel between source, the drain electrode, deposit layer of metal yttrium film earlier, this metallic yttrium film of thermal oxidation obtains one deck Yttrium oxide thin film as top gate medium then.
5. preparation method as claimed in claim 4 is characterized in that, the method plated metal yttrium of deposited by electron beam evaporation or thermal evaporation or magnetron sputtering.
6. preparation method as claimed in claim 4 is characterized in that the thickness of the metallic yttrium film that is deposited is 1～10 nanometer.
7. preparation method as claimed in claim 4 is characterized in that, adopts the method for hot plate heating, baking oven heating or tube furnace heating to carry out thermal oxidation.
8. preparation method as claimed in claim 4 is characterized in that, the temperature of thermal oxidation is 100～500 degrees centigrade.
9. preparation method as claimed in claim 4 is characterized in that, the time of thermal oxidation is 1 minute～5 hours.
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| CN102683209B (en) * | 2011-03-18 | 2015-01-21 | 中国科学院微电子研究所 | Semiconductor device and manufacturing method thereof |
| CN102184849B (en) * | 2011-04-27 | 2013-03-20 | 中国科学院上海微***与信息技术研究所 | Method for manufacturing graphene-based field effect transistor |
| CN102263121B (en) * | 2011-07-19 | 2013-03-06 | 北京大学 | Manufacturing method of grapheme-based Hall IC (integrated circuit) |
| CN102354668B (en) * | 2011-10-12 | 2013-03-06 | 北京大学 | Preparation method of carbon-based nanometer material transistor |
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| CN110596222A (en) * | 2019-09-16 | 2019-12-20 | 北京大学 | Carbon nano tube field effect transistor type sensor and preparation method thereof |
| CN111370578B (en) * | 2020-03-20 | 2022-08-30 | 中国科学院微电子研究所 | Bionic transistor structure and control method of characteristic time thereof |
| CN113206091A (en) * | 2021-03-31 | 2021-08-03 | 中国科学院微电子研究所 | Two-dimensional semiconductor field effect transistor, preparation process thereof and semiconductor device |
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