CN101699627B - Nonvolatile storage array and preparation method thereof - Google Patents
Nonvolatile storage array and preparation method thereof Download PDFInfo
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- CN101699627B CN101699627B CN2009100447508A CN200910044750A CN101699627B CN 101699627 B CN101699627 B CN 101699627B CN 2009100447508 A CN2009100447508 A CN 2009100447508A CN 200910044750 A CN200910044750 A CN 200910044750A CN 101699627 B CN101699627 B CN 101699627B
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- medium layer
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Abstract
The invention discloses a nonvolatile storage array and a preparation method thereof, aiming to ensure high switching resistance of the storage array, simple preparation process and high cost performance. The nonvolatile storage array consists of an upper electrode, a storage medium layer and a lower electrode, wherein the storage medium layer is positioned between the lower electrode and the upper electrode; the upper electrode and the lower electrode are linear and are of crossed shape, and the crossing position is provided with a resistor switch unit; the storage medium layer is formed by titanium oxide with variable oxidation rate; and the proportions of the numbers of oxygen atoms and titanium atoms on the storage medium layer connected with the border of the lower electrode and the border of the upper electrode are in linear variation. The preparation method comprises the following steps: firstly, preparing the lower electrode; secondly, preparing the storage medium layer by adopting a method of electron beam evaporation in oxygen atmosphere; thirdly, preparing the upper electrode; and finally, configuring the voltage polarity of the resistance switch unit. The storage arrayhas high switch resistance ratio, high fault tolerance, in particular bipolarity, small working current and low power consumption. The preparation method has simple process and low cost.
Description
Technical field
The present invention relates to a kind of Nonvolatile storage array, relating in particular to a kind of is the Nonvolatile storage array of storage medium to become the oxygenation efficiency titanium oxide.
Background technology
At present, the Nonvolatile storage array that occupies the staple market share is the FLASH storage array of capacitance charge type.Along with the development of microelectronic technique, the size of memory cell diminishes gradually, and the integration density of storage array also improves constantly.And after the size of FLASH memory cell was reduced to nanometer scale, its performance sharply reduced, and power consumption sharply rises.Therefore, the Nonvolatile storage array that the research and development nanoscale down can operate as normal is extremely urgent, has become the research focus.
The resistance switch array be a kind of can be at the Nonvolatile storage array of nanoscale operate as normal.Nonvolatile storage array generally is made up of upper strata parallel wire, resistance switch unit, lower vertical lead, and levels lead infall is the resistance switch unit, and the resistance switch unit is made up of for three layers top electrode/storage medium layer/bottom electrode.Change voltage or electric current between the levels lead, can change the resistance of storage medium layer, thereby realize information stores.
Application number is that 200610165950.5 Chinese patent discloses a kind of Nonvolatile memory devices and manufacturing approach thereof that adopts oxygen-deficient metal oxide layer.This Nonvolatile memory devices comprises switching device and the resistance switch unit that is connected this switching device.Switching device can comprise triode or diode, forms the 1T1R structure.The storage medium layer of resistance switch unit comprises the double layer of metal oxide, and wherein one deck is oxygen-deficient metal oxide (arriving the thick ZnO of 50nm, ITO etc. as 1), on oxygen-deficient metal oxide layer, forms data storage layer (like NiO, ZnO etc.) again.The upper/lower electrode of resistance switch unit
The patent No. is that the United States Patent (USP) of US20070205456A1 discloses a kind of nonvolatile semiconductor memory member and storage array (Nonvolatile memory device and nonvolatile memory arrayincluding the same) thereof, and this storage array is made up of upper strata parallel wire, resistance switch unit, lower vertical lead.Wherein the storage medium layer of resistance switch unit is made up of the metal oxide of two-layer different qualities, is respectively to have n N-type semiconductor N characteristic (like NiO etc.) and have the P type semiconductor characteristic (like TiO
2, ZnO, CoO etc.) metal oxide.The levels electrode of resistance switch unit is chosen the conducting metal oxide of Ir, Ru, Pt or containing element Ir, Ru, Pt, is shaped as bulk, and is identical with storage medium layer.The resistance switch unit is a kind of non-volatile memory cells with Schottky characteristic, and only parallel wire and lower vertical lead infall exist on the upper strata, demonstrates different electrology characteristic curves through the NiO layer that under different oxygen concentrations, prepares 10nm.Though this storage array switch resistance reaches 1000 than high energy, compares the layer of metal oxide, preparation is complicated; And its resistance switch characteristic is a unipolarity; Resistance switch unit low resistance state electric current is bigger, is 10mA, is difficult to satisfy the memory requirement of VHD, super low-power consumption.The patent No. is that the United States Patent (USP) of US20070257257A1 discloses a kind of nonvolatile semiconductor memory member that contains the amorphous alloy oxide skin(coating) and preparation method thereof (Nonvolatile memory device including amorphous alloy metal oxide layer andmethod of manufacturing the same), and its storage medium layer is made up of with other metal oxide mixing that crystalline phase is different with it transition metal oxide.Compare with the layer of metal oxide, preparation is complicated, and switch resistance causes the memory cell fault-tolerant ability poor than less than 10.
Summary of the invention
The technical problem that the present invention will solve is; To present non-volatile resistance switch storage array switch resistance than problem low, complicated process of preparation; Proposing a kind of is the Nonvolatile storage array of storage medium to become the oxygenation efficiency titanium oxide; Make the storage array switch resistance than high, preparation technology is simple, and cost performance is high.
To become the oxygenation efficiency titanium oxide is that the Nonvolatile storage array of storage medium is made up of top electrode, storage medium layer, bottom electrode.Storage medium layer is positioned at lower electrode surface, and top electrode is positioned at the storage medium laminar surface.
Top electrode and bottom electrode are wire.Bottom electrode thickness h 1 is 50nm to 1 μ m, and live width d1 is 30nm to 10 μ m.Storage medium layer is prepared in lower electrode surface, and thickness h 2 is 20nm to 60nm.Top electrode is prepared in the storage medium laminar surface, is cross-shaped with bottom electrode, and thickness h 3 is 50nm to 1 μ m, and live width d2 is 30nm to 10 μ m.Consider material cost and power consumption, generally get h1=h3, d1=d2.Top electrode and bottom electrode infall are the resistance switch unit.
Top electrode and bottom electrode all adopt 1) metal (Au, W, Ti, Pt, Ag, Al, Ni, Cu, Fe, Ru, Ir) and between them combination in any form alloy, 2) RuO
2, In
2O
3, SnO
2, preparation of metal oxides such as ITO.Preferred Pt, Ru, Ir.For the switching voltage polarity that realizes device configurable, the preferred same material of upper/lower electrode.
Storage medium layer is a tabular; Titanium oxide by becoming oxygenation efficiency constitutes; Storage medium layer connects the borderline oxygen atom in bottom electrode place and titanium atom number ratio value is a; The span of a is 1.3～1.7, and the Connect Power borderline oxygen atom in utmost point place and titanium atom number ratio value of storage medium layer is b, and the span of b is 1.8～2.5; Oxygen atom between two borders of storage medium layer and upper/lower electrode and titanium atom number ratio are linear change; The rule that changes is: y=kx+a, and wherein y is oxygen atom and titanium atom number ratio, x is a distance of leaving down the interface; 0≤x≤h2, rate of change k=(b-a)/h2.
The present invention is that the preparation method of the Nonvolatile storage array of storage medium is to become the oxygenation efficiency titanium oxide:
The first step, it is that h1, width are the bottom electrode of d1 that the method for employing photoetching (PL), electron beam lithography (EBL), ion beam lithography (IBL), focused beam induction and deposition (FEB), FIB induction and deposition (FIB), dry etching (DE) or wet etching (WE) prepares thickness.
In second step, adopt the method for electron beam evaporation plating in the oxygen atmosphere to prepare the storage medium layer that thickness is h2:
The target of this storage medium layer of vapor deposition is TiO
2
Evaporation plating parameter wherein: partial pressure of oxygen is near the vacuum degree parameter target, 5 * 10
-4Pa to 5 * 10
-2Pa; Underlayer temperature is a room temperature to 300 ℃; Deposition rate is 1
To 10
For the ratio of the oxygen titanium atom that makes preparation is linear change, control partial pressure of oxygen 5 * 10 during from beginning vapor deposition
-4Pa to 1 * 10
-3Between the Pa, 1 * 10 during to the end vapor deposition
-3Pa to 5 * 10
-2Linear change between the Pa, deposition rate are 1
To 10
In the 3rd step, it is that h3, width are the top electrode of d2 that the method for employing photoetching (PL), electron beam lithography (EBL), ion beam lithography (IBL), focused beam induction and deposition (FEB), FIB induction and deposition (FIB), dry etching (DE) or wet etching (WE) prepares thickness.The material of preparation top electrode is identical with the material of preparation bottom electrode.
The 4th step, the polarity of voltage of configuration resistance switch unit:
4.1 apply initial bistable state driver sweep voltage or pulse voltage (pulse duration is 100ms to 1s) at top electrode or bottom electrode, it is 10 that applied voltage makes the electric field strength of storage medium layer
6V/cm to 10
8V/cm, the electric current of the resistance switch of restricted passage simultaneously unit makes to prevent the hard breakdown of resistance switch unit by electric current I c≤1mA.
4.2 apply polarity of voltage and initial identical scanning or the pulse voltage (pulse duration is 10ns to 100ms) of bistable state trigger voltage.The resistance switch unit is changed to high-impedance state from low resistance state;
4.3 apply polarity of voltage and initial opposite scanning or the pulse voltage of bistable state trigger voltage, the resistance switch unit is changed to low resistance state by high-impedance state, the resistance switch characteristic is a bipolarity.
If 4.2 steps applied polarity of voltage and initial opposite scanning or the pulse voltage of bistable state trigger voltage, the resistance switch unit is changed to low resistance state from high-impedance state; Then 4.3 steps applied polarity of voltage and initial identical scanning or the pulse voltage of bistable state trigger voltage, and the resistance switch unit is changed to high-impedance state by low resistance state, and the resistance switch characteristic is similarly bipolarity.
Adopt the present invention can reach following technique effect:
1. storage array switch resistance of the present invention is than surpassing 1000, and fault-tolerant ability is high;
2. storage array of the present invention specifically has bipolarity, and operating current is little, and is low in energy consumption;
3. the inventive method is to become the oxygen concentration storage medium layer along the preparation of storage cross section, can effectively improve storage array switch resistance ratio, and can accurately regulate oxygen concentration variation ratio, is convenient to select device parameters such as suitable resistance switch compares;
4. the inventive method and CMOS process compatible, preparation technology is simple, and cost is low;
5. adopt the inventive method behind preferred upper/lower electrode material, the switching voltage polarity of device is configurable.
Description of drawings
Fig. 1 is the Nonvolatile storage array stereogram of US20070205456A1 for the patent No..
Fig. 2 is the non-volatile memory cells cutaway view of US20070205456A1 for the patent No..
Fig. 3 is a non-volatile memory architecture sketch map of the present invention.
Embodiment
Fig. 1 is the Nonvolatile storage array stereogram of US20070205456A1 for the patent No..Fig. 2 is a Nonvolatile storage array forward cutaway view shown in Figure 1.This Nonvolatile storage array is made up of upper strata parallel wire 15, resistance switch unit, lower vertical lead 10.Only parallel wire 15 exists with lower vertical lead 10 infalls on the upper strata in the resistance switch unit.The resistance switch unit is made up of for 11 3 layers top electrode 14, storage medium layer 16, bottom electrode, and upper strata parallel wire 15 is arranged above the resistance switch unit, and lower vertical lead 10 is arranged below.Top electrode 14 is processed with the conducting metal oxide that bottom electrode 11 is chosen Ir, Ru, Pt or containing element Ir, Ru, Pt.Storage medium layer 16 is made up of p type/n type metal oxide 12, n type/p type metal oxide 13.
Fig. 3 is a Nonvolatile storage array structural representation of the present invention.Nonvolatile storage array of the present invention is made up of bottom electrode 11, storage medium layer 16, top electrode 14.Bottom electrode 11 is a wire, and thickness h 1 is 50nm to 1 μ m, and live width d1 is 30nm to 10 μ m.Storage medium layer 16 is a tabular, adopts to become the preparation of oxygenation efficiency titanium oxide, is positioned at bottom electrode 11 surfaces, and thickness h 2 is 20nm to 60nm.Top electrode 14 is a wire, is prepared in storage medium layer 16 surfaces, and thickness h 3 is 50nm to 1 μ m, and live width d2 is 30nm to 10 μ m.Top electrode 14 and bottom electrode 11 mutual square crossings, infall constitutes the resistance switch unit.
Table 1 is to adopt preparation method of the present invention, the situation of the embodiment of the Nonvolatile storage array that the employing different materials is prepared.Through repeatedly experiment, find that the thickness of electrode and width are little to the influence of switch resistance ratio, but the preparation material of electrode is bigger to the influence of switch resistance ratio.Three kinds of materials having listed electrodes use of the present invention in the table respectively be metal and between them combination in any form alloy, be doped to the composite material in Si, Ge, SiGe, GaN, GaAs, the InP semi-conducting material, the embodiment situation of metal oxide by P, N, As, B.Pt situation listed in preferred Ru, Ir and the table is basic identical; These three kinds of switch resistances of other compared with metal are than descending to some extent; Be doped to the switch resistance that the composite material in Si, Ge, SiGe, GaN, GaAs, the InP semi-conducting material works it out by P, N, As, B and compare the poor of metal, the switch resistance that metal oxide is worked it out is doped to poor that composite material in Si, Ge, SiGe, GaN, GaAs, the InP semi-conducting material works it out by P, N, As, B frequently.But all these materials can guarantee that all the switch resistance ratio of Nonvolatile storage array of the present invention is greater than 1000 (recording at the 0.2V place).
Table 1
Claims (7)
1. Nonvolatile storage array; It is characterized in that it is made up of top electrode (14), storage medium layer (16), bottom electrode (11); Storage medium layer (16) is positioned at bottom electrode (11) surface, and top electrode (14) is positioned at storage medium layer (16) surface, and top electrode (14) and bottom electrode (11) are wire; Top electrode (14) is cross-shaped with bottom electrode (11), and infall is the resistance switch unit; Top electrode (14) and bottom electrode (11) adopt metal and combination in any formation alloy preparation between them, or adopt preparation of metal oxides; Storage medium layer (16) is a tabular; Titanium oxide by becoming oxygenation efficiency constitutes; Storage medium layer (16) connection bottom electrode (11) locates borderline oxygen atom and titanium atom number ratio value is a; The span of a is 1.3～1.7, and storage medium layer (16) Connects Power, and the utmost point (14) is located borderline oxygen atom and titanium atom number ratio value is b, and the span of b is 1.8～2.5; Oxygen atom between two borders of storage medium layer (16) and upper/lower electrode and titanium atom number ratio are linear change.
2. Nonvolatile storage array as claimed in claim 1 is characterized in that said bottom electrode (11) thickness h 1 is 50nm to 1 μ m, and live width d1 is 30nm to 10 μ m; Storage medium layer (16) thickness h 2 is 20nm to 60nm; Top electrode (14) thickness h 3 is 50nm to 1 μ m, and live width d2 is 30nm to 10 μ m.
3. Nonvolatile storage array as claimed in claim 2 is characterized in that said h1=h3, d1=d2.
4. Nonvolatile storage array as claimed in claim 1 is characterized in that top electrode (14) and bottom electrode (11) adopt the same material preparation.
5. Nonvolatile storage array as claimed in claim 1, when it is characterized in that top electrode (14) and bottom electrode (11) adopt metal and combination in any formation alloy prepares between them, metal finger Au, W, Ti, Pt, Ag, Al, Ni, Cu, Fe, Ru, Ir; When adopting preparation of metal oxides, metal oxide refers to RuO
2, In
2O
3, SnO
2, ITO.
6. like claim 1 or 5 described Nonvolatile storage arrays, it is characterized in that top electrode (14) and bottom electrode (11) preferably adopt Pt, Ru, Ir preparation.
7. Nonvolatile storage array as claimed in claim 1; It is characterized in that the rule that oxygen atom and titanium atom number proportional linearity between two borders of storage medium layer (16) and upper/lower electrode (11) change is: y=kx+a; Wherein y is oxygen atom and titanium atom number ratio; X is a distance of leaving down the interface, 0≤x≤h2, rate of change k=(b-a)/h2.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1367531A (en) * | 2001-01-23 | 2002-09-04 | 联华电子股份有限公司 | Interlayer dielectric layer flatening method |
| CN1426602A (en) * | 2000-12-27 | 2003-06-25 | 精工爱普生株式会社 | Ferroelectric memory device |
| KR20090032878A (en) * | 2007-09-28 | 2009-04-01 | 주식회사 하이닉스반도체 | Semiconductor device and the method for manufacturing semiconductor device |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1426602A (en) * | 2000-12-27 | 2003-06-25 | 精工爱普生株式会社 | Ferroelectric memory device |
| CN1367531A (en) * | 2001-01-23 | 2002-09-04 | 联华电子股份有限公司 | Interlayer dielectric layer flatening method |
| KR20090032878A (en) * | 2007-09-28 | 2009-04-01 | 주식회사 하이닉스반도체 | Semiconductor device and the method for manufacturing semiconductor device |
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