CN1016289B - Mounting structure for ic chip for timepiese - Google Patents
Mounting structure for ic chip for timepieseInfo
- Publication number
- CN1016289B CN1016289B CN88104877A CN88104877A CN1016289B CN 1016289 B CN1016289 B CN 1016289B CN 88104877 A CN88104877 A CN 88104877A CN 88104877 A CN88104877 A CN 88104877A CN 1016289 B CN1016289 B CN 1016289B
- Authority
- CN
- China
- Prior art keywords
- chip
- integrated circuit
- end points
- line
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
-
- G—PHYSICS
- G04—HOROLOGY
- G04C—ELECTROMECHANICAL CLOCKS OR WATCHES
- G04C3/00—Electromechanical clocks or watches independent of other time-pieces and in which the movement is maintained by electric means
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Electric Clocks (AREA)
- Electromechanical Clocks (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
To efficiently remove external noise and to perform measurement based on the voltage waveform of a main circuit by simple constitution, by controlling a corona detection sensor on the basis of the commercial frequency voltage of the main circuit detected from a corona detection terminal. A receiver 30 generates a sensor controlling pulse on the basis of the voltage waveform of a main circuit from a main circuit voltage detection sensor 20 to send the same to corona detection sensors 10a, 10b. The corona signal from a corona detection terminal 5 is sent to a gate circuit 13 through a filter circuit 11 and a detecting and amplifying circuit 12. The light pulse sent from the receiver 30 is photoelectrically converted by an O/E converter 17 to control the gate circuit 13. The corona signal passed through the gate circuit 13 is converted to a light signal by an E/O converter 15 through an A/D converter 14 and transmitted to the receiver 30 through an optical fiber 40.
Description
The present invention relates to a kind of mounting structure of IC chip for timepiese.
About the mounting structure of IC chip for timepiese, in Japanese publication 59-138341,56-50544 and 59-120884, talk about.In above-mentioned prior art, with spun gold melting welding or soldering the end points of line pattern line and integrated circuit (IC) chip is coupled together, part reinforces the connection to use injection moulding agent (molding agent) then.
Traditional installation method needs such installation process, promptly with spun gold, melting welding or soldering the end points of line pattern line and integrated circuit (IC) chip is coupled together, and by the injection moulding part that reinforces the connection.Thereby just can not overhaul the fault that in installation process, produces.Moreover well-known, in table, integrated circuit (IC) chip and circuit board are quite expensive with respect to other parts.The cost of circuit unit depends on the qualification rate of product in the installation process.
The present invention will address the above problem exactly, the objective of the invention is to reduce cost by installation process is oversimplified, and the fault that can easily get rid of in the installation process to be produced.
Solution of the present invention is as follows:
(1) IC chip for timepiese mounting structure, it comprises:
Integrated circuit (IC) chip with many end points;
Substrate with line pattern, the line of line pattern is corresponding with above-mentioned each end points;
An erecting frame of being made up of insulating component, this erecting frame are used for closed assembly integrated circuit (IC) chip and substrate; And
The part that presses that utilizes the elastic part pressurization to make that acquisition electric conductivity connects between line pattern and integrated circuit (IC) chip; Wherein, integrated circuit (IC) chip and substrate are fixed on erecting frame and press between the part.
(2) mounting structure of (1) described IC chip for timepiese wherein, is having a boss at least above on the integrated circuit (IC) chip or on the line pattern.
(3) mounting structure of (1) described IC chip for timepiese above, wherein, integrated circuit (IC) chip has the device that can discern installation direction.
(4) mounting structure of (1) described IC chip for timepiese wherein, has a leader at least above on insulating component or erecting frame, and this leader is used for adjusting the planimetric position of integrated circuit (IC) chip.
(5) mounting structure of (1) described IC chip for timepiese above, wherein, one section of the line pattern line has elasticity (fLexibility).
(6) mounting structure of (1) described IC chip for timepiese above, wherein, erecting frame is made up of the hardware that has insulation course on it.
(7) mounting structure of (1) described IC chip for timepiese wherein, forms line pattern above on said erecting frame, and this line pattern line is corresponding with each end points of integrated circuit (IC) chip.
Narrate most preferred embodiment of the present invention below with reference to accompanying drawing.
At first, the used erecting frame of the present invention is meant flat board, bearing carrier and planar plate members.
Fig. 1 is the planimetric map of expression embodiments of the invention.Fig. 2 and Fig. 3 are the partial sectional views of Fig. 1.
The 1st, dull and stereotyped, to make by synthetic resin, it will be as erecting frame.2 is circuit boards, and this circuit board is an insulating component, and it is installed on dull and stereotyped 1, and is formed with line pattern on the face relative with dull and stereotyped 1.The 3rd, the lid of circuit unit, this lid has elasticity, for pressing part.The 4th, integrated circuit (IC) chip, it comprises exit point, the end points that resets be made up of golden boss of the stepper motor of feeding, the end points of crystal unit, V
DDAnd V
SSEnd points, test end points, the end points that is used to write down and the test end points 4l that is used to detect the integrated circuit unit structure.The 5th, crystal unit.The 6th, the known stepper motor coil block that comprises rotor, stator and coil block.The 7th, battery.The 8th, be pressed on the anode connector of battery 7.In addition, on circuit board 2, have and exit point, line 2a and 2b, the gate trace 2C of the corresponding stepper motor of feeding of each end points of stepper motor and drain line 2d, V
DDLine 2e, V
SSLine 2f, the line 2g that resets, test end points 2h and 2i and record end points 2j.(gold-plated from the teeth outwards.) one section of these lines perk in the pilot hole 2K of integrated circuit (IC) chip.The pilot hole 2K of integrated circuit (IC) chip embeds pilot hole 2K and realizes the plane positioning on four limits by four angles of integrated circuit (IC) chip 4, prevents the in-plane displancement between line and the integrated circuit (IC) chip 4.Then, the spring leaf 3a with the lid 3 of circuit unit pushes down integrated circuit (IC) chip 4.Make by synthetic resin owing to dull and stereotyped 1, thereby it has certain elasticity, (if form a groove (Concavo portion) on dull and stereotyped 1, shown in dotted line, then the reliability of elasticity and conduction will further improve just in time to adapt to the deviation of boss height.) therefore, in installation process, can confirm that arrow 2n is marked on the position relative with test end points 4l on the circuit board by test end points 4l) as long as drop into this direction of integrated circuit (IC) chip 4(with predetermined direction, cover the lid 3 of circuit unit again, be easy to purpose thereby reached to install.Owing in installation process, do not have hot pressing and wire bonds, therefore, fault be installed just become unimportant.If the installation fault, then can open the lid 3 of circuit unit, change integrated circuit (IC) chip 4 or circuit board 2, thereby improved maintenanceability.Crystal unit 5 flat be placed among the dull and stereotyped groove 1b, be pressed in its end with the elastic part 3b of the lid 3 of circuit unit, and by dull and stereotyped 1 and circuit board 2 make this end compacted, thereby the acquisition good electrical conductivity.
Below, Fig. 4 represents other embodiments of the invention to Fig. 9.Among Fig. 4, groove 1a is positioned on dull and stereotyped 1, and its position is general corresponding with the position of each boss.Because some deviation of height h of golden boss, therefore, the line pattern line must have one section bending, so that adapt to the deviation of above-mentioned height.(bottom surface of the groove 1a on the flat board and the gap S between the line, and the h＞S preferably of the relation between the boss height h, and the relation of clearance t between the end face of the bottom surface of integrated circuit (IC) chip 4 and notch 1e and s t＞s) preferably.Therefore, the reliability of electrical connection between boss and the line improves.Integrated circuit (IC) chip 4 installs and fixes like this, wherein, on the lid 3 of circuit unit projection 3b is arranged, and utilizes the elasticity of integral body of the lid 3 of circuit unit, pushes down integrated circuit (IC) chip 4 by projection 3b.Integrated circuit (IC) chip 4 exceeds the upper surface of circuit board 2, can prevent the in-plane displancement between line and the end points like this, and this displacement is caused by remain in the lip-deep bossing 4a of chip edge when making chip.
Among Fig. 5, the end of each line has sweep 2l respectively on the circuit board, adapts to the deviation of boss height by means of the amount of deflection of sweep 2l, as shown in Figure 5.
In the structure shown in Figure 6, there is not golden boss on the integrated circuit (IC) chip 4, but its position of apsis (dowel) 2m(is arranged corresponding to each end points on the integrated circuit (IC) chip in the end of line pattern line), except that the apsis of this form, the apsis 2n(Fig. 9 that obtains with the part of half etch corrosion line) also can reach same effect.
In the structure shown in Figure 7, utilize one group of projection 1d to make integrated circuit (IC) chip 4 plane positioning on dull and stereotyped 1.In other words, finish according to the method described above being connected between the end points of line and integrated circuit (IC) chip 4.Dull and stereotyped 1 can replace with the circuit bearing that synthetic resin is made.
In the structure shown in Figure 8, the line pattern line on the circuit board is different with the foregoing description, and on it was formed in the other direction, the plane positioning of integrated circuit (IC) chip 4 realized that by line 2q line 2q has and V
DDIdentical current potential or do not have current potential.The effect of hole 2r is the bending of finishing line 2q.In addition, can also utilize certain a part of projection on the circuit board 2 (projection or phase class thing under a plurality of positions are partly die-cut) to realize bent bodies, these projections have insulating property in the place that contacts with integrated circuit (IC) chip, dot, (its current potential is same as V perhaps can also to utilize projection on the erecting frame
DDOr electrical isolation) realize bent bodies, erecting frame comprises flat board, supporting body, and the pad between flat board and supporting body or the like.
What say in the foregoing description is golden boss, but also can reach same effect with the cored solder boss.On the line pattern surface of circuit board, plate one deck gold, to increase the reliability of conduction.In fact dull and stereotyped 1 also be good as reinforcing member, and for example, hardware combines with this material, forms the insulation course of this material again between flat board and integrated circuit (IC) chip.Among the present invention, line pattern is made on the circuit board, yet, on the planar surface relative, form line pattern with methods such as printings and also can reach same effect with integrated circuit (IC) chip.In addition, the mounting and positioning device of integrated circuit (IC) chip is set on flat board, the structure of making as shown in Figure 7 that does not have circuit board also is possible.
Figure 10 is a plan view, expression an alternative embodiment of the invention, and Figure 11 is the cut-open view of its major part.
The 1st, dull and stereotyped, it is made by synthetic resin and has a groove 1a that integrated circuit (IC) chip 4 is installed.The 2nd, circuit board forms line pattern on the face relative with dull and stereotyped 1, and 2 are placed on dull and stereotyped 1.The 3rd, the lid of circuit unit, it is installed in the upper surface of circuit board 2, and has elasticity.The 4th, integrated circuit (IC) chip, it has the exit point of being made up of golden boss of the stepper motor of feeding, also has the end points of resetting, crystal unit end points, a V
DDEnd points, V
SSThe test end points of end points, testing circuit assembly, be used for writing down clock rate adaptation data etc. the record end points, be used for test end points 4K, 4l and the 4W of testing integrated circuit chip cellular construction.The 5th, crystal unit, the 6th, the coil block of known stepper motor, this stepper motor is made of stepping rotor 10, stator 11 and the coil block be made up of permanent magnet and gear.Be formed with output terminal 01,02 on the wiring board 2 corresponding to the stepper motor of feeding, and line 2a and the 2b relative with the end points of integrated circuit (IC) chip, be connected respectively to the gate terminal of crystal oscillator and gate trace 2C and drain electrode line 2d, the V of drain electrode end
DDLine 2e, V
SSLine 2f, the line 2g that resets, test end points line 2h and 2i, the end points line 2j that is used to write down.And (except the surface in contact of circuit board and Copper Foil) is coated with the last layer gold on the surface of each line.Yet, because test end points 4K, 4l and 4W are the end points that detects integrated circuit (IC) chip, so just do not require line corresponding to test end points 4K, 4l and 4W.Integrated circuit (IC) chip 4 is by the sidewall of the groove 1a on flat board location, and circuit board 2 is by two register pin 1b on dull and stereotyped 1 and 1c location, realized the relative positioning of the planimetric position of each end points of integrated circuit (IC) chip 4 and line pattern by above-mentioned two location.Each end points of integrated circuit (IC) chip 4 and and the corresponding line pattern line of these end points between electric conductivity by with two of the groove 1a bottom surface on the flat board and making leaf spring 3a() compress and guarantee.As shown in the figure, in circuit board 2, insulated substrate thereby has prevented short circuit between the making leaf spring 3a and line pattern that circuit unit covers.In the foregoing description, described making leaf spring 3a is two, yet, making leaf spring 3a not only is confined to two, also can be with a plurality of, for example can compress with four spring leafs on four angles of integrated circuit (IC) chip 4, integrated circuit (IC) chip 4 can be compressed by the line of same number of end points and line pattern, to obtain electric conductivity.In this case, the deviation of each end points height can be used in the method for opening with otch (Cutting) between each line of circuit connection figure and adapt to, thereby improves the reliability of conduction.
As mentioned above, integrated circuit (IC) chip 4 is fit among the groove 1a on the flat board, the lid 3 of circuit unit is installed on the circuit board 2, dull and stereotyped 1 and the lid 3 usefulness screws of circuit unit or similarly web member fix, so just finished installation process.Then, under the state of complete table (when walking), carry out the check and the adjustment clocking rate (adjusting timing rate) of ruuning situation.Thereby, just can finish installation process as long as each unit, component-assembled got up, that is to say, can extremely easily finish installation process.And, owing to do not have hot pressing and wire bonds, and make the fault that occurs in the installation process become unimportant, if fault, then place under repair easily, that is, as long as take off circuit board 2, bad parts such as replacing integrated circuit (IC) chip get final product.
Figure 12 represents an alternative embodiment of the invention.The 1st, the flat board of making by synthetic resin, and have two of making leaf spring 1d().The 2nd, circuit board.The 4th, integrated circuit (IC) chip (same with the above-mentioned embodiment), the 3rd, circuit unit lid.On circuit board 2, has hole 2K, the shape in this hole and the profile of integrated circuit (IC) chip are basic identical, and with the corresponding line pattern line of each end points be unsettled (reaching in the hole), integrated circuit (IC) chip 4 places the hole 2K of circuit board 2, each end points of integrated circuit (IC) chip 4 and and the corresponding line pattern line of these end points between compress by the making leaf spring 1d on the flat board and circuit unit lid 3 and to obtain electric conductivity.Among the present invention, line pattern is formed on the circuit board, but also can be without circuit board, and form line pattern (corresponding) on dull and stereotyped 1 surface with the end points of integrated circuit (IC) chip with method of printing, and on dull and stereotyped 1, provide projection (as shown in Figure 7) so that make the integrated circuit (IC) chip location.According to the foregoing description, can make to have electric conductivity between the end points of integrated circuit (IC) chip and the line pattern line by means of reed, but also can adopt elastic components such as volute spring, rubber.In addition, the foregoing description can be made up and reach various excellent results.
Figure 13 is the planimetric map of integrated circuit (IC) chip to Figure 16, other embodiment of expression integrated circuit installation direction recognition device.Among Figure 13, the position of the end points of integrated circuit (IC) chip 4 is identical among the position of the end points of integrated circuit (IC) chip 4 and Fig. 1, and integrated circuit (IC) chip 4 include the stepper motor of feeding exit point 4a and 4b, crystal unit end points 4c and 4d, end points 4g, V reset
DDEnd points (+end) 4e, V
SSEnd points (end) 4f is used for the test end points 4h and the 4i of test circuit component, is used for writing down the record end points 4 that clocking rate is adjusted data etc.
j, the test end points 4l(that is used for the testing integrated circuit chip cellular construction does not need the line pattern line in the relevant position), wherein, above-mentioned end points is golden boss.The installation direction of integrated circuit (IC) chip 4 only may be by above-mentioned test end points 4l identification.In addition, shown in dotted line, if get face 4m, then just do not need to remove direction indication over there from the face that end points is arranged.Thereby can improve installation method.Provide distinguishing mark 4n(to dot with printing or other method at the back side of integrated circuit (IC) chip 4 (reverse side that end facet is arranged)) to replace face 4m also be desirable.When integrated circuit (IC) chip has face 4m and distinguishing mark 4n, just do not need the device of aforesaid employing direction indication on each end points.
Among Figure 14, from end facet is arranged, integrated circuit (IC) chip 41 includes exit point 41a and 41b, crystal unit end points 41c and 41d, end points 41e, V reset
DDEnd points 41f, V
SSEnd points 41g, end points 41m, 41n, 41p, 41q, 41r and the 41s of the test end points 41K of test end points 41h, the 41i of integrated circuit (IC) chip 41 and 41j, testing circuit assembly and 41l, adjusting logical circuit and when keeping in repair afterwards by cutting off plus-minus (AS) end points 41t, 41u and the 41v that line is regulated clocking rate.In this case, can be in test end points 41k place's identification direction.And, can pass through V
SSRange difference between end points 41g and the AS end points 41t is discerned direction.In addition, for example can make the size of the physical dimension of test lead point 4j, shown in fine rule among the figure greater than other end points.Do end points circular or other shape (expression) in the accompanying drawings to replace flat shape also good.
Among Figure 15, from the face of end points is arranged, each end points of integrated circuit (IC) chip 42 is same as the structure among Figure 11.Since on side 42w, there is not end points, as shown in the figure, so just can differentiate direction according to side 42w.
Figure 16 is the integrated circuit (IC) chip 43 that all end points all are positioned at dual-side, in integrated circuit (IC) chip 43, has changed the material of end points, for example uses the cored solder boss as test end points 43a, and the golden boss of other end points is discerned direction by color.And, also can be by the transistorized position of forming integrated circuit (IC) chip, the position of resistance, these external morphologies of shape that connect the line of each element are discerned direction.Can change the end points height to be different from other end points, projection and groove can be provided at the back side of integrated circuit (IC) chip.On the ground more inner an end points 43a ' can be set than other end-point distances side, shown in fine rule among the figure, otherwise, also can, and can utilize the combination of several end points.
Said method can be made up the direction of recognition integrated circuit chip mutually, thereby improve reliability widely.In the above-described embodiments, which is provided with the face of composition integrated circuit (IC) chip such as transistor as the face that end points is arranged.
As mentioned above, according to the present invention, the compacted electric conductivity that obtains of the end points of integrated circuit (IC) chip and line pattern line, thus avoided installation process with spun gold binding, melting welding or soldering.And owing in installation process, do not have foul, thereby can save cleaning process.In addition, because integrated circuit (IC) chip is dismountable, when breaking down, fault or integrated circuit (IC) chip and circuit board easily they are changed so just can install in appearance.Device in the direction that the indication integrated circuit (IC) chip is provided on the integrated circuit (IC) chip makes when integrated circuit (IC) chip is installed, the line of circuit connection figure and the end points of integrated circuit (IC) chip can be aimed on the position that requires, thereby make this assembling repair also can prevent wrong assembling easily.Because the contact pressure in boss (providing in integrated circuit (IC) chip and line pattern at least) contact portion has improved, thereby the conduction reliability has also improved.
Below accompanying drawing is made brief description:
Fig. 1 is the plan view of one embodiment of the present of invention.
Fig. 2 and Fig. 3 are the partial sectional views of Fig. 1.
Fig. 4 is the partial sectional view and the plan view of other embodiments of the invention to Figure 12.
Figure 13 is a plan view to Figure 16, the embodiment of the device of expression identification integrated circuit (IC) chip installation direction of the present invention.
1 ... dull and stereotyped
2 ... circuit board
3 ... the circuit unit lid
4,41,42,43 ... integrated circuit (IC) chip
5 ... crystal unit
6 ... coil block
7 ... battery
8 ... cell connector (-)
10 ... the stepping rotor
11 ... stator
Claims (7)
1, a kind of mounting structure of IC chip for timepiese comprises integrated circuit (IC) chip, line pattern, it is characterized in that, described integrated circuit (IC) chip has a plurality of end points;
Described line pattern is formed on a substrate, and the line of this line pattern is corresponding with each end points of said integrated circuit (IC) chip;
An erecting frame of being made up of insulating component, this erecting frame are used for said integrated circuit (IC) chip of closed assembly and said substrate; And
A kind ofly utilize elastic part pressurization, make the part that presses that obtains electric conductivity between said line pattern and the said integrated circuit (IC) chip, wherein, said integrated circuit (IC) chip and said substrate are installed in said erecting frame and said pressing between the part.
2, according to the mounting structure of the said IC chip for timepiese of claim 1, wherein, forming boss on the said integrated circuit (IC) chip or on the said line pattern at least.
3, according to the mounting structure of the said IC chip for timepiese of claim 1, wherein, has the device that to indicate installation direction on the said integrated circuit (IC) chip.
4, according to the mounting structure of the said IC chip for timepiese of claim 1, wherein, a localization part is arranged on said insulating component or said erecting frame at least, this localization part is used for limiting the planimetric position of said integrated circuit (IC) chip.
5, according to the mounting structure of the said IC chip for timepiese of claim 1, wherein, one section of said line pattern line has elasticity.
6, according to the mounting structure of the said IC chip for timepiese of claim 1, wherein, said erecting frame is made up of the hardware that has insulation course on it.
7, according to the mounting structure of the said IC chip for timepiese of claim 1, wherein, form line pattern on said erecting frame, this line pattern line is corresponding with each end points of said integrated circuit (IC) chip.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP169704/87 | 1987-11-06 | ||
| JP1987169704U JPH0544794Y2 (en) | 1987-11-06 | 1987-11-06 | |
| JP280502/87 | 1987-11-06 | ||
| JP62280502A JPH01123189A (en) | 1987-11-06 | 1987-11-06 | Structure for mounting ic chip for timepiece |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1033116A CN1033116A (en) | 1989-05-24 |
| CN1016289B true CN1016289B (en) | 1992-04-15 |
Family
ID=26492957
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN88104877A Expired CN1016289B (en) | 1987-11-06 | 1988-08-06 | Mounting structure for ic chip for timepiese |
Country Status (2)
| Country | Link |
|---|---|
| KR (1) | KR910008672B1 (en) |
| CN (1) | CN1016289B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100464865C (en) * | 2002-12-27 | 2009-03-04 | 尼多布连株式会社 | Nozzle and ejector |
-
1988
- 1988-04-04 KR KR1019880003776A patent/KR910008672B1/en not_active IP Right Cessation
- 1988-08-06 CN CN88104877A patent/CN1016289B/en not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100464865C (en) * | 2002-12-27 | 2009-03-04 | 尼多布连株式会社 | Nozzle and ejector |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1033116A (en) | 1989-05-24 |
| KR910008672B1 (en) | 1991-10-19 |
| KR890009232A (en) | 1989-07-15 |
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| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C13 | Decision | ||
| GR02 | Examined patent application | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C15 | Extension of patent right duration from 15 to 20 years for appl. with date before 31.12.1992 and still valid on 11.12.2001 (patent law change 1993) | ||
| OR01 | Other related matters | ||
| C19 | Lapse of patent right due to non-payment of the annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |