CN101626359A - Frequency-domain synchronous circuit structure applicable to CMMB and DVB-H - Google Patents

Frequency-domain synchronous circuit structure applicable to CMMB and DVB-H Download PDF

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CN101626359A
CN101626359A CN200910056140A CN200910056140A CN101626359A CN 101626359 A CN101626359 A CN 101626359A CN 200910056140 A CN200910056140 A CN 200910056140A CN 200910056140 A CN200910056140 A CN 200910056140A CN 101626359 A CN101626359 A CN 101626359A
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邵楠
李斯梦
陈赟
曾晓洋
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Fudan University
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Abstract

The invention belongs to the technical field of wireless digital communication, and particularly relates to a frequency-domain synchronous circuit structure which can support the China mobile multimedia standard CMMB and European mobile multimedia standard DVB-H simultaneously. The frequency-domain synchronous circuit structure mainly comprises an integral multiple carrier deviation estimation module, a descrambling module, a residual carrier deviation and sampling deviation estimation module, a control module and the like. The integral multiple carrier deviation estimation module supports the integral multiple carrier deviation estimation with two types of standards, namely CMMB and DVB-H; the descrambling module is applied to scrambling mode recognition under the CMMB mode and descrambling operation; and the residual carrier deviation and sampling deviation estimation module supports the residual carrier deviation and sampling deviation estimation with two types of standards. According to the similarity of the frequency domain structures with two types of standards, the frequency-domain synchronous circuit structure discloses a structure which realizes the maximum multiplexing by lowest hardware cost, thus using one set of hardware structures to support the frequency domain synchronization with two types of standards.

Description

A kind of frequency-domain synchronous circuit structure that is applicable to CMMB and DVB-H
Technical field
The invention belongs to the radio digital communication technical field, be specifically related to a kind of frequency-domain synchronous circuit structure of supporting CMMB and two kinds of mobile multimedia standards of DVB-H simultaneously.
Background technology
Nowadays the mobile multimedia technology has been able to application more and more widely.Along with the issuing and implementation of the multimedia standardization CMMB of China Mobile, mobile multimedia has obtained further popularizing.The many standards of multimode are the trend of current mobile multimedia technical development, realize that in different regions the reception to program under the various criterion also is the requirement of the many standard evolution of multimode with same set of terminal.Simultaneous techniques is as part and parcel in the receiving terminal, and its research in the multimode receiving terminal is used and also had very important significance.
Research is main mobile multimedia standard such as European standard DVB-H at present, and Chinese Industrial Standards (CIS) CMMB finds that they have certain general character on frame structure.Promptly all adopt multi-carrier OFDM (OFDM) modulation system, all be based on the transmission system of pilot tone, all adopted time-domain symbol structure of Cyclic Prefix+data volume or the like.Choosing of synchronized algorithm then is feature according to frame structure, so these general character have determined the synchronization scenario that can seek a kind of fusion to support each standard.
Demand and the general character of each mobile multimedia standard on frame structure based on the many standards of multimode, the present invention proposes a kind of hardware configuration of fusion, can support the mobile multimedia standard C MMB and the DVB-H of present two kinds of main flows simultaneously, realize maximum hardware multiplexing.
Summary of the invention
The object of the invention is to provide a kind of frequency-domain synchronous circuit structure of supporting CMMB and two kinds of standards of DVB-H simultaneously, realizes maximum hardware multiplexing.
The present invention is the general character on frame structure according to CMMB and two kinds of standards of DVB-H, a kind of hardware configuration of fusion has been proposed, realize simultaneously to two kinds of supports that the standard frequency domain is synchronous, mainly by integral multiple carrier deviation estimation module, the descrambling code module, residual carrier frequency deviation and sampling frequency offset estimation module constitute, thereby each module has all been considered the general character of two kinds of standards on synchronization scenario and has been realized that hardware merges, and work by gating signal control disparate modules, thereby realize the time-sharing multiplex of disparate modules, further improved the hardware utilance the identity function submodule.Concrete structure as shown in Figure 1, inputoutput specification is as shown in table 1.Mode select signal MODE_SEL controls work at present pattern (being CMMB or DVB-H), and is integral multiple carrier deviation estimation module, the descrambling code module, and the residual carrier frequency deviation is sent into different parameter values with the sampling frequency offset estimation module.At first carry out the estimation of integer-time carrier wave frequency deviation, provide after estimation and compensation are finished and finish signal IFO_DONE, if present mode is that the CMMB pattern then starts the descrambling code module; If present mode is that the DVB-H module then starts residual carrier frequency deviation and sampling frequency offset estimation module.After finishing, descrambling code starts over-carriage ripple frequency deviation and sampling frequency offset estimation module for the CMMB pattern.
Integral multiple carrier deviation estimation module is in order to realize the estimation of integer-time carrier wave frequency deviation.Concrete structure as shown in Figure 2, inputoutput specification is as shown in table 2.By data buffer storage unit, the pilot frequency locations memory cell, correlation module, control module and pseudo random sequence generation module (being applied to the CMMB standard) are formed.The present mode of mode select signal MODE_SEL decision-making circuit work (being CMMB or DVB-H), sending into MUX (MUX) module selects, chosen content has: the cache contents of (1) data buffer storage unit, if CMMB pattern, then synchronizing signal of buffer memory; If DVB-H pattern, then two continuous OFDM symbols of buffer memory.(2) address of reading of data buffer storage unit is controlled, if the CMMB pattern, then reading address control signal is the position+data-bias ifo of PN (pseudorandom) sequence; If the DVB-H pattern is then read position+data-bias that address control signal is a continuous pilot.Mode select signal is also selected the mode of operation of pseudo random sequence generation module by combinational logic gate, this module is only worked under the CMMB pattern.Data buffer storage unit writes by mode select signal and reads after finishing, and the result that will read out sends into correlation module and carries out related operation.This moment, the result of related operation also needed to be correlated with the output of pseudo random sequence generation module if present mode is the CMMB pattern; Whether if present mode is the DVB-H pattern, then the result of related operation directly sends into subordinate's computing, be correlated with by mode select signal control MUX realization with the output of pseudo random sequence generation module.The output of this MUX sends into and adds up-and absolute value block adds up and asks absolute value.Then send into comparator, the initial value of comparator is made as 0.When input value during greater than the comparator initial value, then replacing current initial value becomes new initial value; If then keep original initial value less than the comparator initial value.After all default data-bias situation traversals finished, the data-bias ifo of the comparator maximum correspondence that obtains was exactly the integer-time carrier wave frequency deviation of estimating.Send after integral multiple carrier deviation estimation and the compensation and finish signal, drive the next stage module.If the CMMB pattern then drives the descrambling code module; If the DVB-H pattern then drives residual carrier frequency deviation and sampling frequency offset estimation module.
The descrambling code module, peculiar for the CMMB standard, only need gating work under the CMMB pattern, in order to the identification of scrambler pattern and to the correct descrambling of frequency domain data.Concrete structure as shown in Figure 3, inputoutput specification is as shown in table 3.By the pseudo random sequence generation module, correlation module, control module and pilot frequency locations memory cell are formed.The pseudo random sequence generation module produces the scrambler of 6 kinds of different initial values respectively by the control SRAM_MODE of input.The position of pilot frequency locations cell stores pilot tone judges that by reading this unit current input is a pilot tone, if pilot tone then postpones to arrive up to the same position pilot tone of next symbol.Be correlated with again behind 6 kinds of scrambler descramblings that the pilot tone of two symbols produces with the pseudo random sequence generation module respectively and add up, produces six kinds be correlated with add up with.Because the pilot tone in correct latter two continuous symbol of descrambling has correlation, therefore obtaining the scrambler mode that maximum takes is exactly the scrambler pattern.Can carry out descrambling to symbol afterwards after the scrambler pattern is determined, realize by the conjugation-module that multiplies each other.
Residual carrier frequency deviation and sampling frequency offset estimation module are in order to estimate residual carrier frequency deviation and sampling frequency offset.Concrete structure as shown in Figure 4, inputoutput specification is as shown in table 4.By correlation module, the argument computing module, pilot tone buffer unit and pilot frequency locations memory cell are formed.Mode select signal MODE_SEL selects the pattern of work at present, judgement by MUX control pilot frequency locations, thereby carry out the pilot tone buffer memory, the pilot tone of continuous two symbols of buffer memory is correlated with, send into the argument computing module then and ask the argument computing, carry out then obtaining final estimated result after some constant coefficient computings.Constant coefficient is different under CMMB and DVB-H, and storage is in advance selected by mode select signal then.
All used the pseudo random sequence generation module in integral multiple carrier deviation estimation module and the descrambling code module, it is the initial value of formation sequence, the shift register number is different with feedback signal, and does not work simultaneously, therefore can carry out multiplexing to the additional control signal of a shift register group.Concrete structure as shown in Figure 5, inputoutput specification is as shown in table 5.It can be made up of control module and shift register group (sequence), and control module changes initial value, shift register number, feedback signal, thereby is applied to different modules.The mode of operation (generating synchronous signal sequence or scrambler) of mode select signal MODE_SEL control pseudo random sequence generation module, select by selector MUX, chosen content has: the initial value of (1) shift register group, if generate the initial value that synchronizing signal is then selected synchronizing signal; Then select a certain in concrete 6 kinds of patterns if generate scrambler.(2) number of shift register group then is 11 if generate synchronizing signal; Then be 12 if generate scrambler.(3) feedback signal of shift register group, if generate synchronizing signal then the 9th and the 11st shift register of gating carry out mould two additions and feed back to the 1st register; If generate scrambler then the 6th, 8,11,12 shift registers of gating carry out mould two additions and feed back to the 1st register.(4) output valve, the generation synchronizing signal is then established the 11st shift register and is output as effectively; If the generation scrambler is then established the 9th and the 12nd shift register and is output as effectively.Above step is finished the work of pseudo random sequence generation module under institute's lectotype.
The foregoing invention content can satisfy well to the synchronous support of frequency domain under CMMB and two kinds of standards of DVB-H, has realized two kinds of fusions that the standard frequency domain is synchronous with a cover hardware configuration, improves the hardware utilance simultaneously, realizes maximum hardware multiplexing.
Description of drawings
Fig. 1 is applicable to the synchronous whole hardware structure diagram of the frequency domain of CMMB and DVB-H
Fig. 2 integral multiple carrier deviation estimation module structure chart
Fig. 3 descrambling code modular structure figure
Fig. 4 residual carrier frequency deviation and sampling frequency offset estimation module structure chart
Fig. 5 pseudo random sequence generation module structure chart
Embodiment
According to the scheme in the summary of the invention, be applicable to that the embodiment of frequency-domain synchronous circuit of CMMB and DVB-H is as follows:
(1) at first carries out the estimation of integer-time carrier wave frequency deviation.
For the CMMB standard, the integral multiple carrier deviation estimation algorithm is as follows:
C(k)=R(k)·R *(k+D)·PN(k-m)
ifo ^ = arg max | Σ k ∈ M + ifo C ( k ) | , ifo ∈ [ - i max , i max ]
R (k) wherein, k and k+D the symbol of the synchronizing signal after R (k+D) expression FFT (fast fourier transform) demodulation, " *" the expression conjugate operation, the displacement of the local PN sequence of PN (k-m) expression. The integer-time carrier wave frequency deviation that expression is estimated, set M represents the set of selected PN sequence, set [i Max, i Max] the expression algorithm maximum integer frequency multiplication that can detect is inclined to one side.
For the DVB-H standard, the integral multiple carrier deviation estimation algorithm is as follows:
C ( k ) = Z n ( k ) · Z n - 1 * ( k )
ifo ^ = arg max | Σ k ∈ P + ifo C ( k ) | , ifo ∈ [ - i max , i max ]
Z wherein n(k), Z N-1(k) represent behind the FFT k symbol in n and n-1 the ofdm signal respectively, gather the set that P represents continuous pilot, gather [i Max, i Max] the expression algorithm maximum integer frequency multiplication that can detect is inclined to one side.
Can find that two kinds of algorithms all are based on the method for relevant-maximizing, just need data in buffer and relevant mode inequality.Therefore can followingly handle:
For data buffer storage unit, when present mode is CMMB, synchronizing signal of buffer memory; When present mode is DVB-H, two continuous OFDM symbols of buffer memory.
When present mode was CMMB, the symbol in the reading of data buffer unit postponed to be correlated with continuously; When present mode is DVB-H, come the symbol in the reading of data buffer unit to be correlated with by the position of reading pilot tone in the pilot frequency locations memory cell.
When present mode was CMMB, the result after being correlated with need multiply by PN (k-m), and PN (k-m) is produced by the pseudo random sequence generation module.But because the value of PN (k-m) is 1 and-1, the need that only therefore multiply each other are with to the multiplicand negate or get initial value and realize getting final product.
The relevant result who adds up sends into control module, judges maximum, as set [i Max, i Max] when traversal finished, obtained peaked ifo value promptly was estimated integer frequency offset.
The integer frequency offset estimation module only needs work once, and integral multiple carrier deviation estimation is also proofreaied and correct to provide afterwards and finished signal, for the DVB-H system, starts residual carrier frequency deviation and sampling frequency offset estimation module; For the CMMB system, start the descrambling code module, this module is that the CMMB system is peculiar.
(2) algorithm of descrambling code module is as follows:
According to " continuous pilot of the two adjacent OFDM symbol of correct descrambling has correlation ", the scrambler algorithm for pattern recognition is as follows:
s cram = arg max i ∈ [ 0,5 ] | Σ k ∈ P [ ( Z n ( k ) · P c , i * ( n × N V + k ) ) · ( Z n - 1 ( k ) · P c , i * ( ( n - 1 ) × N V + k ) ) * ] |
P wherein C, i(k), i ∈ [0,5] represents the scrambler value under the different scrambler patterns, N VRepresent effective subcarrier (comprising data subcarrier and pilot tone) number in each OFDM symbol.P C, i(k) have six kinds of values, produce by the pseudo random sequence generation module.
Can carry out descrambling after the scrambler mode decision, the OFDM symbol same P of descrambling after by FFT C, i(k) multiply each other and finish.Because P C, i(k) value is
Figure G200910056140XD00052
Can regard as with ± 1 ± i and multiply each other, therefore multiply each other and only need or get initial value and realize the multiplicand negate.
The descrambling code module need be worked always.For the CMMB pattern, provide behind each OFDM symbolic solution scrambler and finish signal, can start residual carrier frequency deviation and sampling frequency offset estimation module.
(3) algorithm of residual carrier frequency deviation and sampling frequency offset estimation module is as follows:
For two kinds of standards, the algorithm that residual carrier frequency deviation and sampling frequency offset are estimated all can be represented by the formula:
D ( k ) = Z n ( k ) · Z n - 1 * ( k ) , k ∈ P
β = Σ k ∈ P 1 arg ( D ( k ) ) - Σ k ∈ P 2 arg ( D ( k ) ) 2 π ( N s / N ) ( Σ k ∈ P 1 k - Σ k ∈ P 2 k ) , ϵ = Σ arg ( D ( k ) ) 2 π ( N s / N ) · M - Σ P 2 k + Σ P 2 k M - 1 β
Wherein gather P and represent the set of continuous pilot, set P1, P2 represent respectively the first half of continuous pilot and back half, M represents the continuous pilot number chosen, N s, N represents to contain Cyclic Prefix respectively and does not contain Cyclic Prefix OFDM symbol lengths, in CMMB and DVB-H standard different values is arranged all.The sampling frequency offset of β for estimating, the residual carrier frequency deviation of ε for estimating.
The basic operation of this module is identical as can be seen, is corresponding various criterion set P difference.Therefore only need location storage with continuous pilot under two kinds of standards in different pilot frequency locations memory cell, select to read different pilot frequency locations memory cell according to present mode, thus in the pilot tone buffer unit the different signal of buffer memory.The signal of buffer memory is correlated with, and argument is calculated, and chooses different N according to different patterns then s, N, the M value is finished the calculating of residual frequency deviation and sampling frequency offset.
(4) same hardware multiplexing between disparate modules:
In integral multiple carrier deviation estimation, descrambling code, residual carrier frequency deviation and sampling frequency offset are estimated all to have used correlation module in three modules.Relevant be in the nature complex multiplication and summation.Because three modules do not work simultaneously, thus correlation module can be in three primary modules time-sharing multiplex.Because relevant not strict to the requirement of sequential, not needing walk abreast multiplies each other and sues for peace, so can only use a complex multiplier and an accumulator, reduces hardware costs greatly.
Under the CMMB pattern, integral multiple carrier deviation estimation and descrambling code module have all been used the pseudo random sequence generation module, and these two modules are not worked simultaneously.Therefore can a shared pseudo random sequence generation module, with the initial value of this module, the shift register number, feedback signal is made configurable, promptly can be applicable to above-mentioned two modules, concrete structure as shown in Figure 5, inputoutput specification is as shown in table 5.
In such scheme, the hardware that has used the present invention to propose merges multiplexing, frequency domain synchronization scenario with monotype is compared, some control circuits and little memory cell have only been added, can realize the synchronous support of frequency domain under two kinds of standards, realize CMMB and two kinds of synchronous fusions of standard frequency domain of DVB-H with a cover hardware configuration.
Figure G200910056140XD00061
The whole hardware structure diagram inputoutput specification of table 1.
Figure G200910056140XD00071
Table 2. integral multiple carrier deviation estimation module inputoutput specification
Figure G200910056140XD00072
Table 3. descrambling code descrambling code module inputoutput specification
Figure G200910056140XD00073
Table 4. residual carrier frequency deviation and sampling frequency offset estimation module inputoutput specification
Figure G200910056140XD00081
Table 5. pseudo random sequence generation module inputoutput specification

Claims (6)

1. a frequency-domain synchronous circuit structure that is applicable to CMMB and DVB-H is characterized in that, by integral multiple carrier deviation estimation module, and the descrambling code module, residual carrier frequency deviation and sampling frequency offset estimation module constitute;
Integral multiple carrier deviation estimation module, the integral multiple carrier deviation estimation of support CMMB and two kinds of standards of DVB-H;
The descrambling code module is applied to the computing of scrambler pattern recognition and descrambling code under the CMMB pattern;
Residual carrier frequency deviation and sampling frequency offset estimation module support the residual carrier frequency deviation of two kinds of standards and sampling frequency offset to estimate;
Mode select signal MODE_SEL control work at present pattern is CMMB or DVB-H, and is integral multiple carrier deviation estimation module, the descrambling code module, and the residual carrier frequency deviation is sent into different parameter values with the sampling frequency offset estimation module; At first carry out the estimation of integer-time carrier wave frequency deviation, provide after estimation and compensation are finished and finish signal IFO_DONE,, after descrambling code is finished, start over-carriage ripple frequency deviation and sampling frequency offset estimation module if present mode is that the CMMB pattern then starts the descrambling code module; If present mode is that the DVB-H module then starts residual carrier frequency deviation and sampling frequency offset estimation module.
2. circuit structure according to claim 1, it is characterized in that in two kinds of standards, the estimation of integral multiple carrier deviation estimation module all is based on the relevant of frequency domain signal specific, it is by data buffer storage unit, the pilot frequency locations memory cell, correlation module, control module and pseudo random sequence generation module are formed;
The present mode of mode select signal MODE_SEL decision-making circuit work is CMMB or DVB-H, sending into MUX MUX module selects, chosen content has: the cache contents of (1) data buffer storage unit, if CMMB pattern, then synchronizing signal of buffer memory; If DVB-H pattern, then two continuous OFDM symbols of buffer memory; (2) address of reading of data buffer storage unit is controlled, if the CMMB pattern, then reading address control signal is the position+data-bias ifo of PN sequence; If the DVB-H pattern is then read position+data-bias that address control signal is a continuous pilot; Mode select signal is also selected the mode of operation of pseudo random sequence generation module by combinational logic gate, this module is only worked under the CMMB pattern; Data buffer storage unit writes by mode select signal and reads after finishing, and the result that will read out sends into correlation module and carries out related operation; This moment, the result of related operation also needed to be correlated with the output of pseudo random sequence generation module if present mode is the CMMB pattern; Whether if present mode is the DVB-H pattern, then the result of related operation directly sends into subordinate's computing, be correlated with by mode select signal control MUX realization with the output of pseudo random sequence generation module; The output of this MUX sends into and adds up-and absolute value block adds up and asks absolute value; Then send into comparator, the initial value of comparator is made as 0; When input value during greater than the comparator initial value, then replacing current initial value becomes new initial value; If input value then keeps original initial value less than the comparator initial value; After all default data-bias situation traversals finished, the data-bias ifo of the comparator maximum correspondence that obtains was exactly the integer-time carrier wave frequency deviation of estimating; Send after integral multiple carrier deviation estimation and the compensation and finish signal, drive the next stage module; If the CMMB pattern then drives the descrambling code module; If the DVB-H pattern then drives residual carrier frequency deviation and sampling frequency offset estimation module.
3. circuit structure according to claim 1 is characterized in that, the descrambling code module is finished the pattern recognition and the descrambling code of scrambler, by the pseudo random sequence generation module, and correlation module, control module and pilot frequency locations memory cell are formed;
The pseudo random sequence generation module produces the scrambler of 6 kinds of different initial values respectively by input control SRAM_MODE; The position of pilot frequency locations cell stores pilot tone judges that by reading this unit current input is a pilot tone, if pilot tone then postpones to arrive up to the same position pilot tone of next symbol; Be correlated with again behind 6 kinds of scrambler descramblings that the pilot tone of two symbols produces with the pseudo random sequence generation module respectively and add up, produces six kinds be correlated with add up with; Obtaining the scrambler mode that maximum takes is exactly the scrambler pattern; Can carry out descrambling to symbol afterwards after the scrambler pattern is determined, realize by the conjugation-module that multiplies each other.
4. circuit structure according to claim 1, it is characterized in that, in two kinds of standards, residual carrier frequency deviation and sampling frequency offset are estimated by the relevant of continuous pilot in the adjacent two symbols and are got argument and finish, residual carrier frequency deviation and sampling frequency offset estimation module are by correlation module, the argument computing module, pilot tone buffer unit and pilot frequency locations memory cell are formed;
Mode select signal MODE_SEL selects the pattern of work at present, judgement by MUX control pilot frequency locations, thereby carry out the pilot tone buffer memory, the pilot tone of continuous two symbols of buffer memory is correlated with, send into the argument computing module then and ask the argument computing, carry out then obtaining final estimated result after some constant coefficient computings.
5. according to claim 2,3 or 4 described circuit structures; It is characterized in that correlation module is the Multiplexing module of integral multiple carrier deviation estimation module, descrambling code module, residual carrier frequency deviation and sampling frequency offset estimation module, and not in synchronization work, correlation module adopts serial relevant, and only uses a complex multiplier.
6. according to claim 2 or 3 described circuit structures, it is characterized in that the pseudo random sequence generation module is the Multiplexing module of integral multiple carrier deviation estimation module and descrambling code module, it is made of control module and shift-register sequence; Control module changes initial value, shift register number, feedback signal, thereby is applied to disparate modules.
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