CN101615242A - Method for marking connected region, processor and system based on the two dimensional image of vector processor - Google Patents
Method for marking connected region, processor and system based on the two dimensional image of vector processor Download PDFInfo
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Abstract
The invention discloses a kind of method for marking connected region, processor and system of the two dimensional image based on vector processor, method for marking connected region based on the two dimensional image of vector processor may further comprise the steps: the bianry image that comprises connected component labeling is carried out the unique value mark, obtain the picture element matrix of unique value mark; Picture element matrix to the unique value mark carries out the dummy section processing; Repeat the picture element matrix after the dummy section processing is carried out dissemination process and rotation processing, obtain last connected region; Wherein, when picture element matrix is carried out dissemination process, be that unit carries out waterfall type scanning with the vector.
Description
Technical field
The present invention relates to image processing techniques, especially, relate to method for marking connected region and system based on the two dimensional image of vector processor (vectorprocessor).
Background technology
Connected component labeling (Connected Components Labeling) is the process that the neighborhood territory pixel (contiguous pixels) to bianry image is given identical element marking, this processing is basic processing method during two dimensional image (2-D image) is handled, and be that a lot of real images are handled application, the basis of technology such as for example image is discerned automatically, image tracking.
The definition that key concept is exactly a neighborhood that connected component labeling is handled, in the prior art, 4-neighborhood (being that four pixels in center pixel and upper and lower, left and right thereof are formed the 4-field jointly) and 8-neighborhood (be center pixel and on every side 8 pixels form the 8-neighborhood jointly).For example handle in the region-growing method of the longest use at connected component labeling, at first image is carried out line by line (row) scanning, whenever to unlabelled " a 1 " pixel, just distribute an one original label, then its neighborhood is detected, if any " 1 " pixel of unmarked mistake, then give identical label.Carry out this operation repeatedly. up to not existing label be the pixel of " 1 ".Continue image line (row) scanning then, declare unlabelled " 1 " pixel as detection and then give its new label, and carry out and above identical processing.The entire image end of scan, algorithm also just stop.The present invention is treated to example with the 4-neighborhood.
In a lot of actual Flame Image Process are used, require connected component labeling fast, for example application such as rapid image tracking.Therefore, in order in two dimensional image is handled, to carry out connected component labeling fast, usually use the processor of SIMD type (Single Instruction Multiple Dataprocessor) in the prior art.The SIMD processor is a kind of vector processor, has parallel processing structure, in this structure, central control processor sends instruction, and a plurality of single-processors are carried out behavior same, that be equal to (for example retrieve, calculate, storage etc.) etc. simultaneously on two or more data clauses and subclauses.The SIMD processor can carry out parallel processing, like this can speed up processing.
Existingly carry out in the method that connected component labeling handles with the SIMD processor, among the U.S. Pat 7340113B2 (Image Processing Apparatus with SIMD-typeMicroprocessor to perform labeling) a kind of image processing equipment is disclosed for example, comprise a SISD (Single instruction stream and single data stream) center processor of type and the auxiliary processor of a plurality of SIMD types, carry out the scanning of the both direction of 4-neighborhood by the auxiliary processor of SIMD type.Because the processor of SIMD type has only register in this method, does not have oneself storer, cause the buffer memory of data of processing very limited, processing speed is ideal not enough; And although can the support vector computing on the processor hardware of the SIMD type in this disposal system, this disposal system not be utilized the vector operation unit in the connected component labeling processing procedure, and therefore, it is very limited that its processing speed remains.
In image processing field, for the Flame Image Process computing that requires processing speed, often adopt graphics acceleration card from hardware in addition, because the price of graphics acceleration card is all very expensive, therefore, the image processing equipment overall cost of this special use is all very high.
Summary of the invention
Therefore, need a kind of method for marking connected region and system of the two dimensional image based on vector processor, this method and system can solve the problem that existing method in the Flame Image Process can not obtain connected component labeling fast.
According to an aspect of the present invention, provide a kind of method for marking connected region of the two dimensional image based on vector processor, this method comprises:
The bianry image that comprises connected component labeling is carried out the unique value mark, obtain the picture element matrix of unique value mark;
Picture element matrix to the unique value mark carries out the dummy section processing;
Picture element matrix after the dummy section processing is repeated dissemination process and rotation processing, obtain last connected region;
Wherein, when picture element matrix is carried out dissemination process, be that unit carries out waterfall type scanning with the vector.
According to another aspect of the present invention, provide a kind of vector processor that is used for the connected component labeling of two dimensional image, having comprised:
Local storage is used to store the instruction and data of carrying out on this vector processor;
Vector calculation unit is used for that the bianry image that receives is carried out connected component labeling and handles, and to described bianry image, carries out following steps:
Each pixel of unique value mark, the picture element matrix of acquisition unique value mark;
Picture element matrix to the unique value mark carries out the dummy section processing;
Picture element matrix after the dummy section processing is repeated dissemination process and rotation processing, obtain last connected region;
Wherein, when picture element matrix is carried out dissemination process, be that unit carries out waterfall type scanning with the vector;
Overall situation control module is used for the instruction repertorie decoding to carrying out on the vector processor, produces control signal;
Register is used to store described vector calculation unit data to be processed; And
Data transmission unit is used for swap data between local storage, vector calculation unit and the register.
According to a further aspect of the invention, provide a kind of method for marking connected region of the two dimensional image based on vector processor, this method comprises:
Described bianry image is divided into the experimental process image;
Each of described experimental process bianry image is distributed to each vector processor;
The sub-bianry image of each vector processor to receiving uses the method for claim 1-8 to obtain connected region;
The connected region of each vector processor output is spliced.
According to a further aspect of the invention, a kind of connected component labeling system of the two dimensional image based on vector processor is provided, comprise an external control devices and one or more vector processor, described external control devices and described one or more vector processor are of coupled connections, described external control devices is used for bianry image is distributed to described one or more vector processor, and described vector processor comprises:
Local storage is used to store the instruction and data of carrying out on this vector processor;
Vector calculation unit is used for that the bianry image that receives is carried out connected component labeling and handles, and to described bianry image, to the sub-bianry image that receives, uses the method for claim 1-8 to obtain connected region;
Overall situation control module is used for the instruction repertorie decoding to carrying out on this vector processor, produces control signal;
Register is used to store described vector calculation unit data to be processed; And
Data transmission unit is used for swap data between local storage, vector calculation unit and the register.
External interface is used for described vector processor and described external control devices exchange message.
Technical scheme of the present invention has following advantage:
(1) high efficiency: compared with prior art, vector processor of the present invention comprises local storage, improved processing speed, and the present invention has made full use of the vector calculation unit of vector processor, reduce destruction vector processor branching of pipes structure, improved the processing speed of connected component labeling in the Flame Image Process greatly.
(2) low price: compare with the implementation of existing use hardware graphics accelerator card, the method for marking connected region and the system price of the two dimensional image based on vector processor of the present invention are lower.
Description of drawings
By the more detailed description to illustrated embodiments of the invention mode in the accompanying drawing, above-mentioned and other purpose, feature and advantage of the present invention will become more obvious, and wherein, identical reference number is represented the same parts in the illustrated embodiments of the invention mode usually.
Fig. 1 schematically shows according to an embodiment of the invention the structured flowchart based on the connected component labeling system of the two dimensional image of vector processor;
Fig. 2 shows the workflow when carrying out connected component labeling according to an embodiment of the invention;
Fig. 3 shows the bianry image pixel synoptic diagram of a width of cloth 8*8 size;
Fig. 4 shows the picture element matrix of unique value mark of the bianry image of Fig. 3;
Picture element matrix after the picture element matrix dummy section that Fig. 5 shows Fig. 4 is handled;
Fig. 6 schematically shows the processing procedure of propagation steps;
Fig. 7 a and Fig. 7 b schematically show plain scan and waterfall type scanning;
Fig. 8 schematically shows the realization more specifically of propagation steps;
The picture element matrix that Fig. 9 shows Fig. 5 is through the picture element matrix after dissemination process;
Figure 10 schematically shows Fig. 9 through the data after the rotation processing;
Figure 11 a-Figure 11 g shows Figure 10 each step result through repeatedly dissemination process and rotation processing; And
Figure 12 shows the processing procedure to the connected component labeling of bianry image.
Embodiment
Describe preferred implementation of the present invention with reference to the accompanying drawings in further detail, shown the preferred embodiments of the present invention in the accompanying drawings.Yet the present invention can should not be construed the embodiment that is set forth here with the various forms realization and limit.On the contrary, it is in order to make the present invention thorough more and complete that these embodiment are provided, and, fully scope of the present invention is conveyed to those skilled in the art.
Fig. 1 schematically shows according to an embodiment of the invention the structured flowchart based on the connected component labeling system of the two dimensional image of vector processor.This system comprises an external control devices 107 and one or more vector processor 1000a, 1000b ..., 1000n.Each vectorial processor comprises 101, one overall control modules 103 of a vector calculation unit, register 102, local storage 104, data transmission unit 105 and an external interface 106.Preferably, this system also comprises external memory storage 108, is used to store the data and the instruction of needs.
(1) external control devices 107
External control devices 107 provides clock, address and read to each vector processor, and as coordination, integral unit that central authorities handle, bianry image is sent to corresponding vector processor handle, and obtain last result.
(2) vector processor 1000a, 1000b ..., 1000n
Each vector processor comprises 104, one vector calculation unit of local storage 101, one overall control modules 103, register 102, local storage 104 and data transmission units 105, preferably, also comprises an external interface 106.Local storage 104 has the instruction and data of carrying out on this vector processor, the data that register 102 storages are handled by vector calculation unit 101.The instruction of vector calculation unit 101 operations is a kind of SIMD type instruction, in fact, all is to comprise vector calculation unit on the vector processor hardware.The decoding of the 103 pairs of programs of overall situation control module produces control signal, and control signal is used to produce the read of control data from register and local storage to vector calculation unit.Data transmission unit 105 is according to control signal transmission data, and register 102 is used to store vector calculation unit data to be processed.The connected region that external interface 106 is used for obtaining is exported.
Fig. 2 shows the workflow when carrying out connected component labeling according to an embodiment of the invention.According to Fig. 2, at step S201, at first according to the requirement of current counting yield, judge that needing what vector processors to carry out connected region handles, this is a preferred step, because the processing power and the storage capacity of following vector processor may be very strong, a vector processor just can efficiently be finished connected region and handle, at this moment as long as directly enter step S206, bianry image is sent to vector processor, at step S207, carrying out the connected component labeling processing by this vector processor gets final product, obtain the mark result at step S208 then, if desired, can also end product be expressed as suitable form output at step S209.More than a vector processor, just can reach requirement if desired, then enter step S202, binary image segmentation is become different zones, can be divided into the identical zone of size, also can be divided into the zone that varies in size, utilize the strong vector processor of processing power to handle bigger zone, or the like.At step S203, the sub-bianry image of after will cutting apart each sends to corresponding vector processor, at step S204, each vector processor antithetical phrase bianry image carries out connected component labeling to be handled, at step S205, receive the result of each vector processor, result is fused into end product, when connected region is carried out fusion treatment, at first to judge the unanimity that marks whether of boundaries on either side connected region; If inconsistent, the connected component labeling assimilation is handled.Wherein, the connected component labeling assimilation is handled according to following propagation steps, can be adopted the processing mode of adjacent area being selected minimum mark.If desired, can also end product be expressed as suitable form output at step S209.As seen from Figure 2, key point of the present invention is how vector processor carries out connected component labeling and handle.
Describe vector processor below in detail and how bianry image is carried out connected component labeling.
Bianry image (binary image)
In Computer Image Processing, image can be represented with matrix, image for the M*N size, the value of each matrix element is the value of this pixel, for example for gray level image, pixel can for coloured image, can be divided into R between 0～255, G, three colors of B can adopt the image of each color channel and gray level image is similarly handled, if gray level image has only two class pixel values, just think bianry image, the bianry image pixel synoptic diagram of 8*8 size as shown in Figure 3, wherein black can be 0 to represent with pixel value, white can be 255 to represent with pixel value.General pattern is at first handled gray level image with threshold value in handling, and just can obtain bianry image.
Below be example with the image of 8*8, the step of the connected component labeling of vector processor of the present invention schematically is described.
Unique value mark (tentative label)
The unique value mark is to each pixel, uses a unique value to carry out step mark just, uses unique value to carry out the unique value mark and can guarantee the follow-up mark that does not have repetition after propagation.In the present invention, for the gray level image of M*N, the scope of its line number is 0～M-1, and the scope of its columns is 0～N-1, for pixel X (i, j), tentatively be labeled as X (i, j)=i*N+j+1.For example, for the image pixel synoptic diagram of 8*8 shown in Figure 3, its first step mark as shown in Figure 4.
Dummy section is handled (Zero-Wall):
In the unique value mark of the bianry image correspondence that obtains, with the pixel of not paying close attention in the bianry image, for example the mark of the white pixel correspondence among Fig. 3 is put sky, perhaps is changed to the value of regulation, and for example 0, be dummy section.Picture element matrix after the picture element matrix dummy section that Fig. 5 shows Fig. 4 is handled.
Dissemination process (Propagation):
At first introduce the notion of propagating:
Propagation is to carry out with the form of row (promptly vectorial), for the pixel X of connected region (i-1, j), if the unique value of a certain pixel be labeled as X (i-1, j)=p (p is not 0), pixel X (i, j) tentatively be labeled as X (i, j)=q, then, if 0＜p＜q, X (i+1 then, j)=p, otherwise X (i, j)=q.Fig. 6 schematically shows the processing procedure of propagation steps.To vectorial Y, at step S601, obtain the mark value p of the vector element Y (i-1) of vectorial Y,, obtain the mark value q of vector element Y (i) at step S602, at step S603, judge whether to satisfy propagation conditions, i.e. 0＜p＜q whether is if satisfy this propagation conditions, at step S604, the mark value that vector element Y (i) is set is p; For not satisfying propagation conditions, continue to obtain the mark value of next vector element, the mark value q that is implying vector element Y (i) does not change, and does not just propagate.
As seen from Figure 6, communication process is a very step of consumption calculations machine cpu resource, if can quicken this step, just can quicken the process of connected component labeling greatly.In propagation steps, the present invention has made full use of the Vector Processing ability of vector processor.
Knowledge according to those skilled in the art, a key character of vector processor is the Vector Processing ability, current vector processor generally uses single instruction multiple data (Single-InstructionMultiple-Data, SIMD) architecture, in the SIMD architecture, under single instruction, control a plurality of processing units that repeat to be provided with a controller, utilize these a plurality of processing units to (totally 128 of one group of data, under the situation of 32 single precision types and integer type, be 4 data; Under the situation of 64 type double precisions, be 2 data; ...) in each data carry out identical operations simultaneously, with the data parallelism on the implementation space.
That is to say, in the SIMD architecture, parallel different pieces of information element is carried out the calculating of same type simultaneously, improve the data processing performance of processor by utilizing an instruction.Following vector processor may be supported multiple-instruction multiple-data (MIMD).The ultimate principle of the waterfall type scanning the when processing power of this multidata vector processor is exactly a dissemination process of the present invention.
Waterfall type scanning as its name suggests, promptly is multiple row scanning from top to bottom.Fig. 7 schematically shows plain scan and waterfall type scanning.Fig. 7 a is common top-down scanning, can only scan row at every turn.Fig. 7 b then for waterfall type scanning, can carry out the top-down scanning of multiple row at every turn.
Then for a plurality of vectors, the waterfall type scanning process is:
To n of picture element matrix X vector x1, x2 ..., xn}:
A) obtain described n vectorial x1, x2 ..., the pixel of xn} x1 (i-1), x2 (i-1) ..., xn (i-1) } mark value p1, p2 ..., pn}, wherein, i is the positive integer less than N, N is the vector length of described some vectors;
B) obtain described n vectorial x1, x2 ..., the pixel of xn} x1 (i), x2 (i) ..., xn (i) } mark value q1, q2 ..., qn};
C) judge whether to satisfy propagation conditions;
D) if satisfy this propagation conditions, be provided with pixel x1 (i), x2 (i) ..., xn (i) } mark value be p1, p2 ..., pn};
E), the next pixel of described some vectors is carried out step a)-e), up to the scanning of finishing whole vector if do not satisfy propagation conditions;
Wherein, n is the positive integer more than or equal to 2, and is relevant with the single treatment data volume of vector processor.If the single instrction processing power of vector processor (being register length) is 32byte, the data length of processing is 8byte, then n=4.
Comprising 4 elements with a vector below is example, introduces the realization more specifically of propagation steps as shown in Figure 8.
If P={p1, p2, p3, p4}, Q={q1, q2, q3, q4}, Zero={0,0,0,0}; K ∈ 1,2,3,4}
In the 1st step, compared pixels vector P, Q produce zone bit vector f lag1;
Flag1={f1, f2, f3, f4}, if fk=1 wherein is pk＜qk; Otherwise fk=0;
In the 2nd step, compared pixels vector Q and Zero produce zone bit vector f lag2;
Flag2={g1, g2, g3, g4}, if gk=1 wherein is 0＜qk; Otherwise gk=0;
In the 3rd step, the zone bit vector is done AND operation.
flag
＊＝{e1，e2，e3，e4}＝{f1&g1，f2&g2，f3&g3，f4&g4}；
The 4th step, the value of coming selected pixels vector Q according to zone bit
Q={q1
*, q2
*, q3
*, q4
*}=VEC_SELECT (P, Q, flag
*), if flag
*In zone bit be 1, then this position is the corresponding element of vectorial P, otherwise is the corresponding element of Q, i.e. qk
*If=pk is ek=1; Otherwise qk
*=qk.
In the 5th step, the 1st step was got back to for by P, the Q delegation that moves down.Repeat, be in the position of last column up to Q.
More than calculate the processing power that makes full use of vector processor, reduced destruction vector processor branching of pipes structure, greatly speed-up computation efficient.
The picture element matrix of Fig. 5 obtains picture element matrix shown in Figure 9 through after the dissemination process.
Rotation processing (rotation):
This step is a circulation step, in each circulation, comprises two sub-steps:
1) the current pixel matrix is divided into four sub-pieces;
2) position of four sub-pieces of clockwise direction exchange;
To each sub-piece, repeat 1)-2) step, until single pixel.
If make full use of the Vector Processing ability of vector processor, also can improve above-mentioned rotation step, the step after the improvement is:
3) the current pixel matrix is divided into four sub-pieces;
4) position of four sub-pieces of clockwise direction exchange;
To each sub-piece, repeat 3)-4) step, can be utilized the basis vector computing of vector processor to carry out above-mentioned 3 by the basis vector calculation process of vector processor up to current sub-block)-4) step, until single pixel.
In the concrete improvement step, because in vector processor, a vector comprises a plurality of components, so last operating unit can be a submatrix.For example on IBM CELL processor, a vector can comprise 16 char types (8 bit) data, and its minimum operating unit is 16 * 16char type submatrix so.
Following example shows the exchange that realizes 4 * 4 matrixes (supposing that a vector comprises four data elements) with vector operations.
4 * 4 matrixes can be 4 vectors by line display:
V1＝{1，2，3，4}，
V2＝{5，6，7，8}，
V3＝{9，10，11，12}，
V4＝{13，14，15，16}。
In the 1st step, constitute one group of new vector with V1, V2, V3 and V4.
Front two with V1 and V3 constitutes V1
*=9,10,1,2};
The front two of logical V2 and V4 constitutes V2
*=13,14,5,6};
Back two with V1 and V3 constitute V3
*=11,12,3,4};
Back two with V2 and V4 constitute V4
*=15,16,7,8};
In the 2nd step, use V1
*, V2
*, V3
*And V4
*Enough become one group of new vector.
Use V1
*Strange position and V2
*Idol position constitute V1={13,9,5,1};
Use V1
*Idol position and V2
*Strange position constitute V2={14,10,6,2};
Use V3
*Strange position and V4
*Idol position constitute V1={15,11,7,3};
Use V3
*Idol position and V4
*Strange position constitute V2={16,12,8,4} finishes.
On essence, utilize the operation of vector element to finish step in the rudimentary algorithm exactly, because a vector instruction can be operated a plurality of elements, thereby make that to improve algorithm rapider than rudimentary algorithm.
Figure 10 schematically shows Fig. 9 through the data after the rotation processing.
Dissemination process and rotation processing step have more than been introduced, bianry image is being carried out in the connected component labeling process, carry out repeatedly dissemination process and rotation processing, specifically, be 5 dissemination process and 4 rotation processing, concrete steps be propagate (Fig. 9)-＞rotation (Figure 10)-＞propagate (Figure 11 a)-＞rotation (Figure 11 b)-＞propagate (Figure 11 c)-＞rotation (Figure 11 d)-＞propagate (Figure 11 e)-＞rotation (Figure 11 f)-＞propagate (Figure 11 g), just can obtain the good connected region of mark.Figure 10 through above-mentioned steps each the step result as Figure 11 a to shown in Figure 11 g.
Therefore, the processing procedure to the connected component labeling of bianry image can be summarized as process shown in Figure 12.At step S1001, the bianry image that comprises connected component labeling is carried out the unique value mark, obtain the picture element matrix of unique value mark; At step S1002, the picture element matrix of unique value mark is carried out dummy section handle; At step S1003, repeat the picture element matrix after the dummy section processing is carried out dissemination process and rotation processing, obtain last connected region; Wherein, when picture element matrix is carried out dissemination process, be that unit carries out waterfall type scanning with the vector.
Module in the system of the present invention can adopt by such as VLSI (very large scale integrated circuit) or gate array, realize such as the semiconductor of logic chip, transistor etc. or such as the hardware circuit of the programmable hardware device of field programmable gate array, programmable logic device etc., also can use the software of carrying out by various types of processors to realize, also can realize by the combination of above-mentioned hardware circuit and software.
The present invention also provides a kind of program product, comprises the program code of realizing above all methods and the bearing medium that carries this program code.
Though describe exemplary embodiment of the present invention here with reference to the accompanying drawings, but should be appreciated that and the invention is not restricted to these accurate embodiment, and under the situation that does not deviate from scope of the present invention and aim, those of ordinary skills can carry out the modification of various variations to embodiment.All such changes and modifications are intended to be included in the scope of the present invention defined in the appended claims.
Claims (22)
1. method for marking connected region based on the two dimensional image of vector processor, this method comprises:
The bianry image that comprises connected component labeling is carried out the unique value mark, obtain the picture element matrix of unique value mark;
Picture element matrix to the unique value mark carries out the dummy section processing;
Picture element matrix for after the dummy section processing repeats dissemination process and rotation processing, obtains last connected region;
Wherein, when picture element matrix is carried out dissemination process, be that unit carries out waterfall type scanning with the vector.
2. method according to claim 1, the wherein said operation steps that picture element matrix is carried out the waterfall type scanning of dissemination process comprises:
To n of picture element matrix X vector x1, x2 ..., xn}:
A) obtain described n vectorial x1, x2 ..., pixel xn) x1 (i-1), x2 (i-1) ..., xn (i-1) } mark value p1, p2 ..., pn}, wherein, N is the vector length of described some vectors, i is the positive integer less than N;
B) obtain described n vectorial x1, x2 ..., the pixel of xn} (x1 (i), x2 (i) ..., xn (i) } mark value q1, q2 ..., qn};
C) judge whether to satisfy propagation conditions;
D) if satisfy this propagation conditions, be provided with pixel x1 (i), x2 (i) ..., xn (i) } mark value be p1, p2 ..., pn};
E), the next pixel of described some vectors is carried out step a)-e) if do not satisfy propagation conditions;
Wherein, n is the positive integer more than or equal to 2, and is relevant with the single instrction deal with data amount of vector processor.
3. method according to claim 1, the wherein said step that picture element matrix is rotated processing comprises:
Picture element matrix is carried out following iterative process:
F) the current pixel matrix is divided into four sub-pieces;
G) position of four sub-pieces of clockwise direction exchange;
To each sub-piece, repeat f)-g) step, can be utilized the basis vector computing of vector processor to carry out above-mentioned f by the basis vector calculation process of vector processor up to current sub-block)-g) step, until single pixel.
4. method according to claim 1, the step that wherein said picture element matrix is rotated processing comprises:
Picture element matrix is carried out following iterative process:
J) the current pixel matrix is divided into four sub-pieces;
K) position of four sub-pieces of clockwise direction exchange;
To each block, repeat above-mentioned j)-k) step, be single pixel up to current sub-block.
5. method according to claim 2, wherein said each pixel of unique value mark is to use unique value to come each pixel of mark.
6. method according to claim 2, if wherein described bianry image is that M is capable, N row image, described unique value are 1 to M*N, and described propagation conditions is 0＜pi＜qi, and wherein, i is the positive integer less than N, and N is the vector length of described some vectors.
7. method according to claim 1, wherein said picture element matrix after dummy section is handled repeats dissemination process and rotation processing, comprise the picture element matrix after the dummy section processing is repeated 5 dissemination process and 4 rotation processing, wherein carry out dissemination process successively, and rotation processing, until meeting the requirements of number of times.
8. method according to claim 1 comprises that also step is with the connected region output that obtains.
9. vector processor that is used for the connected component labeling of two dimensional image comprises:
Local storage is used to store the instruction and data of carrying out on this vector processor;
Vector calculation unit is used for that the bianry image that receives is carried out connected component labeling and handles, and to described bianry image, carries out following steps:
Each pixel of unique value mark, the picture element matrix of acquisition unique value mark;
Picture element matrix to the unique value mark carries out the dummy section processing;
Picture element matrix after the dummy section processing is repeated dissemination process and rotation processing, obtain last connected region;
Wherein, when picture element matrix is carried out dissemination process, be that unit carries out waterfall type scanning with the vector;
Overall situation control module is used for the instruction repertorie decoding to carrying out on the vector processor, produces control signal;
Register is used to store described vector calculation unit data to be processed; And
Data transmission unit is used for swap data between local storage, vector calculation unit and the register.
10. vector processor according to claim 9, wherein the vector calculation unit execution further comprises the step that described picture element matrix carries out the waterfall type scanning of dissemination process:
To n of picture element matrix X vector x1, x2 ..., xn}:
A) obtain described n vectorial x1, x2 ..., pixel xn) x1 (i-1), x2 (i-1) ..., xn (i-1) } mark value p1, p2 ..., pn}, wherein, N is the vector length of described some vectors, i is the positive integer less than N;
B) obtain described n vectorial x1, x2 ..., the pixel of xn} x1 (i), x2 (i) ..., xn (i) } mark value q1, q2 ..., qn};
C) judge whether to satisfy propagation conditions;
D) if satisfy this propagation conditions, be provided with pixel x1 (i), x2 (i) ..., xn (i) } mark value be p1, p2 ..., pn};
E), the next pixel of described some vectors is carried out step a)-e) if do not satisfy propagation conditions;
Wherein, n is the positive integer more than or equal to 2, and is relevant with the single instrction deal with data amount of vector processor.
11. vector processor according to claim 8, wherein said vector calculation unit execution comprises the step that picture element matrix is rotated processing:
Picture element matrix is carried out following iterative process:
F) the current pixel matrix is divided into four sub-pieces;
G) position of four sub-pieces of clockwise direction exchange;
To each sub-piece, repeat f)-g) step, can be utilized the basis vector computing of vector processor to carry out above-mentioned f by the basis vector calculation process of vector processor up to current sub-block)-g) step, until single pixel.
12. vector processor according to claim 8, wherein said vector calculation unit execution comprises the step that picture element matrix is rotated processing:
Picture element matrix is carried out following iterative process:
J) the current pixel matrix is divided into four sub-pieces;
K) position of four sub-pieces of clockwise direction exchange;
To each block, repeat above-mentioned j)-k) step, be single pixel up to current sub-block.
13. carrying out each pixel of unique value mark, vector processor according to claim 9, wherein said vector calculation unit be to use unique value to come each pixel of mark.
14. vector processor according to claim 13, if wherein described bianry image is that M is capable, N row image, described unique value is 1 to M*N, and described propagation conditions is 0＜pi＜qi, wherein, i is the positive integer less than N, and N is the vector length of described some vectors.
15. vector processor according to claim 9, picture element matrix after wherein said vector processing unit is handled dummy section repeats dissemination process and rotation processing and comprises that the pixel after dummy section handled repeats 5 dissemination process and 4 rotation processing, wherein carry out dissemination process successively, and rotation processing, until meeting the requirements of number of times.
16. vector processor according to claim 9 wherein also comprises external interface, is used for the connected region output that will obtain.
17. the method for marking connected region based on the two dimensional image of vector processor, this method comprises:
Described bianry image is divided into the experimental process image;
Each of described experimental process bianry image is distributed to each vector processor; *
The sub-bianry image of each vector processor to receiving uses the method for claim 1-8 to obtain connected region;
The connected region of each vector processor output is spliced.
18. system according to claim 17, wherein said bianry image is divided in the step of experimental process image, and the overlapping region is arranged between adjacent sub-images.
19. system according to claim 17 in the step that the wherein said connected region that each vector processor is obtained merges, comprises the connected region that merges is carried out following steps:
Judge the unanimity that marks whether of boundaries on either side connected region;
If inconsistent, the connected component labeling assimilation is handled.
20. connected component labeling system based on the two dimensional image of vector processor, comprise an external control devices and one or more vector processor, described external control devices and described one or more vector processor are of coupled connections, described external control devices is used for bianry image is distributed to described one or more vector processor, and described vector processor comprises:
Local storage is used to store the instruction and data of carrying out on this vector processor;
Vector calculation unit is used for that the bianry image that receives is carried out connected component labeling and handles, and to described bianry image, to the sub-bianry image that receives, uses the method for claim 1-8 to obtain connected region;
Overall situation control module is used for the instruction repertorie decoding to carrying out on this vector processor, produces control signal;
Register is used to store described vector calculation unit data to be processed; And
Data transmission unit is used for swap data between local storage, vector calculation unit and the register.
External interface is used for described vector processor and described external control devices exchange message.
21. system according to claim 20, wherein said bianry image is divided in the step of experimental process image, and the overlapping region is arranged between adjacent sub-images.
22. system according to claim 22, the wherein said connected region that each vector processor is obtained merge in, comprise the connected region that merges carried out following steps
Judge the unanimity that marks whether of boundaries on either side connected region;
If inconsistent, the connected component labeling assimilation is handled.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104715247A (en) * | 2013-12-12 | 2015-06-17 | 夏普株式会社 | Method and device for identifying closed regions |
| CN107168337A (en) * | 2017-07-04 | 2017-09-15 | 武汉视览科技有限公司 | A kind of mobile robot path planning and dispatching method of view-based access control model identification |
| CN110471194A (en) * | 2019-01-23 | 2019-11-19 | 上海理工大学 | The measurement method of human eye top rake |
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2008
- 2008-06-24 CN CN200810099698A patent/CN101615242A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104715247A (en) * | 2013-12-12 | 2015-06-17 | 夏普株式会社 | Method and device for identifying closed regions |
| CN107168337A (en) * | 2017-07-04 | 2017-09-15 | 武汉视览科技有限公司 | A kind of mobile robot path planning and dispatching method of view-based access control model identification |
| CN110471194A (en) * | 2019-01-23 | 2019-11-19 | 上海理工大学 | The measurement method of human eye top rake |
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