CN101609235B

CN101609235B - Liquid crystal display

Info

Publication number: CN101609235B
Application number: CN200910003852.5A
Authority: CN
Inventors: 慎庸桓; 禹和成; 郑光哲; 蔡钟哲; 郑美惠
Original assignee: Samsung Display Co Ltd
Current assignee: Samsung Display Co Ltd
Priority date: 2008-06-16
Filing date: 2009-02-06
Publication date: 2015-04-29
Anticipated expiration: 2029-02-06
Also published as: KR101046929B1; CN101609235A; KR20090130610A

Abstract

The invention provides a liquid crystal display. The liquid crystal display according to an embodiment of the present invention includes: first and second substrates opposed to each other; a liquid crystal layer including liquid crystal molecules interposed between the first and second substrates; a gate line formed on the first substrate and transmitting a gate signal; first and second data lines formed on the first substrate and transmitting first and second data voltages having different polarities; a first switching element connected to the gate line and the first data line; a second switching element connected to the gate line and the second data line; and first and second pixel electrodes that are connected to the first and second switching elements, respectively, and separated from each other, wherein the liquid crystal layer has positive dielectric anisotropy.

Description

Liquid crystal display

Technical field

The present invention relates to a kind of liquid crystal display.

Background technology

Liquid crystal display is one of the most frequently used flat-panel monitor.The liquid crystal layer that liquid crystal display comprises two display boards and is plugged between two display boards, two display boards have electric field generating electrode pixel electrode such as formed thereon and public electrode respectively.By applying voltage to electric field generating electrode, electric field produces the orientation of the liquid crystal molecule determining liquid crystal layer and controls incident polarisation of light in liquid crystal layer, thus display image.

Liquid crystal display also comprise be connected to each pixel electrode on-off element and Duo Gen signal wire such as gate line, data line etc. for applying voltage to pixel electrode by gauge tap element.

Such liquid crystal display receives the received image signal from external graphics controller.Received image signal comprises the monochrome information of each pixel, and each brightness degree has predetermined amount.Each brightness degree is represented by the data voltage corresponding to the monochrome information expected.The data voltage being applied to this pixel is shown by pixel voltage according to the difference of common electric voltage.Each pixel shows the brightness represented by the gray scale of picture signal according to pixel voltage.Now, the scope of the operable pixel voltage of liquid crystal display decides according to driver.

Meanwhile, the driver of liquid crystal display is directly installed on display board or while being arranged on flexible circuit film with the form of multiple integrated circuit (IC) chip and is attached to display board.Integrated circuit (IC) chip represents the high ratio of the manufacturing cost of liquid crystal display.

In addition, along with the increase of the number of line (such as forming gate line or the data line of liquid crystal panel assembly), the aperture of liquid crystal display is than significantly reducing.

Disclosed in this background parts, above-mentioned information is just in order to strengthen the understanding to background of the present invention, and therefore it can comprise that not formed those of ordinary skill in the art of this country be the information of known prior art.

Summary of the invention

Liquid crystal display comprises according to an embodiment of the invention: first substrate respect to one another and second substrate; Liquid crystal layer, it comprises the liquid crystal molecule be plugged between first substrate and second substrate; Gate line, is formed on the first substrate and transmits signal; First data line and the second data line, formed on the first substrate and transmission has the first data voltage and second data voltage of opposed polarity respectively; First on-off element, is connected to gate line and the first data line; Second switch element, is connected to gate line and the second data line; And first pixel electrode and the second pixel electrode, be connected respectively to the first on-off element and second switch element and be separated from each other, wherein liquid crystal layer has positive dielectric anisotropy.

Liquid crystal molecule can by orientation for being basically perpendicular to first substrate and second substrate.

Liquid crystal molecule can by orientation for being basically parallel to first substrate and second substrate.

Liquid crystal display can also comprise: the 3rd data line and the 4th data line, is formed on the first substrate and transmits the 3rd data voltage and the 4th data voltage with opposed polarity respectively; 3rd on-off element, is connected to gate line and the 3rd data line; 4th on-off element, is connected to gate line and the 4th data line; 3rd pixel electrode, is connected to the 3rd on-off element; And the 4th pixel electrode, separate with the 3rd pixel electrode and be connected to the 4th on-off element.

Liquid crystal display can also comprise: the 3rd data line, is formed on the first substrate and transmits the 3rd data voltage; 3rd on-off element, is connected to gate line and the second data line; 4th on-off element, is connected to gate line and the 3rd data line; 3rd pixel electrode, is connected to the 3rd on-off element; And the 4th pixel electrode, separate with the 3rd pixel electrode and be connected to the 4th on-off element, wherein the second data voltage and the 3rd data voltage have different polarity.

For every frame, each polarity of the first data voltage and the second data voltage can change.

First pixel electrode and the second pixel electrode can be formed in identical layer.

First pixel electrode and the second pixel electrode can be formed in the different layers.

Liquid crystal display can also comprise public electrode, and this public electrode is formed on the first substrate and is applied with common electric voltage.

Liquid crystal display can also comprise public electrode, and this public electrode to be formed on second substrate and to be applied with common electric voltage.

First pixel electrode and the second pixel electrode can comprise multiple branch electrodes, and the branch electrodes of the first pixel electrode and the branch electrodes of the second pixel electrode can alternately be arranged.

Distance between the contiguous branch electrode of the first pixel electrode and the second pixel electrode can about their position consistency.

Distance between the contiguous branch electrode of the first pixel electrode and the second pixel electrode can be different according to their position.

The branch electrodes of the first pixel electrode and the second pixel electrode can bend one or many.

Multiple branch electrodes of the first pixel electrode and the second pixel electrode can tilt relative to gate line.

First data line and the second data line can bend one or many.

Liquid crystal display can also comprise formation storage electrode line on the first substrate, wherein the first on-off element comprises the first drain electrode being connected to the first pixel electrode, second switch element comprises the second drain electrode being connected to the second pixel electrode, and at least one and storage electrode line in the first pixel electrode, the second pixel electrode, the first drain electrode and the second drain electrode is overlapping.

First pixel electrode or be connected to the electrode of the first pixel electrode can be overlapping with the second pixel electrode.

Liquid crystal display comprises in accordance with another embodiment of the present invention: first substrate respect to one another and second substrate; Liquid crystal layer, comprises liquid crystal molecule and is plugged between first substrate and second substrate; Gate line, is formed on the first substrate and transmits signal; First data line and the second data line, formed on the first substrate and transmit the first data voltage different from each other and the second data voltage respectively; First on-off element and second switch element, be connected to gate line and the first data line; 3rd on-off element and the 4th on-off element, be connected to gate line and the second data line; And first pixel electrode, the second pixel electrode, the 3rd pixel electrode and the 4th pixel electrode, be connected respectively to the first on-off element, second switch element, the 3rd on-off element and the 4th on-off element, wherein liquid crystal layer has positive dielectric anisotropy.

The polarity of the first data voltage and the second data voltage can be opposite each other.

Liquid crystal molecule can by orientation for being basically perpendicular to or being parallel to first substrate and second substrate.

Liquid crystal display can also comprise: the 3rd data line and the 4th data line, is formed on the first substrate and transmits the 3rd data voltage different from each other and the 4th data voltage respectively; 5th on-off element and the 6th on-off element, be connected to gate line and the 3rd data line; 7th on-off element and the 8th on-off element, be connected to gate line and the 4th data line; And the 5th pixel electrode, the 6th pixel electrode, the 7th pixel electrode and the 8th pixel electrode, be connected respectively to the 5th on-off element, the 6th on-off element, the 7th on-off element and the 8th on-off element.

Liquid crystal display can also comprise: the 3rd data line, is formed on the first substrate and transmits the 3rd data voltage; 5th on-off element and the 6th on-off element, be connected to gate line and the second data line; 7th on-off element and the 8th on-off element, be connected to gate line and the 3rd data line; And the 5th pixel electrode, the 6th pixel electrode, the 7th pixel electrode and the 8th pixel electrode, be connected respectively to the 5th on-off element, the 6th on-off element, the 7th on-off element and the 8th on-off element, wherein the second data voltage and the 3rd data voltage different from each other.

First on-off element, second switch element, the 3rd on-off element and the 4th on-off element have first grid electrode, second grid electrode, the 3rd gate electrode and the 4th gate electrode and the first drain electrode, the second drain electrode, the 3rd drain electrode and the 4th drain electrode respectively; First drain electrode, the second drain electrode, the 3rd drain electrode and the 4th drain electrode are connected respectively to the first pixel electrode, the second pixel electrode, the 3rd pixel electrode and the 4th pixel electrode; And when the overlapping region of first grid electrode and the first drain electrode is represented by first area, the overlapping region of second grid electrode and the second drain electrode is represented by second area, the overlapping region of the 3rd gate electrode and the 3rd drain electrode is by the 3rd region representation, when the overlapping region of the 4th gate electrode and the 4th drain electrode is by the 4th region representation, first area can be different from other region at least one region in the 4th region.

First area can be greater than the 3rd region, or the 4th region can be greater than the 3rd region.

First pixel electrode can comprise multiple branch electrodes to each of the 4th pixel electrode, the branch electrodes of the first pixel electrode and the branch electrodes of the 3rd pixel electrode can alternately be arranged, and the branch electrodes of the second pixel electrode and the branch electrodes of the 4th pixel electrode can alternately be arranged.

First pixel electrode can tilt relative to gate line to the branch electrodes of the 4th pixel electrode.

Liquid crystal display can also comprise formation storage electrode line on the first substrate.

Liquid crystal display comprises in accordance with another embodiment of the present invention: first substrate respect to one another and second substrate; Liquid crystal layer, comprises liquid crystal molecule and is plugged between first substrate and second substrate; Gate line, is formed on the first substrate and transmits signal; First data line, the second data line, the 3rd data line and the 4th data line, formed on the first substrate and transmit the first data voltage different from each other, the second data voltage, the 3rd data voltage and the 4th data voltage respectively; First on-off element, is connected to gate line and the first data line; Second switch element, is connected to gate line and the second data line; 3rd on-off element, is connected to gate line and the 3rd data line; 4th on-off element, is connected to gate line and the 4th data line; And first pixel electrode, the second pixel electrode, the 3rd pixel electrode and the 4th pixel electrode, be connected respectively to the first on-off element, second switch element, the 3rd on-off element and the 4th on-off element, wherein the first pixel electrode is applied with the different voltage obtained from image information to the 4th pixel electrode, and liquid crystal layer has positive dielectric anisotropy.

The polarity of the first data voltage and the second data voltage can be opposite each other, and the polarity of the 3rd data voltage and the 4th data voltage can be opposite each other.

Liquid crystal display comprises in accordance with another embodiment of the present invention: first substrate respect to one another and second substrate; Liquid crystal layer, comprises liquid crystal molecule and is plugged between first substrate and second substrate; First grid polar curve and second gate line, formed on the first substrate; First data line and the second data line, formed on the first substrate and transmit the first data voltage different from each other and the second data voltage respectively; First on-off element, is connected to first grid polar curve and the first data line; Second switch element, is connected to first grid polar curve and the second data line; 3rd on-off element, is connected to second gate line and the first data line; 4th on-off element, is connected to second gate line and the second data line; And first pixel electrode, the second pixel electrode, the 3rd pixel electrode and the 4th pixel electrode, be connected respectively to the first on-off element, second switch element, the 3rd on-off element and the 4th on-off element, wherein the first pixel electrode is applied with the different voltage obtained from image information to the 4th pixel electrode, and liquid crystal layer has positive dielectric anisotropy.

Liquid crystal display comprises in accordance with another embodiment of the present invention: pixel, comprises the first sub-pixel and the second sub-pixel and coupling capacitance, gate line, to be formed on substrate and to transmit signal, and, first data line and the second data line, be formed on substrate and also transmit the first data voltage different from each other and the second data voltage respectively, wherein, first sub-pixel comprises the first on-off element being connected to gate line and the first data line, be connected to the second switch element of gate line and the second data line and be connected to the first liquid crystal capacitor of the first on-off element and second switch element, coupling condenser is connected to the first on-off element, second sub-pixel comprises second switch element, coupling condenser and be connected to the second liquid crystal capacitor of second switch element, first liquid crystal capacitor and the second liquid crystal capacitor comprise the liquid crystal layer with positive dielectric anisotropy.

It is the liquid crystal molecule being basically perpendicular to or being parallel to substrate that liquid crystal layer can comprise by orientation.

Liquid crystal display comprises in accordance with another embodiment of the present invention: multiple pixel, comprises the first sub-pixel and the second sub-pixel and boosting unit (boost-up unit); First grid polar curve and second gate line, to be formed on substrate and to transmit signal; And first data line and the second data line, to be formed on substrate and to transmit the first data voltage different from each other and the second data voltage respectively.First sub-pixel comprises the first on-off element being connected to first grid polar curve and the first data line, the second switch element being connected to first grid polar curve and the second data line and is connected to the first liquid crystal capacitor of the first on-off element and second switch element, and the second sub-pixel comprises the 3rd on-off element, the second switch element that are connected to first grid polar curve and the first data line and is connected to the second liquid crystal capacitor of second switch element and the 3rd on-off element.Boosting unit comprises: boost capacitor, is connected to the first on-off element; 4th on-off element, is controlled by the signal of first grid polar curve and is connected between boost capacitor and common electric voltage; And the 5th on-off element, controlled by the signal of second gate line and be connected between boost capacitor and the second liquid crystal capacitor, second gate line is later than first grid polar curve and applies gate-on voltage, and the first liquid crystal capacitor and the second liquid crystal capacitor comprise the liquid crystal layer with positive dielectric anisotropy.

When two neighbors are represented as the first pixel and the second pixel, can be identical with the second data voltage of the second data line transfer by the second pixel by the second data voltage of the second data line transfer of the first pixel.

First sub-pixel can also comprise the first holding capacitor being connected to the first on-off element and the second holding capacitor being connected to second switch element, and the second sub-pixel can also comprise the 3rd holding capacitor and the second holding capacitor that are connected to the 3rd on-off element.

First sub-pixel can also comprise the first holding capacitor being connected to the first on-off element and second switch element, and the second sub-pixel can also comprise the second holding capacitor being connected to second switch element and the 3rd on-off element.

Liquid crystal display comprises in accordance with another embodiment of the present invention: first substrate respect to one another and second substrate; Liquid crystal layer, comprises liquid crystal molecule and is plugged between first substrate and second substrate; Gate line, is formed on the first substrate and transmits signal; First data line, the second data line and the 3rd data line, formed on the first substrate and transmit the first data voltage, the second data voltage and the 3rd data voltage respectively; First on-off element, is connected to gate line and the first data line; Second switch element, is connected to gate line and the second data line; 3rd on-off element, is connected to gate line and the second data line; 4th on-off element, is connected to gate line and the 3rd data line; And first pixel electrode, the second pixel electrode, the 3rd pixel electrode and the 4th pixel electrode, be connected respectively to the first on-off element, second switch element, the 3rd on-off element and the 4th on-off element.

Liquid crystal layer can have positive dielectric anisotropy.

Second data voltage can change between the first level and second electrical level with the predetermined cycle.

First level can be in a liquid crystal display can ceiling voltage, second electrical level can be minimum voltage available in liquid crystal display.

The predetermined cycle can be a frame.

First data line can be formed in identical layer to the 3rd data line.

Second data line can be formed in the layer identical with gate line.

Distance between the first pixel electrode and the contiguous branch electrode of the second pixel electrode can be different according to their position.

Liquid crystal display comprises in accordance with another embodiment of the present invention: pixel, comprises the first sub-pixel and the second sub-pixel, gate line, is formed on substrate, and first data line, second data line and the 3rd data line, be formed on substrate, wherein, first sub-pixel comprises the first on-off element being connected to gate line and the first data line, be connected to the second switch element of gate line and the second data line and be connected to the liquid crystal capacitor of the first on-off element and second switch element, second sub-pixel comprises the 3rd on-off element being connected to gate line and the second data line, be connected to the 4th on-off element of gate line and the 3rd data line and be connected to the liquid crystal capacitor of the 3rd on-off element and the 4th on-off element, first sub-pixel and the second sub-pixel are applied with the different data voltage obtained from image information.

Liquid crystal capacitor can have positive dielectric anisotropy.

The voltage being applied to the second data line can change between the first level and second electrical level with the predetermined cycle.

First data line can be formed in identical layer to the 3rd data line.

Second data line can be formed in the layer identical with gate line.

Liquid crystal display can also comprise the storage electrode line be formed on substrate.

Liquid crystal display comprises in accordance with another embodiment of the present invention: the multiple pixels being arranged to matrix, eachly comprises the first sub-pixel and the second sub-pixel, many first grid polar curves and second gate line, be formed on substrate, and, many first data lines and the second data line, be formed on substrate, wherein the first sub-pixel comprises the first on-off element being connected to first grid polar curve and the first data line, be connected to the second switch element of first grid polar curve and the second data line and be connected to the first liquid crystal capacitor of the first on-off element and second switch element, second sub-pixel comprises the 3rd on-off element being connected to second gate line and the first data line, be connected to the 4th on-off element of second gate line and the second data line and be connected to the second liquid crystal capacitor of the 3rd on-off element and the 4th on-off element, first sub-pixel and the second sub-pixel are applied with the different data voltage obtained from image information.

Liquid crystal capacitor can comprise the liquid crystal layer with positive dielectric anisotropy.

Second data line can be formed in the layer identical with second gate line with first grid polar curve.

Liquid crystal display can also comprise many 3rd data lines be formed on substrate, when wherein two neighbors in a plurality of pixels represent the first pixel and the second pixel, first sub-pixel of the second pixel comprises the 5th on-off element being connected to first grid polar curve and the 3rd data line, be connected to the 6th on-off element of first grid polar curve and the second data line and be connected to the 3rd liquid crystal capacitor of the 5th on-off element and the 6th on-off element, second sub-pixel of the second pixel comprises the 7th on-off element being connected to second gate line and the 3rd data line, be connected to the 8th on-off element of second gate line and the second data line and be connected to the 4th liquid crystal capacitor of the 7th on-off element and the 8th on-off element, first sub-pixel of the second pixel and the second sub-pixel are applied with the different data voltage obtained from a group image information.

Liquid crystal display comprises in accordance with another embodiment of the present invention: the first pixel adjacent one another are and the second pixel, eachly comprises the first sub-pixel and the second sub-pixel; Be formed in the gate line on substrate; and the first data line be formed on substrate, second data line and the 3rd data line, wherein the first sub-pixel of the first pixel comprises the first on-off element being connected to first grid polar curve and the first data line, be connected to the second switch element of first grid polar curve and the second data line and be connected to the first liquid crystal capacitor of the first on-off element and second switch element, the coupling condenser of the first pixel is connected to the first on-off element, second sub-pixel of the first pixel comprises second switch element and is connected to the second liquid crystal capacitor between coupling condenser and second switch element, first sub-pixel of the second pixel comprises the 3rd on-off element being connected to first grid polar curve and the second data line, be connected to the 4th on-off element of first grid polar curve and the 3rd data line and be connected to the 3rd liquid crystal capacitor of the 3rd on-off element and the 4th on-off element, the coupling condenser of the second pixel is connected to the 4th on-off element, second sub-pixel of the second pixel comprises the 3rd on-off element and is connected to the 4th liquid crystal capacitor between coupling condenser and the 3rd on-off element.

First liquid crystal capacitor can comprise the liquid crystal layer with positive dielectric anisotropy to the 4th liquid crystal capacitor.

Liquid crystal layer can be oriented layer that is vertical or level.

First data line can be formed in identical layer to the 3rd data line.

Second data line can be formed in the layer identical with gate line.

Liquid crystal display comprises in accordance with another embodiment of the present invention: the multiple pixels being arranged to matrix, many gate lines, to be formed on substrate and to transmit signal, and, many first data lines and the second data line, be formed on substrate and also transmit the first data voltage and the second data voltage respectively, wherein each pixel comprises the first on-off element being connected to gate line and the first data line, be connected to the second switch element of gate line and the second data line and be connected to the liquid crystal capacitor of the first on-off element and second switch element, liquid crystal capacitor comprises the first pixel electrode, second pixel electrode and there is positive dielectric anisotropy and be placed in the liquid crystal layer between the first pixel electrode and the second pixel electrode, liquid crystal layer is vertical orientated layer, after display one frame or multiple image, each pixel shows the low gray level image of at least one frame.

Multiple pixel can show low gray level image for identical frame.

Low gray level image can show a frame.

At least one pixel column among multiple pixel or at least one pixel column can show low gray level image, and remaining pixel can show described image for identical frame.

Two adjacent lines of pixels or two adjacent pixel column sequentially can show the low gray level image of two continuous print frames.

At least one pixel column showing low gray level image can show low gray level image for identical frame simultaneously.

The data voltage of low gray level image can equal 2/3 or be less than the data voltage of image.

Accompanying drawing explanation

Fig. 1 is the block diagram of liquid crystal display according to an embodiment of the invention;

Fig. 2 is the structure of liquid crystal display and the equivalent circuit diagram of a pixel according to an embodiment of the invention;

Fig. 3 is the equivalent circuit diagram of the pixel that liquid crystal display is according to an embodiment of the invention shown;

Fig. 4 is the schematic sectional view of liquid crystal display according to an embodiment of the invention;

Fig. 5 is the figure illustrated according to the data line of the liquid crystal display of the embodiment of the present invention and the voltage of pixel;

Fig. 6 is the figure that pixel electrode according to the liquid crystal display of the embodiment of the present invention and structural region (texture region) are shown;

Fig. 7 is the schematic sectional view of the liquid crystal display according to the embodiment of the present invention;

Fig. 8 is the figure of the order of the driving method of the liquid crystal display illustrated according to the embodiment of the present invention;

Fig. 9 is the figure of the driving method illustrated according to the embodiment of the present invention;

Figure 10 illustrates according to another the figure of driving method of embodiment of the present invention;

Figure 11 is the layout of the liquid crystal panel assembly according to the embodiment of the present invention;

Figure 12 is the sectional view of the liquid crystal panel assembly taken along the XII-XII line of Figure 11;

Figure 13 and 14 is the equivalent circuit diagram of the structure that a pixel according to another embodiment of the invention and display panels are shown respectively;

Figure 15 is the layout of liquid crystal panel assembly according to an embodiment of the invention;

Figure 16 is the sectional view of the liquid crystal panel assembly taken along the XVI-XVI line of Figure 15;

Figure 17 is the equivalent circuit diagram that structure according to the liquid crystal panel assembly of the embodiment of the present invention and a pixel are shown;

Figure 18 is the layout of the liquid crystal panel assembly according to the embodiment of the present invention;

Figure 19 is the sectional view of the liquid crystal panel assembly taken along the XIX-XIX line of Figure 18;

Figure 20 is the equivalent circuit diagram that structure according to the liquid crystal panel assembly of the embodiment of the present invention and a pixel are shown;

Figure 21 is the layout of the liquid crystal panel assembly according to the embodiment of the present invention;

Figure 22 is the sectional view of the liquid crystal panel assembly taken along the XXII-XXII line of Figure 21;

Figure 23 to Figure 25 is the layout of the liquid crystal panel assembly according to the embodiment of the present invention;

Figure 26 is the equivalent circuit diagram that structure according to the liquid crystal panel assembly of the embodiment of the present invention and a pixel are shown;

Figure 27 is the equivalent circuit diagram of two sub-pixels that liquid crystal panel assembly is in accordance with another embodiment of the present invention shown;

Figure 28 A is the layout of the liquid crystal panel assembly according to the embodiment of the present invention;

Figure 28 B is the amplification layout of the on-off element of the liquid crystal panel assembly shown in Figure 28 A;

Figure 29 to Figure 34 is the equivalent circuit diagram of two sub-pixels of liquid crystal panel assembly in accordance with another embodiment of the present invention;

Figure 35 is the layout of the liquid crystal panel assembly according to the embodiment of the present invention;

Figure 36 is the equivalent circuit diagram of two sub-pixels of liquid crystal panel assembly in accordance with another embodiment of the present invention;

Figure 37 is the equivalent circuit diagram of two pixels of liquid crystal panel assembly according to the embodiment of the present invention;

Figure 38 and Figure 39 illustrates the charging voltage of the liquid crystal capacitor of four neighbors in two continuous print frames according to embodiments of the invention and is applied to the figure of voltage of data line, when liquid crystal display can ceiling voltage and minimum voltage be 0V and 7V, common electric voltage Vcom be 7V.

Figure 40 to Figure 43 is the equivalent circuit diagram of two pixels of liquid crystal panel assembly in accordance with another embodiment of the present invention;

Figure 44 to Figure 47 is two pixel PX of the liquid crystal panel assembly according to the embodiment of the present invention _nand PX _n+1layout;

Figure 48 illustrates the structure of liquid crystal panel assembly in accordance with another embodiment of the present invention and the equivalent circuit diagram of a pixel;

Figure 49 and Figure 51 is the equivalent circuit diagram of two sub-pixels of liquid crystal panel assembly in accordance with another embodiment of the present invention; And

Figure 52 to Figure 58 is the equivalent circuit diagram of two pixels of liquid crystal panel assembly in accordance with another embodiment of the present invention.

< represents the description > of the Reference numeral of main element in accompanying drawing

3: liquid crystal layer 31: liquid crystal molecule

11,21: both alignment layers 100,200: panel

110,210: substrate 121: gate line

124a, 124b: gate electrode 131: storage electrode line

133a, 133b: storage electrode 140: gate insulator

151a, 151b, 154a, 154b: semiconductor

161a, 163a, 165a: Ohmic contact 171,172: data line

173a, 173b: source electrode 175a, 175b: drain electrode

180,180p, 180q: passivation layer 191,191a, 191b: pixel electrode

220: light blocking part 230: color filter

250: overlayer 270: public electrode

300: liquid crystal panel assembly

400: gate drivers 500: data driver

600: signal controller 800: voltage generator

LA: low gray area Pea, PEb: pixel electrode

PX: pixel Qa, Qb: switching device

Embodiment

Hereafter with reference to the accompanying drawings the present invention is done and describe more fully, shown in the drawings of embodiments of the invention.It will be understood by those skilled in the art that described embodiment can be revised in a variety of ways, and do not deviate from the spirit or scope of the present invention.

In the accompanying drawings, for clarity, the thickness in layer, film, panel, region etc. is exaggerated.Reference numeral identical in this manual refers to identical element all the time.Should be appreciated that when title element such as layer, film, region or substrate are on another element " time, directly on another element, or can also there is intermediary element in it.On the contrary, when title element " directly exist " another element " on " time, there is not intermediary element.

Hereinafter, liquid crystal display is according to an embodiment of the invention described with reference to the accompanying drawings in detail.

Fig. 1 is the block diagram of the liquid crystal display according to the embodiment of the present invention, Fig. 2 is the equivalent circuit diagram that structure according to the liquid crystal display of the embodiment of the present invention and a pixel are shown, Fig. 3 is the equivalent circuit diagram of a pixel of the liquid crystal display illustrated according to the embodiment of the present invention.

With reference to Fig. 1, comprise liquid crystal panel assembly 300, gate drivers 400, data driver 500, grayscale voltage generator 800 and signal controller 600 according to the liquid crystal display of the embodiment of the present invention.

With reference to Fig. 1 and Fig. 3, in the receiver-mode (rx) filter configuration, liquid crystal panel assembly 300 comprises many signal wire G _i, D _jand D _j+1and multiple pixel PX, the plurality of pixel PX are connected to many signal wires also substantially by matrix arrangements.On the contrary, shown in figure 2 in structural drawing, the liquid crystal layer 3 that liquid crystal panel assembly 300 comprises top panel 100 respect to one another and lower panel 200 and is plugged between the two.

Signal wire G _i, D _jand D _j+1comprise many gate lines G of transmission signal (also referred to as " sweep signal ") _iwith the multipair data line D of transmission data voltage _jand D _j+1.Gate lines G _isubstantially the direction followed extends also substantially parallel to each other.Data line D _jand D _j+1the basic direction along row extends also substantially parallel to each other.

Each pixel PX (be such as connected to i-th (i=1,2 ..., n) gate lines G _iand jth root and (j+1) root (j=1,2 ..., m) data line D _jand D _j+1pixel PX) comprise and be connected to signal wire G _i, D _jand D _j+1the first switching device Qa and second switch device Qb, the liquid crystal capacitor Clc being connected to switching device and the first holding capacitor Csta and the second holding capacitor Cstb.First holding capacitor Csta and the second holding capacitor Cstb can omit where necessary.

First switching device Qa/ second switch device Qb is three terminal device, is such as arranged on the thin film transistor (TFT) in lower panel 100.Its control end is connected to gate lines G _i, its input end is connected to data line D _j/ D _j+1, its output terminal is connected to liquid crystal capacitor Clc and the first holding capacitor Csta and the second holding capacitor Cstb.

First pixel electrode PEa of reference Fig. 2 and Fig. 3, liquid crystal capacitor Clc employing lower panel 100 and the second pixel electrode PEb, as two terminals, is used as dielectric substance at the first pixel electrode PEa and the liquid crystal layer between the second pixel electrode PEb and top panel 3.

First pixel electrode PEa is connected to the first on-off element Qa, and the second pixel electrode PEb is connected to second switch element Qb.

Alternatively for Fig. 2, the second pixel electrode PEb can be arranged on top panel 200.In the case, the second pixel electrode PEb is free of attachment to on-off element and receives independent common electric voltage Vcom.

Liquid crystal layer 3 has dielectric anisotropy, and when not having electric field, the liquid crystal molecule of liquid crystal layer 3 has by orientation is the major axis on the surface perpendicular to two panels 100 and 200.

Comprise the pixel electrode PE of the first pixel electrode PEa and the second pixel electrode PEb and public electrode CE can be formed in the different layers or in identical layer.Can be overlapping by each electrode (not shown) with being arranged on lower panel 100 of the first pixel electrode PEa and the second pixel electrode PEb as the first auxiliary holding capacitor Csta of liquid crystal capacitor Clc and each of the second holding capacitor Cstb, wherein insulator is plugged in therebetween and is formed.

Simultaneously, in order to realize colored display, by allowing pixel PX only to show a kind of primary colors (primarycolor) (compartition) or this pixel PX Alternation Display primary colors (time division), desired color is confirmed by the space of primary colors or time sum.

It is such as red, green and blue that primary colors comprises three kinds of primary colors.

Fig. 2 show comprise color filter CF (in the region of top panel 200 corresponding to the first pixel electrode PEa and the second pixel electrode PEb one of display primaries) each pixel PX as an example of compartition.

Alternatively for Fig. 2, above or below the first pixel electrode PEa that color filter CF can be arranged on lower panel 100 and the second pixel electrode PEb.

At least one polarizer (not shown) is arranged in liquid crystal panel assembly 300.

Refer again to Fig. 1, grayscale voltage generator 800 produces the grayscale voltage (hereinafter referred to as " reference gray level voltage ") of all grayscale voltage relevant to the transmissivity of pixel PX or limited amount.

Reference gray level voltage can comprise relative to common electric voltage Vcom have on the occasion of grayscale voltage and there is another grayscale voltage of negative value.

Gate drivers 400 is connected to the gate line of liquid crystal panel assembly 300, and the signal that the combination applying to end (gate-off) voltage Voff by gate turn-on (gate-on) voltage Von and grid is formed is to gate line.

Data driver 500 is connected to the data line of liquid crystal panel assembly 300, selects the grayscale voltage from grayscale voltage generator 800 applying and selected grayscale voltage is applied to data line as data voltage.

But when grayscale voltage generator 800 provides the reference gray level voltage of limited amount instead of total grayscale voltage, data driver 500 can produce desired data voltage by segmentation reference gray level voltage.

Signal controller 600 control gate driver 400 and data driver 500.

Each form with at least one IC chip of driver 400,500,600 and 800 is directly installed in liquid crystal panel assembly, or with tape carrier package (TCP, tape carrier package) form be arranged on the flexible printed circuit film (not shown) that is attached in liquid crystal panel assembly 300, or to be arranged on independent printed circuit board (PCB) (PCB) (not shown).

Alternatively, driver 400,500,600 and 800 can be integrated in and have in the liquid crystal panel assembly 300 of signal wire and thin film transistor switch element.

In addition, driver 400,500,600 and 800 can be integrated with the form of single-chip.In the case, at least one or at least one circuit component of forming them in them can be placed in the outside of single-chip.

Hereinafter, with reference to Fig. 4 and Fig. 5 and Fig. 1 to Fig. 3, by the example of the driving method of liquid crystal display described in detail according to the embodiment of the present invention.

Fig. 4 is the schematic sectional view of the liquid crystal display according to the embodiment of the present invention, and Fig. 5 illustrates the figure be applied to according to the data line of the liquid crystal display of the embodiment of the present invention and the voltage of pixel.

First, with reference to Fig. 1, signal controller 600 receives received image signal R, G and B and the input control signal from the control inputs picture signal R of external graphics controller (not shown), the display of G and B.

Received image signal R, G and B comprise the monochrome information of each pixel, and this brightness has the gray scale of scheduled volume, and such as 1024 (=2 ¹⁰), 256 (=2 ⁸) or 64 (=2 ⁶) gray scale.

Input control signal can comprise vertical synchronizing signal (Vsync), horizontal-drive signal (Hsync), master clock signal (MCLK), data enable signal (DE) etc.

Signal controller 600 processes received image signal R, G, B aptly according to the condition of work of liquid crystal panel assembly 300 on the basis of received image signal R, G, B and input control signal.Signal controller 600 produces grid control signal CONT1 and data controlling signal CONT2, grid control signal CONT1 is outputted to gate drivers 400 and data controlling signal CONT2 and treated picture signal DAT is outputted to data driver 500.

According to the data controlling signal from signal controller 600, data driver 500 receives the data image signal DAT for one-row pixels and by selecting the grayscale voltage corresponding to each data image signal DAT to convert each data image signal DAT to analog data voltage, then analog data voltage is applied to corresponding data line.

Gate-on voltage Von is applied to gate lines G according to the grid control signal CONT1 from signal controller 600 by gate drivers 400 _igate lines G is connected to conducting _ithe first on-off element Qa and second switch element Qb.

Then, data line D is applied to _jand D _j+1data voltage be applied to corresponding pixel PX by the first on-off element Qa and second switch element Qb.

Namely, at the first data line D _jthe data voltage of middle flowing is applied to the first pixel electrode PEa by the first on-off element Qa, flows in the second data line D _j+1data voltage be applied to the second pixel electrode PEb by second switch element Qb.

Now, the data voltage being applied to the first pixel electrode PEa and the second pixel electrode PEb is the data voltage corresponding to the brightness shown by pixel PX, and has the reciprocal polarity relative to common electric voltage Vcom.

The difference with two data voltages (it is applied to the first pixel electrode PEa and the second pixel electrode PEb) of opposed polarity is represented by the charging voltage (namely pixel voltage) of liquid crystal capacitor Clc.

When electric potential difference produces between the two ends of liquid crystal capacitor Clc, the electric field being parallel to the surface of panel 100 and 200 produces in the liquid crystal layer 3 between the first pixel electrode PEa and the second pixel electrode PEb, as shown in Figure 4.

When liquid crystal molecule 31 has positive dielectric anisotropy, liquid crystal molecule 31 tilt thus they major axis by orientation be parallel to electric field direction and the angle tilted is decided by the amplitude (amplitude) of pixel voltage.

This liquid crystal layer 3 is called electro-induction optical compensation (EOC) pattern.

The angle of inclination of liquid crystal molecule 31 is decided by by the degree of the change of the polarisation of light of liquid crystal layer 3.

Polarization variations is represented by the change of the transmissivity of the light by polarizer, is shown the brightness represented by the gray scale of picture signal DAT by its pixel PX.

By (being also called " 1H " at a horizontal cycle, equal the one-period of horizontal-drive signal (Hsync) and data enable signal DE) repeat this process, gate-on signal voltage Von is sequentially applied to all gate lines and data voltage is applied to all pixel PX, thus display one two field picture.

After a frame stops, next frame starts.The state being applied to the reverse signal RVS of data driver 500 is controlled such that the polarity of the data voltage being applied to each pixel PX is reversed to contrary with frame before (" frame reverses ").

At this moment, flow in the data voltage in a data line polarity can according to the characteristic of reverse signal RVS (such as row reversion and some reversion) one image duration periodic variation or be applied to the polarity of data voltage of a pixel column can be alternating with each other ground different (such as, row reversion and put reverse).

Fig. 5 illustrates according to the figure being applied to the voltage of every data lines in the liquid crystal display of the embodiment of the present invention when the charging voltage of the liquid crystal capacitor of four neighbors is respectively minimum voltage that 14V, 10V, 5V and 1V and liquid crystal display can use and maximum voltage is respectively 0V and 14V.

With reference to Fig. 5, each pixel is connected to two data lines D _j, D _j+1/ D _j+2, D _j+3/ D _j+4, D _j+5/ D _j+6, D _j+7.The different data voltage relative to common electric voltage Vcom with opposed polarity is applied to the two data lines D being connected to a pixel _j, D _j+1/ D _j+2, D _j+3/ D _j+4, D _j+5/ D _j+6, D _j+7.Difference between two data lines is the pixel voltage in each pixel PX.Such as, when common electric voltage Vcom is 7V, 14V and 0V can be applied to the first data line D respectively _jwith the second data line D _j+1and the object pixel voltage of the first pixel is 14V, 12V and 2V can be applied to the 3rd data line D respectively _j+2with the 4th data line D _j+3and the object pixel voltage of the second pixel is 10V, 9.5V and 4.5V can be applied to the 5th data line D respectively _j+4with the 6th data line D _j+5and the object pixel voltage of the 3rd pixel is 5V, 7.5V and 6.5V can be applied to the 7th data line D _j+6with the 8th data line D _j+7and the object pixel voltage of the 4th pixel is 1V.

As mentioned above, by applying to have two data voltages of opposed polarity to a pixel PX relative to common electric voltage Vcom, driving voltage can increase, and the response speed of liquid crystal molecule can improve, and the transmissivity of liquid crystal display can be improved.In addition, because two data voltages being applied to a pixel PX have reciprocal polarity, so the degeneration of picture quality because flicker (flicker) causes can be prevented, even if in data driver 500, inversion-type is advantageously similar to row reversion or the row reversion of a reversion.

In addition, when the first on-off element Qa and second switch element Qb ends in one pixel, the voltage being applied to the first pixel electrode PEa and the second pixel electrode PEb is side by side declined by corresponding flyback (kickback) voltage, thus only has little change in the charging voltage of pixel PX.Therefore, the display characteristic of liquid crystal display can be improved.

And, when use perpendicular to liquid crystal panel 100 and 200 surface orientation liquid crystal molecule 31, the contrast of liquid crystal display can be improved and realize good optical look angle.Because the liquid crystal molecule 31 with positive dielectric anisotropy has larger dielectric anisotropy and the stagnant degree of lower rotation, so can increase the response speed of liquid crystal molecule 31 relative to the liquid crystal molecule 31 with negative dielectric anisotropy.In addition, the vergence direction due to liquid crystal molecule 31 is easy to the direction of the electric field being set to generation, even if so can obtain the orientation of excellent display characteristic at liquid crystal molecule 31 due to externalities by dispersion time.

Then, with reference to Fig. 6 to Figure 10 and above-mentioned Fig. 1 to Fig. 5, by another example of the driving method of liquid crystal display described in detail according to the embodiment of the present invention.

Fig. 6 illustrates the pixel electrode of liquid crystal display and the figure of structural region according to an embodiment of the invention.Fig. 7 is the schematic sectional view of the liquid crystal display according to the embodiment of the present invention, the figure of Fig. 8 to be the figure of the order of the driving method of the liquid crystal display illustrated according to the embodiment of the present invention, Fig. 9 be driving method illustrated according to the embodiment of the present invention.Figure 10 is the figure that driving method is in accordance with another embodiment of the present invention shown.

First, with reference to Fig. 6 and Fig. 7, also comprise top panel 100 respect to one another and lower panel 200 and liquid crystal layer 3, the first pixel electrode 191a be plugged between the two according to the liquid crystal panel assembly of embodiment to be arranged on as the liquid crystal panel assembly shown in Fig. 2 on lower panel 100 with the second pixel electrode 191b.

The liquid crystal molecule 31 of liquid crystal layer 3 has without major axis during electric field by orientation being the surface perpendicular to two panels 100 and 200.

When two data voltages relative to common electric voltage Vcom with opposed polarity are applied to the first pixel electrode 191a and the second pixel electrode 191b, the liquid crystal molecule 31 of liquid crystal layer 3 tilts for being parallel to panel 100 and 200, as shown in Figure 7.But, can not tilt to either side with the liquid crystal molecule 31 of the first pixel electrode 191a and the second pixel electrode 191b interval same distance and keep their initial orientation perpendicular to panel 100 and 200.Then, have compared with around it and can produce between two pixel electrode 191a and 191b compared with the structure A of low-light level, as shown in Figure 6 and Figure 7.

With reference to Fig. 9, also comprise (mode with identical with the driving method of above-mentioned liquid crystal display shown in Fig. 1 to Fig. 5) according to the driving method of the liquid crystal display of embodiment and show by the N two field picture predetermined time (such as display 60 two field picture per second in 60Hz drives) that will show.After display N two field picture, additionally show the low gray level image Ig of a frame as shown in Figure 9, then show the N two field picture that will be shown.

When liquid crystal display shows high gray scale intensities such as white, when liquid crystal molecule 31 receives the pressure from outside, the liquid crystal molecule 31 in the structural region between two pixel electrode 191a and 191b flatly can be arranged relative to display panel 100 and 200.Structural region (texture region) A that liquid crystal molecule 31 is flatly arranged can confirm as flaxen damage, because the transmissivity of horizontally disposed liquid crystal molecule 31 pairs of liquid crystal display has contribution.Horizontally disposed liquid crystal molecule 31 in structural region A remains on this state by the highfield in liquid crystal layer 3, even if remove from the pressure of outside, even if thus such damage also can not be removed along with passage of time.

When a two field picture with low gray scale shows after the image of frame showing predetermined number (as in an embodiment), level to return to them the initial tilt state perpendicular to panel 100 and 200 in the liquid crystal molecule 31 that panel 100 and 200 is arranged is remained, when being removed from externalities by highfield.Therefore, damage is removed, and can display white image.At this moment, the gray scale of low gray level image Ig can be equal to or less than gray scale (by this gray scale, the damage appeared in high gray level image is removed after can removing at the pressure that impact is such as outside).Alternatively, gray scale can be the gray scale of the data voltage of data voltage corresponding to the high gray scale being equal to or less than 2/3.

For above-described embodiment alternatively, the number of the frame of the low gray level image Ig of interpolation can be a frame or multiframe.

Then, with reference to Figure 10, will describe according to another the driving method of liquid crystal display of embodiment of the present invention.

With reference to Figure 10, a line or multirow pixel show low gray scale in corresponding frame, and having this line of low gray scale or multirow pixel can from one end of screen to other end roll display screen, when showing image image duration in liquid crystal display at n.Now, the gray scale of this line or multirow pixel with low gray scale can be equal to or less than the gray scale that such gray scale (by this gray scale, damage and can be removed in high gray level image after affecting such as external pressure removal) can be maybe the data voltage corresponding to the data voltage corresponding with high gray scale being equal to or less than 2/3.

Different from Figure 10, low gray scale row can roll from top to bottom, from left to right or from right to left.

Like this, a line of low gray scale or multirow (this is difficult to be identified) add every frame to and roll in mode same as the previously described embodiments, then can to discharge due to impact the such as liquid crystal molecule 31 arranged make liquid crystal molecule 31 turn back to their initial orientations after external pressure is removed from the external pressure of highfield.Therefore, display defect such as flaxen damage etc. can be removed.

As mentioned above, by adding low gray level image or at least low gray scale of a line when comprising in by the liquid crystal display of the liquid crystal molecule 31 of vertical orientation and showing high gray level image, liquid crystal molecule 31 (even if it removes externalities because power that impact is such as outside is arranged to be parallel to panel 100 and 200 and to be fettered by highfield) can be recovered and turn back to initial orientation.

Hereinafter, with reference to Figure 11 and Figure 12 in detail, the example of above-mentioned liquid crystal panel assembly will be described.

Figure 11 is the layout of the liquid crystal panel assembly according to the embodiment of the present invention, and Figure 12 is the sectional view of the liquid crystal panel assembly taken along the XII-XII line of Figure 11.

With reference to Figure 11 and Figure 12, according to the liquid crystal layer 3 that the liquid crystal panel assembly of the embodiment of the present invention comprises lower panel 100 and top panel 200 and is plugged between the two.

First, lower panel 100 will be described.

The multiple grid conductors comprising many gate lines 121 and Duo Gen storage electrode line 131 are formed on insulated substrate 110.

Gate line 121 transmits signal and mainly extends in the horizontal direction.Every root gate line 121 comprises the multipair first grid electrode 124a and second grid electrode 124b that project upwards.

Every root storage electrode line 131 receives predetermined voltage such as common electric voltage Vcom, and mainly extends in the horizontal direction.Every root storage electrode line 131 to be placed between two adjacent gate polar curves 121 and closer to the gate line 121 be placed in below storage electrode line 131.Every root storage electrode line 131 comprises vertically extending multipair first storage electrode 133a and the second storage electrode 133b and has the storage extension 137 in wide region.First storage electrode 133a and the second storage electrode 133b is formed as clavate, near the first grid electrode 124a and second grid electrode 124b of lower gate line 121 near upper gate line 121.Store the tangible square shape of extension 137 tool, two angles being wherein formed in the bottom storing extension 137 are cut, and are interconnected the lower end of the first storage electrode 133a and the second storage electrode 133b.But shape and the layout of storage electrode line 131 (comprise storage electrode 133a and 133b and store extension 137) can change in every way.

Grid conductor 121 and 131 can have single layer structure or sandwich construction.

The gate insulator 140 be made up of silicon nitride (SiNx), monox (SiOx) etc. is formed on grid conductor 121 and 131.

The multipair first island semiconductor 154a be made up of the amorphous silicon, polysilicon etc. of hydrogenation and the second island semiconductor 154b is formed on gate insulator 140.First semiconductor 154a and the second semiconductor 154b is placed in above first grid electrode 124a and second grid electrode 124b respectively.

A pair island Ohmic contact 163a and 165a is formed on each first semiconductor 154a, and a pair island Ohmic contact (not shown) is formed on each second semiconductor 154b.Ohmic contact 163a and 165a can by material such as n+ hydrogenation be mixed with amorphous silicon of the N-shaped impurity of high concentration etc. or silicide is made.

The data conductor comprising multipair first data line 171a and 171b and multipair first drain electrode 175a and the second drain electrode 175b is formed on Ohmic contact 163a and 165a and gate insulator 140.

First data line 171a and the second data line 171b transmission of data signals also intersect with gate line 121 and storage electrode line 131 and are mainly vertically extending.First data line 171a and the second data line 171b comprises with U-shaped to the bending multipair first source electrode 173a of first grid electrode 124a and second grid electrode 124b and the second source electrode 173b.

First drain electrode 175a and the second drain electrode 175b comprises the first extension 177a and the second extension 177b, and its end has clavate and large region.The end sections ground of the first drain electrode 175a and the second drain electrode 175b by the first source electrode 173a and the second source electrode 173b around, around first grid electrode 124a and second grid electrode 124b, the two is bent and facing with each other.The profile of the outside of the first extension 177a and the second extension 177b is similar in fact the exterior contour of the storage extension 137 be placed in below the first extension 177a and the second extension 177b.First extension 177a is overlapping with the left-half storing extension 137, and the second extension 177b is overlapping with the right half part storing extension 137.

First grid electrode 124a/ second grid electrode 124b, the first source electrode 173a/ second source electrode 173b form the first film transistor Qa/ second thin film transistor (TFT) Qb with the first drain electrode 175a/ second drain electrode 175b respectively together with the first semiconductor 154a/ second semiconductor 154b.The raceway groove of the first film transistor Qa/ second thin film transistor (TFT) Qb is respectively formed in the first semiconductor 154a/ second semiconductor 154b between the first source electrode 173a/ second source electrode 173b and the first drain electrode 175a/ second drain electrode 175b.

Data conductor 171a, 171b, 175a and 175b can have single layer structure or sandwich construction.

Ohmic contact 163a and 165a be only formed in above semiconductor 154a and 154b below Ohmic contact 163a and 165a and Ohmic contact 163a and 165a between data conductor 171a, 171b, 175a and 175b.Ohmic contact 163a and 165a reduces semiconductor 154a and 154b and the contact resistance between data conductor 171a, 171b, 175a and 175b.Semiconductor 154a and 154b is exposed between source electrode 173a and 173b and drain electrode 175a and 175b.In addition, semiconductor 154a and 154b is exposed to data conductor 171a, 171b, 175a and 175b.

The passivation layer 180 can be made up of inorganic insulator, organic insulator etc. is formed on the expose portion of data conductor 171a, 171b, 175a and 175b and semiconductor 154a and 154b.

Multiple contact hole 185a and 185b for exposing the first extension 177a and the second extension 177b are formed in passivation layer 180.

The multiple pixel electrodes 191 comprising multipair first pixel electrode 191a and the second pixel electrode 191b (it can be made up of transparent material such as indium tin oxide (ITO), indium-zinc oxide (IZO) etc. or reflective metals such as aluminium, silver, chromium or its alloy) are formed on passivation layer 180.

As shown in figure 11, total profile of a pixel electrode 191 has quadrangle.First pixel electrode 191a and the second pixel electrode 191b be bonded with each other and gap 91 between.First pixel electrode 191a and the second pixel electrode 191b is separated into upper region and lower area relative to virtual horizontal center line CL vertical symmetry usually.

First pixel electrode 191a comprises lower outshot, left vertical stem portion, horizontal stem portion (extending from the center of vertical stem portion) and multiple component to the right.The component be placed in above horizontal center line CL extends from vertical stem portion or horizontal stem portion obliquely along the direction of upper right.Another component be placed in below horizontal center line CL extends from vertical stem portion or horizontal stem portion obliquely along lower right.Angle between component and gate line 121 or horizontal center line CL can be approximately 45 degree.

Second pixel electrode 191b comprises lower outshot, right vertical stem portion, upper horizontal stem portion and lower horizontal stem portion and multiple component.Upper horizontal stem portion and lower horizontal stem portion flatly extend left from the lower end of vertical stem portion and upper end respectively.The component be placed in above horizontal center line CL extends from vertical stem portion or upper horizontal stem portion obliquely along lower left.Another component be placed in below horizontal central line CL extends from vertical stem portion or lower horizontal stem portion obliquely along upper left.Angle between the component of the second pixel electrode 191b and gate line 121 or horizontal center line CL also can be about 45 degree.Top set's part and lower branch portion can be in right angle around horizontal center line CL.

The component of the first pixel electrode 191a and the second pixel electrode 191b is bonded with each other with predetermined gap and alternately arranges, thus forms comb-like pattern.

First pixel electrode 191a and the second pixel electrode 191b is respectively by contact hole 185a and 185b physics and be electrically connected to the first drain electrode 175a and the second drain electrode 175b.First pixel electrode 191a and the second pixel electrode 191b receives the data voltage from the first drain electrode 175a and the second drain electrode 175b.First pixel electrode 191a forms liquid crystal capacitor Clc with the second pixel electrode 191b together with liquid crystal layer 3.Even if the first pixel electrode 191a and the second pixel electrode 191b keeps the voltage applied after the first film transistor Qa and the second thin film transistor (TFT) Qb turns off.

The first extension 177a being connected to the first pixel electrode 191a and the second pixel electrode 191b of the first drain electrode 175a and the second drain electrode 175b and the second extension 177b with to store extension 137 overlapping and gate insulator 140 is plugged between the two, thus forms the first holding capacitor Csta and the second holding capacitor Cstb.First holding capacitor Csta and the second holding capacitor Cstb strengthens the store voltages electric capacity of liquid crystal capacitor Clc.

Then, top panel 200 will be described.

Frequency modulated light part 220 is formed on the insulated substrate 210 be made up of clear glass, plastics etc.Frequency modulated light part 220 prevents light from revealing between pixel electrode 191 and limits the open area of pixel-oriented electrode 191.

Multiple color filter 230 is formed on insulated substrate 210 and frequency modulated light part 220.The major part of color filter 230 be present in by frequency modulated light part 220 around region within.Color filter 230 can elongate on one-row pixels electrode 191.Each color filter 230 can show and comprise one of such as red, green and blue primary colors of three primary colors.

Overlayer 250 is formed on color filter 230 and frequency modulated light part 220.Overlayer 250 can be made up of (organic) insulator.Overlayer 250 prevents color filter 230 to be exposed and provides smooth surface.Overlayer 250 can omit.

Both alignment layers 11 and 21 is applied on the inside surface of panel 100 and 200.Both alignment layers 11 and 21 can be homeotropic alignment layer.

Polarizer (not shown) can be arranged on the outside surface of panel 100 and 200.

The liquid crystal layer 3 be plugged between lower panel 100 and top panel 200 has positive dielectric anisotropy.Liquid crystal molecule 31 can have without major axis during electric field by orientation being the surface perpendicular to two panels 100 and 200.

When the data voltage with opposed polarity is applied to the first pixel electrode 191a and the second pixel electrode 191b, produce the electric field being basically parallel to the surface of panel 100 and 200.The liquid crystal molecule of liquid crystal layer 3 (it is at first by surface that orientation is perpendicular to panel 100 and 200) responds electric field, the major axis of liquid crystal molecule by orientation for being parallel to electric field.The degree of the change of the incident polarisation of light in liquid crystal layer 3 changes according to the inclined degree of liquid crystal molecule.The change of polarization is represented by the change of the transmissivity of polarizer, thus liquid crystal display display image.

Like this, be the liquid crystal molecule on the surface perpendicular to panel 100 and 200 by orientation by employing, the contrast of liquid crystal display can be increased and realize wide visible angle.In addition, by applying to there are two data voltages of opposed polarity to a pixel PX relative to common electric voltage Vcom, can driving voltage be increased and improve response speed.In addition, as mentioned above, the impact that flyback voltage brings can be removed, thus prevent flicker etc.

Then, with reference to Figure 13, liquid crystal panel assembly in accordance with another embodiment of the present invention will be described.

Figure 13 illustrates a pixel of display panels in accordance with another embodiment of the present invention and the equivalent circuit diagram of structure.

With reference to Figure 13, also comprise signal wire according to the liquid crystal panel assembly of the present embodiment and (comprise many gate lines G _iwith multipair data line D _jand D _j+1) and multiple pixel PX of being connected thereto.About the structure of liquid crystal display, the liquid crystal layer 3 that liquid crystal display comprises lower panel 100 respect to one another and top panel 200 and is plugged between the two.

Each pixel PX comprises and is connected to signal wire G _i, D _jand D _j+1the first on-off element Qa and second switch element Qb, liquid crystal capacitor Clc and holding capacitor Cst.

Be different from the embodiment shown in Fig. 2 and Fig. 3, in the present embodiment, the first pixel electrode PEa and the second pixel electrode PEb is stacked on top of each other and insulator is plugged between the two to form holding capacitor Cst.Like this, by forming the holding capacitor Cst in each pixel PX, there is no need for the extra wiring transmitting common electric voltage Vcom, thus increasing aperture ratio.

The operation of liquid crystal display (comprising the first on-off element Qa and second switch element Qb, liquid crystal capacitor Clc, color filter CF, polarizer (not shown) and liquid crystal panel assembly) and the description of effect are referring to figs. 1 through the description of the same parts shown in Fig. 5.Therefore, the description detailed to it will be omitted.

Then, with reference to Figure 14, liquid crystal panel assembly in accordance with another embodiment of the present invention will be described.

Figure 14 is the equivalent circuit diagram of the structure that a pixel and display panels are shown according to a further embodiment of the invention.

With reference to Figure 14, also comprise signal wire according to the liquid crystal panel assembly of the present embodiment and (comprise many gate lines G _iwith multipair data line D _jand D _j+1) and multiple pixel PX of being connected thereto.About the structure of liquid crystal display, the liquid crystal layer 3 that liquid crystal display comprises lower panel 100 respect to one another and top panel 200 and is plugged between the two.

Each pixel PX comprises and is connected to signal wire G _i, D _jand D _j+1the first on-off element Qa and second switch element Qb, liquid crystal capacitor Clc and the first holding capacitor Csta and the second holding capacitor Cstb.

First on-off element Qa and second switch element Qb is the thin film transistor (TFT) that three-terminal element is such as arranged in lower panel 100.Its control end is connected to gate lines G _i, its input end is connected to data line D _jand D _j+1, its output terminal is connected to liquid crystal capacitor Clc and the first holding capacitor Csta and the second holding capacitor Cstb.

Liquid crystal capacitor Clc can adopt the first pixel electrode PEa of lower panel 100 and the second pixel electrode PEb as two terminals, or the first pixel electrode PEa or the second pixel electrode PEb and public electrode CE can be adopted as two terminals.First pixel electrode PEa and the second pixel electrode PEb is connected to the first on-off element Qa and second switch element Qb.On the front surface that public electrode CE is formed in lower panel 100 and within the region of a pixel PX, and be formed in the layer being different from the layer forming pixel electrode PE (comprising the first pixel electrode PEa and the second pixel electrode PEb).Predetermined voltage such as common electric voltage Vcom etc. is applied to public electrode CE.The data voltage relative to common electric voltage Vcom with opposed polarity is applied to the first pixel electrode PEa and the second pixel electrode PEb respectively.Meanwhile, liquid crystal layer 3 has positive dielectric anisotropy.The liquid crystal molecule of liquid crystal layer 3 has without major axis during electric field by orientation being the horizontal surface perpendicular to panel 100 and 200.

First holding capacitor Csta's and the second holding capacitor Cstb is each by stacked for each and public electrode CE of the first pixel electrode PEa and the second pixel electrode PEb and insulator is plugged in therebetween and is formed.But the first holding capacitor Csta or the second holding capacitor Cstb can be formed between the two by the first pixel electrode PEa or the second pixel electrode PEb and previous gate line (not shown) or the stacked on top of each other and insulator of extra signal wire (not shown) being plugged in.

The color filter 230 of one of display primaries is arranged on corresponding in the region of pixel electrode PE of top panel 200.Be different from Figure 14, color filter CF can be placed in above or below the pixel electrode PE of lower panel 100.

At least one polarizer (not shown) is arranged in liquid crystal panel assembly.

Comprise the operation of the liquid crystal display of liquid crystal panel assembly and the description of the effect description referring to figs. 1 through the same parts shown in 5.Therefore, detailed description will be omitted.

Hereinafter, with reference to Figure 15 and 16, the example of the liquid crystal panel assembly shown in Figure 14 will be described.

Figure 15 is the layout of the liquid crystal panel assembly according to the embodiment of the present invention, and Figure 16 is the sectional view of the liquid crystal panel assembly obtained along the XVI-XVI line of Figure 15.

Substantially identical with the layered structure of the liquid crystal panel assembly shown in 12 with Figure 11 according to the layered structure of the liquid crystal panel assembly of the present embodiment.

First, lower panel 100 will be described.

Many gate lines 121 and Duo Gen public pressure wire 271 (comprising multipair first grid electrode 124a and second grid electrode 124b) are formed on insulated substrate 110.

Public pressure wire 271 is transmitted common electric voltage Vcom and is extended along the horizontal direction being basically parallel to gate line 121.Public pressure wire 271 to be placed between two adjacent gate polar curves 121 and by substantially identical distance and two gate lines 121 spaced apart.

Multiple public electrode 270 is formed in insulated substrate 110 and public pressure wire 271.Public electrode 270 has quadrangle.Public electrode 270 is arranged to matrix and almost occupies the space between gate line 121.Public electrode 270 is connected to the public pressure wire 271 that will be applied in common electric voltage Vcom.Public electrode 270 can be made up of transparent conductive material such as ITO, IZO etc.

Gate insulator 140 is formed on gate line 121, public pressure wire 271 and public electrode 270.Gate insulator 140 prevents the short circuit allow gate line 121 and public electrode 270 to be electrically insulated from other the conductive film be formed thereon each other of gate line 121 and public electrode wire 270.

Multipair first island semiconductor 154a and the second island semiconductor 154b, multipair first island Ohmic contact 163a and the second island Ohmic contact 165a, multipair first data line 171a and the second data line 171b and multipair first drain electrode 175a and the second drain electrode 175b are sequentially formed on gate insulator 140.

The lower passivation layer 180p be made up of silicon nitride or monox is formed on the expose portion of the first data line 171a and the second data line 171b, the first drain electrode 175a and the second drain electrode 175b and the first semiconductor 154a and the second semiconductor 154b.

To separate at predetermined intervals and the frequency modulated light part 220 with multiple opening 227 is formed on lower passivation layer 180p.Frequency modulated light part 220 can comprise the linear segment of vertical elongation and correspond to the four corners of thin film transistor (TFT).Frequency modulated light part 220 prevents light from revealing.Multiple through hole 225a and 225b be placed in above the first drain electrode 175a and the second drain electrode 175b are formed on frequency modulated light part 220.

Multiple color filter 230 is formed on passivation layer 180p and frequency modulated light part 220.The major part of color filter 230 be arranged on by frequency modulated light part 220 around regional extent in.

Here, lower passivation layer 180p can prevent the pigment of color filter 230 from entering into the expose portion of semiconductor 154a and 154b.

Upper passivation layer 180q is formed on frequency modulated light part 220 and color filter 230.Upper passivation layer 180q can be made up of inorganic insulating material such as silicon nitride, monox etc.By suppressing the pollution of liquid crystal layer 3, upper passivation layer 180q prevents color filter 230 layering and prevents the image retention that mistake such as can occur when driving screen, and this is that the solvent such as introduced by color filter 230 due to organic material causes.

But at least one frequency modulated light part 220 and color filter 230 can be placed on top panel 200.In the case, one of the lower passivation layer 180p and upper passivation layer 180q of lower panel 100 can be omitted.

Multiple contact hole 185a and 185b for exposing the first drain electrode 175a and the second drain electrode 175b are formed in upper passivation layer 180q and lower passivation layer 180p.

Multipair first pixel electrode 191a and the second pixel electrode 191b is formed on passivation layer 180q.First pixel electrode 191a comprises multiple branch electrodes and the cal connecting parts being connected branch electrodes with the second pixel electrode 191b.Public electrode 270 below first pixel electrode 191a and the second pixel electrode 191b and the first pixel electrode 191a and the second pixel electrode 191b is stacked.

The cal connecting parts of the first pixel electrode 191a vertically extends on the left side of public electrode 270.The branch electrodes be placed in above public pressure wire 271 has a down dip to the right from coupling part and tiltedly extends, be placed in branch electrodes below public pressure wire 271 from coupling part to the right updip tiltedly extend.

The cal connecting parts of the second pixel electrode 191b vertically elongates on the right side of public electrode 270.Be placed in branch electrodes above public pressure wire 271 from coupling part left updip tiltedly extend, another branch electrodes be placed in below public pressure wire 271 extends to left down obliquely from coupling part.

The branch electrodes of the first pixel electrode 191a and the second pixel electrode 191b is engaged with each other at predetermined intervals and alternately arranges, thus forms comb-like pattern.

The liquid crystal layer 3 be plugged between lower panel 100 and top panel 200 has positive dielectric anisotropy and comprises liquid crystal molecule 31.Liquid crystal molecule 31 has when not having electric field by major axis that orientation is the surface perpendicular to panel 100 and 200.

First pixel electrode 191a forms liquid crystal capacitor Clc with the second pixel electrode 191b (it is applied with from the data voltage of the first drain electrode 175a with the second drain electrode 175b) together with the liquid crystal layer 3 be plugged between the two.Even if after the first film transistor Qa and the second thin film transistor (TFT) Qb turns off, the voltage applied also is stored.

Except gate insulator 140, upper insulation course 180p and lower insulation course 180q, first pixel electrode 191a and the second pixel electrode 191b and public electrode 270 are also made up of dielectric substance, to form the first holding capacitor Csta and the second holding capacitor Cstb, thus to improve the store voltages performance of liquid crystal capacitor Clc.Some being placed in the first pixel electrode 191a and the color filter 230 between the second pixel electrode 191b and public electrode 270 are removed, and cause the memory capacitance of the first holding capacitor Csta and the second holding capacitor Cstb to increase.

The first extension 177a being connected to the first pixel electrode 191a and the second pixel electrode 191b of the first drain electrode 175a and the second drain electrode 175b and the second extension 177b with store the stacked and gate insulator 140 in extension 137 between, thus form the first holding capacitor Csta and the second holding capacitor Cstb.First holding capacitor Csta and the second holding capacitor Cstb enhances the store voltages performance of liquid crystal capacitor Clc.

Both alignment layers 11 and 21 is formed on the inside surface of lower panel 100 and top panel 200.Two both alignment layers 11 and 21 can be horizontal direction matching layers.

Be applied to public electrode 270 as common electric voltage Vcom and two data voltages relative to common electric voltage Vcom with opposed polarity are applied to the first pixel electrode 191a and the second pixel electrode 191b time, the electric field being basically parallel to the horizontal surface of panel 100 and 200 produces in liquid crystal layer 3.Therefore, the liquid crystal molecule 31 of liquid crystal layer 3 has by orientation is that level is in the major axis of electric field.Incident polarisation of light degree changes according to angle of inclination.Embodiment before being different from, in the present embodiment, by producing the electric field in the liquid crystal layer 3 between the first pixel electrode 191a and the second pixel electrode 191b and the electric field by producing in public electrode 270 and the liquid crystal layer 3 between the first pixel electrode 191a and the second pixel electrode 191b, the response speed that can increase liquid crystal molecule 31 also improves the transmissivity of liquid crystal display further.Meanwhile, the horizontal component of electric field is basically perpendicular to the branch electrodes of the first pixel electrode 191a and the second pixel electrode 191b.As shown in figure 15, because the direction of orientation of branch electrodes is different from each other based on public pressure wire 271, wide visible angle can be obtained by the direction of orientation changing liquid crystal molecule 31.

Then, with reference to Figure 17, liquid crystal panel assembly in accordance with another embodiment of the present invention will be described.

Figure 17 is the equivalent circuit diagram that structure according to the liquid crystal panel assembly of the embodiment of the present invention and a pixel are shown.

With reference to Figure 17, also comprise signal wire according to the liquid crystal panel assembly of the present embodiment and (comprise multiple gate lines G _iand multipair data line D _jand D _j+1) and multiple pixel PX being connected to it as shown in figure 14.

Each pixel PX comprises the first on-off element Qa and second switch element Qb (is connected to signal wire G _i, D _jand D _j+1), liquid crystal capacitor Clc, the first liquid crystal capacitor Clca and the second liquid crystal capacitor Clcb and the first holding capacitor Csta and the second holding capacitor Cstb.

But different from the embodiment shown in Figure 14, in the present embodiment, public electrode CE is formed on whole top panel 200.First liquid crystal capacitor Clca/ second liquid crystal capacitor Clcb adopts the first pixel electrode PEa/ second pixel electrode PEb of the lower panel 100 and public electrode CE of top panel 200 as its two terminals.First pixel electrode PEa of liquid crystal capacitor Clc employing lower panel 100 and the second pixel electrode PEb is as two terminals.

By by pixel electrode PE (comprising the first pixel electrode PEa, the second pixel electrode PEb) and signal wire (not shown) or gate line (not shown) is before stacked in the top of corresponding gate line and insulator is plugged between the two, the first holding capacitor Csta and the second holding capacitor Cstb is constructed.

In the present embodiment, by being applied with the first pixel electrode PEa and the second pixel electrode PEb of the data voltage of opposed polarity, level produces in liquid crystal layer 3 in the electric field of panel 100 and 200.Meanwhile, by the first pixel electrode PEa of the lower panel 100 and public electrode CE of the second pixel electrode PEb and top panel 200, extra electric field produces in liquid crystal layer 3.The edge of the first pixel electrode PEa and the second pixel electrode PEb makes electric field distorting together with public electrode CE, thus produces the horizontal component perpendicular to the edge of pixel electrode PEa and PEb.Therefore, the liquid crystal molecule with the liquid crystal layer 3 of positive dielectric anisotropy is by orientation for being parallel to electric field, and the polarization variations degree of the incident light in liquid crystal layer 3 changes according to the angle of inclination of liquid crystal molecule.

Different from the present embodiment, the first pixel electrode PEa and the second pixel electrode PEb can be stacked on top of each other, thus form holding capacitor (not shown).

Hereinafter, with reference to Figure 18 and Figure 19, the example of the liquid crystal panel assembly shown in Figure 17 will be described.

Figure 18 is the layout of the liquid crystal panel assembly according to the embodiment of the present invention, and Figure 19 is the sectional view of the liquid crystal panel assembly taken along the XIX-XIX line in Figure 18.

Substantially identical with the hierarchy of the liquid crystal panel assembly shown in Figure 11 with Figure 12 according to the hierarchy of the liquid crystal panel assembly of the present embodiment.

First, lower panel 100 will be described.Many gate lines 121 (comprising multipair first grid electrode 124a and second grid electrode 124b) and many storage electrode lines 131 are formed on insulated substrate 110.Gate insulator 140 is formed thereon.Multipair first linear semiconductor 151a and the second linear semiconductor, the multipair first linear Ohmic contact 161a and second linear Ohmic contact (not shown), multipair first island Ohmic contact 165a and the second island Ohmic contact (not shown), multipair first data line 171a and the second data line 171b and multipair first drain electrode 175a and the second drain electrode 175b are sequentially formed on gate insulator 140.Passivation layer 180, first pixel electrode 191a and the second pixel electrode 191b and both alignment layers 11 are sequentially formed thereon.

Then, top panel 200 will be described.Light blocking part 220, color filter 230, overlayer 250, public electrode 270 and both alignment layers 21 are sequentially formed on insulated substrate 210.

Different from the liquid crystal panel assembly shown in Figure 11 and Figure 12, in the present embodiment, the first linear semiconductor 151a and the second linear semiconductor (not shown) are linear and comprise the first outstanding along source electrode 173a and 173b and drain electrode 175a and 175b respectively projection 154aa and the second projection 154bb.In addition, linear Ohmic contact 161a also extends linearly along data line 171a and comprises along the outstanding projection 163a of source electrode 173a.And other linear Ohmic contact (not shown) extends linearly along data line 171b and comprises along the outstanding projection (not shown) of source electrode 173b.Linear semiconductor 151a has substantially substantially identical with Ohmic contact 161a, 163a with 165a (below data line 171a with drain electrode 175a) with data line 171a, drain electrode 175a even shape.And the second linear semiconductor (not shown) has the even shape substantially identical with the Ohmic contact (not shown) below data line 171b with drain electrode 175b with data line 171b, drain electrode 175b.

In the method manufacturing lower panel 100 according to an embodiment of the invention, data line 171a and 171b, drain electrode 175a and 175b, semiconductor 151a and Ohmic contact 161a, 163a and 165a are formed by a photoetching process.

Storage electrode line 131 to be placed between two adjacent gate polar curves 121 and to separate with substantially identical distance and two gate lines 121.First pixel electrode 191a and the second pixel electrode 191b is stacked on storage electrode line 131 that gate line insulation course 140 and passivation layer 180 are plugged between the two, thus forms the first holding capacitor Csta and the second holding capacitor Cstb.At this moment, the passivation layer 180 in the first pixel electrode 191a and the second pixel electrode 191b and the mutually stacked part of storage electrode line 131 can be removed.

The each of first pixel electrode 191a and the second pixel electrode 191b has horizontal component and multiple vertical component.The horizontal component of the first pixel electrode 191a is positioned at lower end, and multiple vertical components of the first pixel electrode 191a upwards extend from horizontal component.The horizontal component of the second pixel electrode 191b is positioned at upper end, and multiple vertical components of the second pixel electrode 191b are from horizontal component to downward-extension.Horizontal component and the vertical component of the first pixel electrode 191a and the second pixel electrode 191b are perpendicular to one another in fact.The vertical component of the first pixel electrode 191a and the second pixel electrode 191b is alternately arranged.

In addition, the various characteristics of the liquid crystal panel assembly shown in Fig. 1, Fig. 5, Fig. 6 and Fig. 7 and the liquid crystal display that comprises it also can be applied to the liquid crystal panel assembly shown in Figure 18 and Figure 19.

Then, with reference to Figure 20, liquid crystal panel assembly in accordance with another embodiment of the present invention will be described.

Figure 20 is the equivalent circuit diagram that structure according to the liquid crystal panel assembly of the embodiment of the present invention and a pixel are shown.

With reference to Figure 20, also comprise signal wire according to the liquid crystal panel assembly of the present embodiment and (comprise many gate lines G _iwith multipair data line D _jand D _j+1) and multiple pixel PX of being connected thereto, embodiment as shown in Figure 8.

In the present embodiment, each pixel PX comprises the first on-off element Qa and second switch element Qb (is connected to signal wire G _i, D _jand D _j+1), liquid crystal capacitor Clc and the first holding capacitor Csta and the second holding capacitor Cstb.

Each control end of the first on-off element Qa/ second switch element Qb is connected to gate lines G _i, its input end is connected to gate line D _j/ D _j+1, its output terminal is connected to the first pixel electrode PEa/ second pixel electrode PEb.

First pixel electrode PEa of liquid crystal capacitor Clc employing lower panel 100 and the second pixel electrode PEb is as two terminals.Liquid crystal capacitor Clc adopts the first pixel electrode PEa and the second pixel electrode PEb, and comprises liquid crystal layer 3 as dielectric substance.Distance between first pixel electrode PEa and the second pixel electrode PEb is decided by the position of the first pixel electrode PEa and the second pixel electrode PEb.The data voltage relative to common electric voltage Vcom with opposed polarity is applied to the first pixel electrode PEa and the second pixel electrode PEb.Meanwhile, liquid crystal layer 3 has positive dielectric anisotropy.The liquid crystal molecule of liquid crystal layer 3 has without major axis during electric field by orientation being the surface perpendicular to panel.

By being stacked on extra signal wire (not shown) or previous gate line (not shown) by the first pixel electrode PEa and the second pixel electrode PEb above corresponding gate line, insulator is plugged between the two, forms the first holding capacitor Csta and the second holding capacitor Cstb.

Be different from the present embodiment, the first pixel electrode PEa and the second pixel electrode PEb can be stacked on top of each other and insulator is plugged between the two, thus form a holding capacitor (not shown).

By the first pixel electrode PEa and the second pixel electrode PEb, it is applied with the data voltage relative to common electric voltage Vcom with opposed polarity, and basic horizontal produces in liquid crystal layer 3 in the electric field of panel 100 and 200.When the first pixel electrode PEa and the second pixel electrode PEb is comparatively near each other, the situation far away each other with the second pixel electrode PEb with the first pixel electrode PEa is compared, and electric field becomes stronger.Therefore, the angle of inclination being placed in the liquid crystal molecule in the first pixel electrode PEa place closer each other with the second pixel electrode PEb is relative large, to be more parallel to electric field, therefore transmittance increases.Like this, because two regions with different transmittance are present in a pixel PX, by suitably adjusting the distance between the first pixel electrode PEa and the second pixel electrode PEb, side gamma curve maximally close to front gamma curve, thus can improve side visuality.In addition, by alternately mixing the first pixel electrode PEa and the second pixel electrode PEb part far away each other part nearer each other with the first pixel electrode PEa and the second pixel electrode PEb, the transmissivity of liquid crystal display can be improved.

In addition, according to an embodiment of the invention the operation of liquid crystal display (comprising color filter CF, polarizer (not shown) and liquid crystal panel assembly) and the description of effect referring to figs. 1 through the description of the same parts shown in Fig. 5.Therefore, detailed description will be omitted.

Hereinafter, with reference to Figure 21 and Figure 22, the example of the liquid crystal panel assembly shown in Figure 20 will be described.

Figure 21 is the layout of the liquid crystal panel assembly according to the embodiment of the present invention, and Figure 22 is the sectional view of the liquid crystal panel assembly obtained along XXII-XXII line in Figure 21.

First, lower panel 100 will be described.Many gate lines 121 (comprising multipair first grid electrode 124a and second grid electrode 124b) and multiple storage electrode line 131 are formed on insulated substrate 110.Gate insulator 140 is formed thereon.Multipair first island semiconductor 154a and the second island semiconductor 154b, multipair first island Ohmic contact 163a and the second island Ohmic contact 165a, multipair first data line 171a and the second data line 171b and multipair first drain electrode 175a and the second drain electrode 175b are sequentially formed on gate insulator 140.Passivation layer 180, the first pixel electrode 191a with multiple component and the second pixel electrode 191b and both alignment layers 11 are sequentially formed thereon.The component of the first pixel electrode 191a and the second pixel electrode 191b extends and the angle of about 45 degree of tilting relative to gate line 121 or storage electrode line 131 obliquely.

Different from the embodiment shown in Figure 11 and Figure 12, in the present embodiment, there is low gray areas LA (wherein the component of the first pixel electrode 191a and the second pixel electrode 191b is far away each other) and high gray areas (wherein the component of the first pixel electrode 191a and the second pixel electrode 191b is nearer each other), the region namely except low gray areas LA.High gray areas is divided into three parts such as top, bottom and middle part.Low gray areas LA be placed in high gray areas top or between bottom and middle part, and there is the shape of " < ".In low gray areas LA the first pixel electrode 191a and the second pixel electrode 191b component between gap can in the scope of 6 μm to 20 μm.In high gray areas the first pixel electrode 191a and the second pixel electrode 191b component between gap can in the scope of 2 μm to 5 μm.But in low gray areas LA and high gray areas, the gap between the component of the first pixel electrode 191a and the second pixel electrode 191b and the width of component can change.

By changing the gap in a pixel between the first pixel electrode 191a and the second pixel electrode 191b, the pitch angle of liquid crystal molecule can be changed and show different brightness about a group image information.In addition, by the gap between the component that suitably adjusts the first pixel electrode 191a and the second pixel electrode 191b, the image watched from the side can be made maximally close to the image from front viewing.Therefore, side visuality can be improved and strengthen transmissivity.

In addition, storage electrode line 131 comprises outstanding multiple storage electrodes 137 downwards.Each and the storage electrode 137 of the first drain electrode 175a and the second drain electrode 175b is stacked, thus forms the first holding capacitor Csta and the second holding capacitor Cstb.

In addition, the first data line 171a and the second data line 171b comprises the multipair first drain electrode 173a and the second drain electrode 173b that bend to C shape to first grid electrode 124a and second grid electrode 124b or bend to the C shape overturn sidewards.

In addition, the various characteristics of the liquid crystal panel assembly shown in Fig. 1, Fig. 5, Fig. 6 and Fig. 7 and the liquid crystal display that comprises it also can be applied to the liquid crystal panel assembly shown in Figure 21 and Figure 22.

Then, with reference to Figure 23 to Figure 25, another example of the liquid crystal panel assembly shown in Figure 20 will be described.

Figure 23 to Figure 25 is the layout of the liquid crystal panel assembly according to the embodiment of the present invention.

First, the liquid crystal panel assembly shown in Figure 23 will be described.

Substantially identical with the liquid crystal panel assembly shown in Figure 21 with Figure 22 according to the liquid crystal panel assembly of the present embodiment.

But except top panel 100 or lower panel 200, liquid crystal panel assembly also comprises light blocking part 220.Light blocking part 220 prevents the light between pixel electrode 191 from revealing and defines the open area of pixel-oriented electrode.

In addition, first pixel electrode 191a and the second pixel electrode 191b low gray areas far away is each other relative to high gray areas (wherein the first pixel electrode 191a and the second pixel electrode 191b is nearer each other), region namely except low gray areas LA, is placed in upper and lower dividually.Gap between first pixel electrode 191a from the second pixel electrode 191b can different with Figure 21.The first pixel electrode 191a in low gray areas LA and the gap between the component of the second pixel electrode 191b can in the scopes of 6 μm to 20 μm.In high gray areas the first pixel electrode 191a and the second pixel electrode 191b component between gap can in the scope of 2 μm to 5 μm.

Then, the liquid crystal panel assembly shown in Figure 24 will be described.

Substantially identical with the hierarchy of the liquid crystal panel assembly shown in Figure 21 with Figure 22 according to the hierarchy of the liquid crystal panel assembly of the present embodiment.Hereinafter, will mainly describe and the embodiment difference shown in Figure 21 and Figure 22.

First, lower panel (not shown) will be described.The many gate lines 121 comprising multipair first grid electrode 124a and second grid electrode 124b and the multiple grid conductors comprising many storage electrode lines 131 are formed on insulated substrate (not shown).

Storage electrode line 131 comprises multipair first storage electrode 133a and the second storage electrode 133b.First storage electrode 133a and the second storage electrode 133b is spaced apart from each other within a predetermined distance.First storage electrode 133a and the second storage electrode 133b each vertically stretches and is included in the extension of its lower end.Above storage electrode line 131, the storage electrode line 131 comprising storage electrode 133a and 133b is stacked by the first pixel electrode 191a and the second pixel electrode 191b, thus forms the first holding capacitor Csta and the second holding capacitor Cstb.

Gate insulator (not shown), multipair first island semiconductor 154a and the second island semiconductor 154b, multipair first island Ohmic contact and the second island Ohmic contact (not shown), multipair first data line 171a and the second data line 171b and multipair first drain electrode 175a and the second drain electrode 175b are sequentially formed on grid conductor 121 and 131.

First data line 171a and the second data line 171b comprises and bends to W shape extending across the land towards the multipair first drain electrode 173a of first grid electrode 124a and second grid electrode 124b and the second drain electrode 173b.First drain electrode 175a and the second drain electrode 175b comprises a pair rod type end and has other end of large size.

Passivation layer 180 is formed on the expose portion of the first data line 171a and the second data line 171b, the first drain electrode 175a and the second drain electrode 175b and semiconductor 154a and 154b.First pixel electrode 191a and the second pixel electrode 191b is formed thereon.

First pixel electrode 191a comprises vertical component 192a, horizontal component 193a, top set part 194a and lower branch portion 195a.Horizontal component 193a substantially vertically divides vertical component 192a equally and extends to the right.Top set part 194a to be placed in above horizontal component 193a and to extend to upper right obliquely from vertical component 192a or horizontal component 193a.Lower branch portion 195a to be placed in below horizontal component 193a and from vertical component 192a or horizontal component 193a downward-extension to the right obliquely.

Second pixel electrode 191b comprises vertical component 192b, upper horizontal component 193b1, lower horizontal component 193b2, top set part 194b and lower branch portion 195b.Vertical component 192b is relative with vertical component 192a via the horizontal component 193a of the first pixel electrode 191a.Upper horizontal component 193b1 and lower horizontal component 193b2 extends to the left in the top and bottom of vertical component 192b respectively, and substantially tilts at a right angle relative to vertical component 192b.To extend obliquely to left down from the vertical component 192b of the second pixel electrode 191b or upper horizontal component 193b1 above the horizontal component 193a that top set part 194b is placed in the first pixel electrode 191a.Below the horizontal component 193a that lower branch portion 195b is placed in the first pixel electrode 191a and from the vertical component 192b of the second pixel electrode 191b or lower horizontal component 193b2 left updip tiltedly extend.

Component 194a, 194b, 195a and 195b of first pixel electrode 191a and the second pixel electrode 191b can to tilt about miter angle relative to gate line 121 or storage electrode line 131.

Top set part 194a, 194b and lower branch portion 195a, 195b of first pixel electrode 191a and the second pixel electrode 191b are arranged alternately.The region that the first adjacent pixel electrode 191a and the second pixel electrode 191b is far away each other and the nearer each other region of the first adjacent pixel electrode 191a and the second pixel electrode 191b are arranged alternately.Namely, with be arranged on top set part 194b/ lower branch portion 195b below/top top set part 194a/ lower branch portion 195a compared with, this top set part 194b/ lower branch portion 195b of the second pixel electrode 191b is closer to the top set part 194a/ lower branch portion 195a of the first pixel electrode 191a of top/below being arranged on this top set part 194b/ lower branch portion 195b.Alternatively, the second pixel electrode 191b top set part 194b/ lower branch portion 195b can closer to being positioned at below top set part 194b/ lower branch portion 195b/the top set part 194a/ lower branch portion 195a of the first pixel electrode 191a of top.

In this fashion, by being arranged alternately the first pixel electrode 191a and the second pixel electrode 191b region far away each other and the nearer each other region of the first pixel electrode 191a and the second pixel electrode 191b, the electric field intensity that produces in liquid crystal layer 3 can being changed and change the pitch angle of liquid crystal molecule 31.In addition, side visuality (side visibility) and the transmissivity of liquid crystal display can be improved.

Be different from the present embodiment, the first pixel electrode 191a and the second pixel electrode 191b several regions far away each other can be positioned at the first pixel electrode 191a and the second pixel electrode 191b areas adjacent nearer each other.In addition, several regions that the first pixel electrode 191a and the second pixel electrode 191b is nearer each other can be positioned at the first pixel electrode 191a and the second pixel electrode 191b areas adjacent far away each other.In addition, by adjusting the layout in distance between the first pixel electrode 191a and the second pixel electrode 191b or adjustment the first pixel electrode 191a and the second pixel electrode 191b region far away each other and the first pixel electrode 191a and the second pixel electrode 191b region nearer each other, transmissivity can be made to maximize and improve side visuality.

Then, both alignment layers (not shown) is formed on passivation layer (not shown) and pixel electrode 191a and 191b.

Below, will be described top panel (not shown).Light blocking part (not shown), color filter (not shown), overlayer (overcoat) (not shown) and both alignment layers (not shown) are formed on insulated substrate (not shown) in turn.

In addition, the various characteristics of the liquid crystal panel assembly shown in Figure 21 and Figure 22 also can be applied to the liquid crystal panel assembly shown in Figure 24.

Next, be described to the liquid crystal panel assembly shown in Figure 25.

Substantially identical with the liquid crystal panel assembly shown in Figure 24 according to the liquid crystal panel assembly of the present embodiment.Below, will the place being different from the embodiment shown in Figure 24 mainly be described.

Be different from the liquid crystal panel assembly shown in Figure 24, in the present embodiment, storage electrode line 131 is comparatively close to the lower gate line 121 in two gate lines 121, stacked with the first drain electrode 175a in upper strata and the second drain electrode 175b respectively, and comprise the first storage electrode 133a and the second storage electrode 133b that project upwards.First storage electrode 133a and the second storage electrode 133b respectively with the large overlay area of the part of the first drain electrode 175a and the second drain electrode 175b, and there is the insulator 140 be plugged in therebetween, thus form the first holding capacitor Csta and the second holding capacitor Cstb.

In addition, comprise according to the liquid crystal panel assembly of the present embodiment and be formed in the first pixel electrode 191a on passivation layer 180 and the second pixel electrode 191b.The general outline of the first pixel electrode 191a and the second pixel electrode 191b has rectangular shape.

First pixel electrode 191a is included in left vertical component 192a that vertical direction extends longly, in the vertical direction short right vertical component 198a, upper horizontal component 193a, the multiple curved branches that extend from part 192a, 193a, 198a extended divide 195a and multiple linear branch part 197a, and bending three times and a pair non-central curved portion 196a extended in the vertical direction longly.Second pixel electrode 191b is included in left vertical component 198b that vertical direction extends shortly, in the vertical direction long right vertical component 192b, lower horizontal component 193b, the multiple curved branches that extend from part 192b, 193b and 198b extended divide 195b and multiple linear branch part 197b, and bending three times and a pair non-central curved portion 196b extended in the vertical direction longly.

The curved branches of the first pixel electrode 191a divides the curved branches of 195a, linear branch part 197a and non-central curved portion 196a and the second pixel electrode to divide 195b, linear branch part 197b and non-central curved portion 196b to be arranged alternately respectively.Adjacent curved branches divide the distance between 195a and 195b or the distance between adjacent linear branch part 197a and 197b larger than the distance between adjacent non-central curved portion 196a and 196b.Thus the electric field intensity produced between non-central curved portion 196a and 196b is better than curved branches and divides the electric field intensity that produces between 195a and 195b or be better than the electric field intensity produced between linear branch part 197a and 197b.The pitch angle of the liquid crystal molecule of the liquid crystal layer (not shown) in non-central curved portion 196a and 196b is greater than the pitch angle dividing the liquid crystal molecule of the liquid crystal layer in 195a and 195b or in linear component 197a and 197b in curved branches.The brightness of this pixel can be changed by the pitch angle changing liquid crystal molecule in one pixel or improved the side visuality of liquid crystal molecule display by the gap between adjustment pixel electrode 191a and 191b.

Then, with reference to Figure 26, be described to liquid crystal panel assembly according to another embodiment of the invention.

Figure 26 illustrates the structure of liquid crystal panel assembly according to an embodiment of the invention and the equivalent circuit diagram of a pixel.

A pair first sub-pixel PXh and the second sub-pixel PXl are comprised with reference to Figure 26, each pixel PX.First sub-pixel PXh and the second sub-pixel PXl comprises liquid crystal capacitor Clch and Clcl and holding capacitor Csth and Cstl.At least one of first sub-pixel PXh and the second sub-pixel PXl comprises and is connected to gate line, two on-off element (not shown) of data line and liquid crystal capacitor Clch and Clcl.

First pixel electrode PEha and PEla of liquid crystal capacitor Clch and Clcl employing lower panel 100 and the second pixel electrode PEhb and PElb is as two terminals.Liquid crystal layer 3 between first pixel electrode PEha and PEla and the second pixel electrode PEhb and PElb plays dielectric substance.Second pixel electrode PEhb and PElb is connected respectively to on-off element (not shown) separately.At least one of first pixel electrode PEha and PEla is also connected to an on-off element (not shown) separated.But in contrast, the second pixel electrode PEhb and PElb can be arranged on top panel 200.Meanwhile, the second pixel electrode PEhb and PElb can be applied in additional common electric voltage Vcom and be free of attachment to on-off element.Meanwhile, the liquid crystal molecule of liquid crystal layer 3 has positive dielectric anisotropy and is perpendicular to panel 100 and 200 by orientation.

The holding capacitor Csth/Cstl performing the booster action of liquid crystal capacitor Clch/Clcl is formed by the first pixel electrode PEha/PEla and the second pixel electrode PEhb/PElb being inserted with insulator between lower panel 100.

In addition, identical with former embodiment with the description of polarizer (not shown) to color filter CF, therefore omit the description to it.

Below, with reference to Figure 27, be described in detail to the example of the liquid crystal panel assembly shown in Figure 26.

Figure 27 is the equivalent circuit diagram of two sub-pixels of the liquid crystal panel assembly illustrated according to another embodiment of the invention.

With reference to Figure 27, (it comprises gate lines G to comprise signal wire according to the liquid crystal panel assembly of the present embodiment _iand the first data line D adjacent one another are _jwith the second data line D _j+1) and be connected to the pixel PX of signal wire.

Pixel PX comprises a pair first sub-pixel PXh and the second sub-pixel PXl.Each the comprising of the first sub-pixel PXh and the second sub-pixel PXl is connected to gate lines G _iand data line D _jand D _j+1the first on-off element Qha and Qla and second switch element Qhb and Qlb, be connected to liquid crystal capacitor Clch and Clcl of on-off element and the first holding capacitor Cstha and Cstla and the second holding capacitor Csthb and Cstlb.

The data voltage relative to common electric voltage Vcom with reciprocal polarity is applied to the first data line D _jwith the second data line D _j+1.

Each control end and the input end of the first on-off element Qha/Qla of the first sub-pixel PXh/ second sub-pixel PXl are connected respectively to gate lines G _iwith the first data line D _j.Each control end and the input end of the second switch element Qhb/Qlb of the first sub-pixel PXh/ second sub-pixel PXl are connected respectively to gate lines G _iwith the second data line D _j+1.In addition, each output terminal of the first on-off element Qha/Qla is connected to liquid crystal capacitor Clch/Clcl and the first holding capacitor Cstha/Cstla.Each output terminal of second switch element Qhb/Qlb is connected to liquid crystal capacitor Clch/Clcl and the second holding capacitor Csthb/Cstlb.

The first on-off element Qha/Qla of the first sub-pixel PXh/ second sub-pixel PXl and the drain electrode of second switch element Qhb/Qlb and gate electrode form the first capacitor parasitics Cgdha/Cgdla and the second capacitor parasitics Cgdhb/Cgdlb.

In the present embodiment, the size of the flyback voltage (kickback voltage) at each two ends place of liquid crystal capacitor Clch and Clcl can be changed by the capacity of adjustment first capacitor parasitics Cgdha, Cgdla and second capacitor parasitics Cgdhb, Cgdlb, cause each charging voltage of sub-pixel PXh or PXl to change.

Such as, the first data line D is applied at the voltage of 7V and-7V _jwith the second data line D _j+1situation in, the size of the flyback voltage in the second capacitor parasitics Cgdhb of the first sub-pixel PXh and the first capacitor parasitics Cgdla of the second sub-pixel PXl is 0.5V, the size of the flyback voltage in the first capacitor parasitics Cgdha of the first sub-pixel PXh and the second capacitor parasitics Cgdlb of the second sub-pixel PXl is 1V, will be described respectively it.Then, when grid cut-off voltage Voff is applied to gate lines G _itime, each of voltage at the two ends of liquid crystal capacitor Clch and Clcl is reduced by flyback voltage.As a result, 6V and-7.5V is applied to the two ends of liquid crystal capacitor Clch, and charging voltage becomes 13.5V.In addition, 6.5V and-8V is applied to the two ends of liquid crystal capacitor Clcl, and charging voltage becomes 14.5V.Therefore, the pixel voltage of the first sub-pixel PXh and the second sub-pixel PXl becomes 13.5V and 14.5V respectively, thus makes the pitch angle of liquid crystal molecule different from each other and change the transmittance in the first sub-pixel PXh and the second sub-pixel PXl.As mentioned above, by adjusting the capacity of first capacitor parasitics Cgdha, Cgdla and second capacitor parasitics Cgdhb, Cgdlb, the visuality of liquid crystal display can be improved and strengthen the transmissivity of liquid crystal display under the prerequisite not reducing data voltage.

Identical with former embodiment with the description of second holding capacitor Csthb, Cstlb to liquid crystal capacitor Clch with Clcl, first holding capacitor Cstha, Cstla.Therefore, the detailed description to them is eliminated.

Below, with reference to figure 28A and 28B, the example of the liquid crystal panel assembly shown in Figure 27 is described.

Figure 28 A is the layout of liquid crystal panel assembly according to an embodiment of the invention, and Figure 28 B is the layout of the amplification of the on-off element of the liquid crystal panel assembly shown in Figure 28 A.

Substantially identical with the hierarchy of the liquid crystal panel assembly shown in Figure 21 with Figure 22 according to the hierarchy of liquid crystal panel assembly of the present invention.

First, will be described lower panel (not shown).Comprise the many gate lines 121 of multipair first grid electrode 124ha and 124la and second grid electrode 124hb and 124lb, comprise the multipair upper storage electrode line 131h of multiple storage electrode 133h and 133l and lower storage electrode line 131l and be formed on insulated substrate (not shown).Gate insulator (not shown), multipair first semiconductor 154ha and 154la and the second semiconductor 154hb and 154lb, multipair first island Ohmic contact (not shown) and the second island Ohmic contact (not shown), comprise multipair first data line 171a and the second data line 171b of the first source electrode 173ha and 173la and the second source electrode 173hb and 173lb, multipair first drain electrode 175ha and 175la and the second drain electrode 175hb and 175lb, comprise multiple contact hole (185ha, 185la, 185hb, passivation layer (not shown) 185lb), and multipair first pixel electrode 191ha and 191la and the second pixel electrode 191hb and 191lb is formed on lower panel in turn.

Then, will be described top panel (not shown).Light blocking part (not shown), color filter (not shown), overlayer (not shown) and both alignment layers (not shown) are formed on insulated substrate (not shown) in turn.

Gate line 121 and storage electrode line 131h and 131l extend and with the central crossbar of pixel PX.Gate line 121 is between storage electrode line 131h and 131l.

First pixel electrode 191ha and the second pixel electrode 191hb of the first sub-pixel PXh are positioned at above gate line 121.First pixel electrode 191la and the second pixel electrode 191lb of the second sub-pixel PXl are positioned at below gate line 121.In the first sub-pixel PXh and the second sub-pixel PXl, first pixel electrode 191ha and 191la and the second pixel electrode 191hb and 191lb comprises the multiple components extending to gate line 121 obliquely, and the component of the first pixel electrode 191ha and 191la and the second pixel electrode 191hb and 191lb is arranged alternately.

In the present embodiment, as shown in Figure 28 B, the overlay area formed between the second grid electrode 124hb of the second switch element Qhb of the first sub-pixel PXh and the second drain electrode 175hb can be less than the overlay area between the first grid electrode 124ha of the first on-off element Qha of formation first sub-pixel PXh and the first drain electrode 175ha.Such as, the ratio forming the overlay area between the first grid electrode 124ha of overlay area between the second grid electrode 124hb of second switch element Qhb and the second drain electrode 175hb and the first on-off element Qha and the first drain electrode 175ha can be 1: 1.1 to 1: 10 or 1: 2 to 1: 6.And when drain electrode 175ha and 175hb stacked with gate electrode 124ha and 124hb is linear, the ratio of this overlay area equals the width ratio between drain electrode 175ha and 175hb.Namely, the ratio of the width D 2 of the second drain electrode 175hb and the width D 1 of the first drain electrode 175ha can be about 1: 1.1 to about 1: 10 or about 1: 2 to about 1: 6.

The overlay area formed between the first grid electrode 124la of the first on-off element Qla of the second sub-pixel PXl and the first drain electrode 175la can be less than the overlay area between the second grid electrode 124lb of the second switch element Qlb of formation second sub-pixel PXl and the second drain electrode 175lb.

Such as, the ratio of the overlay area forming overlay area between the first grid electrode 124la of the first on-off element Qla and the first drain electrode 175la and form between the second grid electrode 124lb of second switch element Qlb and the second drain electrode 175lb can be about 1: 1.1 to about 1: 10 or about 1: 2 to about 1: 6.And when drain electrode 175la and 175lb stacked with gate electrode 124la and 124lb is linear, the ratio of this overlay area equals the width ratio between drain electrode 175la and 175lb.Namely, the ratio of the width D 3 of the first drain electrode 175la and the width D 4 of the second drain electrode 175lb can be about 1: 1.1 to about 1: 10 or about 1: 2 to about 1: 6.

As mentioned above, by adjusting the ratio of first grid electrode 124ha, 124la and second grid electrode 124hb, 124lb and the overlay area between first drain electrode 175ha, 175la and second drain electrode 175hb, 175lb, the capacity of capacitor parasitics Cgdha, Cgdla, Cgdhb and Cgdlb can be adjusted.

Like this, large 1.1 times to 10 times of the capacity of the volume ratio second capacitor parasitics Cgdhb of the first capacitor parasitics Cgdha of the first sub-pixel PXh can be made, and make large 1.1 times to 10 times of the capacity of the volume ratio first capacitor parasitics Cgdla of the second capacitor parasitics Cgdlb of the second sub-pixel PXl.

In addition, the capacity of the first capacitor parasitics Cgdha of the first sub-pixel PXh can equal the capacity of the second capacitor parasitics Cgdlb of the second sub-pixel PXl substantially.In addition, the capacity of the second capacitor parasitics Cgdhb of the first sub-pixel PXh can equal the capacity of the first capacitor parasitics Cgdla of the second sub-pixel PXl substantially.

Therefore, the charging voltage (namely, pixel voltage) of the first sub-pixel PXh and the second sub-pixel PXl can be made different from each other and improve side visuality.

Because the data voltage being applied to the first data line 171a and the second data line 171b has reciprocal polarity, so the response speed of liquid crystal molecule can be increased by increasing driving voltage and improves the transmissivity of liquid crystal display.

In addition, the various characteristics in the embodiment shown in Figure 21 and Figure 22 can be applied to the present embodiment.

Below, with reference to Figure 29, another example of the liquid crystal panel assembly shown in Figure 26 is described.

Figure 29 is the equivalent circuit diagram of two sub-pixels of liquid crystal panel assembly according to another embodiment of the invention.

Be different from the liquid crystal panel assembly shown in Figure 27, according in the liquid crystal panel assembly of the present embodiment, the first sub-pixel PXh or the second sub-pixel PXl comprises holding capacitor Csth or Cstl.Therefore, when holding capacitor Csth or Cstl is formed in each sub-pixel PXh or PXl, does not need the additional wiring formed for transmitting common electric voltage Vcom, thus increase aperture ratio.

Then, add Figure 30 to Figure 33 with reference to above-mentioned Fig. 1, be described to another example of the liquid crystal panel assembly shown in Figure 26.

Figure 30 to Figure 33 is the equivalent circuit diagram of two pixels of liquid crystal panel assembly according to another example of the present invention.

With reference to Figure 30, (it comprises gate lines G to comprise signal wire according to the liquid crystal panel assembly of the present embodiment _i, the first to the four data line D adjacent one another are _j, D _j+1, D _j+2and D _j+3) and be connected to the pixel PX of signal wire.

Pixel PX comprises a pair first sub-pixel PXh and the second sub-pixel PXl.Each the comprising of the first sub-pixel PXh/ second sub-pixel PXl is connected to gate lines G _iand data line D _jand D _j+1/ D _j+2and D _j+3the first on-off element Qha/Qla and second switch element and Qhb/Qlb, liquid crystal capacitor Clch and Clcl being connected to on-off element and holding capacitor Csth and Cstl.

In the liquid crystal display comprising this liquid crystal panel assembly, signal controller 600 receives received image signal R, G and the B for a pixel PX and received image signal R, G and B is converted to output image signal DAT and is used for two sub-pixel PXh and PXl and is transferred to data driver 500.Alternatively, grayscale voltage for two sub-pixel PXh and PXl is independent in grayscale voltage generator 800 to be produced, and be alternately provided to data driver 500 or in data driver by alternate selection, thus apply different voltage to two sub-pixel PXh and PXl.But now, picture signal can be corrected or can produce grayscale voltage and be arranged so that the synthesis gamma curve of two sub-pixel PXh and PXl is comparatively close to front (at the front) reference gamma curve.Such as, front synthesis gamma curve can meet be confirmed as to Liquid crystal module be most suitable before with reference to gamma curve, side (at the side) synthesizes gamma curve can closest to front with reference to gamma curve.Thus the side can improving liquid crystal display is visual.

In addition, by the data line D being connected to the first sub-pixel PXb/ second sub-pixel PXl _jand D _j+1/ D _j+2and D _j+3apply the data voltage with reciprocal polarity, can driving voltage be increased and improve transmissivity and response speed.

Then, be different from the liquid crystal panel assembly shown in Figure 30, with reference to Figure 31, according in the liquid crystal panel assembly of the present embodiment, each of the first sub-pixel PXh or the second sub-pixel PXl comprises holding capacitor Csth or Cstl.In addition, the present embodiment can be applied to the description of the embodiment shown in Figure 13 or Figure 30.

Then, with reference to Figure 32, (it comprises first grid polar curve G to comprise signal wire according to the liquid crystal panel assembly of the present embodiment _i, second gate line G _i+1, data line D adjacent one another are _jand D _j+1) and be connected to the pixel PX of signal wire.

Pixel PX comprises a pair first sub-pixel PXh and the second sub-pixel PXl.First sub-pixel PXh/ second sub-pixel PXl comprises the first on-off element Qha/Qla and second switch element Qhb/Qlb, is connected to the liquid crystal capacitor Clch/Clcl of on-off element and the first holding capacitor Cstha/Cstla and the second holding capacitor Csthb/Cstlb.

Be different from the liquid crystal panel assembly shown in Figure 31, according in the liquid crystal panel assembly of the present embodiment, the first sub-pixel PXh and the second sub-pixel PXl that form a pixel PX are adjacent one another are at column direction, and are connected to different gate lines G _iand G _i+1.In embodiment shown in Figure 26, the first sub-pixel PXh and the second sub-pixel PXl is applied simultaneously different data voltages, and the first sub-pixel PXh and the second sub-pixel PXl applies different data voltages with the mistiming in the present embodiment.As mentioned above, the pixel voltage by changing two sub-pixel PXh and PXl can improve visuality.In addition, identical with former embodiment, the voltage being applied to the two ends of liquid crystal capacitor Clch and Clcl of the first sub-pixel PXh and the second sub-pixel PXl has different polarity relative to common electric voltage Vcom, thus obtains identical effect.

Meanwhile, be different from the liquid crystal panel assembly shown in Figure 32, in liquid crystal panel assembly shown in Figure 33, each of the first sub-pixel PXh and the second sub-pixel PXl comprises holding capacitor Csth or Cstl.

Then, with reference to Figure 34, be described to another example of the liquid crystal panel assembly shown in Figure 26.

Figure 34 is the equivalent circuit diagram of two sub-pixels of liquid crystal panel assembly according to another example of the present invention.

With reference to Figure 34, (it comprises gate lines G to comprise signal wire according to the liquid crystal panel assembly of the present embodiment _i, first data line D adjacent one another are _jwith the second data line D _j+1) and be connected to the pixel PX of signal wire.Below, will mainly describe and the former embodiment difference shown in Figure 24.

Pixel PX comprises a pair first sub-pixel PXh and the second sub-pixel PXl and is connected to the coupling condenser Ccp of these two sub-pixel PXh and PXl.First sub-pixel PXh comprises the first on-off element Qa and second switch element Qb, is connected to the liquid crystal capacitor Clch of on-off element and the first holding capacitor Csta and the second holding capacitor Cstb.Second sub-pixel PXl comprises the second switch element Qb being connected to capacitor Ccp, the liquid crystal capacitor Clcl being connected to on-off element and the second holding capacitor Cstb.

According to from gate lines G _isignal, the first on-off element Qa will from data line D _jdata voltage be applied to liquid crystal capacitor Clch and coupling condenser Ccp, second switch element Qb is from data line D _j+1receive and data line D _jthe contrary data voltage of data voltage to apply this data voltage to two liquid crystal capacitor Clch and Clcl.Therefore, because by the voltage being applied to coupling condenser Ccp, the voltage being applied to the two ends of the liquid crystal capacitor Clcl of the second sub-pixel PXl is less than the voltage at the two ends of the liquid crystal capacitor Clch being applied to the second sub-pixel PXl, so the charging voltage in liquid crystal capacitor Clcl is always less than the charging voltage in liquid crystal capacitor Clch.

The suitable charging voltage of liquid crystal capacitor Clcl and liquid crystal capacitor Clch is than being obtained by the electric capacity of adjustment coupling condenser Ccp.Therefore, the side can improving liquid crystal display is visual.

Various characteristics in former embodiment also can be applied to the liquid crystal panel assembly according to the present embodiment.

Then, with reference to Figure 35, be described to the example of the liquid crystal panel assembly shown in Figure 34.

Figure 35 is the layout of liquid crystal panel assembly according to an embodiment of the invention.

Basic identical with the liquid crystal panel assembly shown in Figure 21 with Figure 22 according to the hierarchy of the liquid crystal panel assembly of the present embodiment.

First, will be described lower panel (not shown).The multiple connecting electrodes 135 comprising the many gate lines 121 of multipair first grid electrode 124a and second grid electrode 124b, many storage electrode lines 131 and comprise horizontal electrode 137 are formed.Gate insulator (not shown), multipair first semiconductor 154a and the second semiconductor 154b, multipair first island Ohmic contact (not shown) and the second island Ohmic contact (not shown), multipair first data line 171a and the second data line 171b, multipair first drain electrode 175a and the second drain electrode 175b, passivation layer (not shown), and comprise the first pixel electrode 191a of multipair first pixel electrode 191ha and the second pixel electrode 191la and the second pixel electrode 191b and be formed thereon in turn.

First pixel electrode 191ha comprises pixel electrode 191hau and lower pixel electrode 191had, and the second pixel electrode 191la is between upper pixel electrode 191hau and lower pixel electrode 191had.Upper pixel electrode 191hau and lower pixel electrode 191had is connected to connecting electrode 135 below upper pixel electrode 191hau and lower pixel electrode 191had to be applied in identical voltage by contact hole 187d and 187u.

Upper pixel electrode 191hau and the lower pixel electrode 191had of the first pixel electrode 191ha have vertical component and multiple component respectively.Second pixel electrode 191la comprises horizontal component 197la and component.Second pixel electrode 191b is included in vertical component, horizontal component and the multiple component that vertical direction is extended.The component of the first pixel electrode 191a and the component of the second pixel electrode 191b are arranged alternately.First pixel electrode 191a adjacent one another are and the component of the second pixel electrode 191b form liquid crystal capacitor Clch and Clcl with the liquid crystal layer 3 be positioned between the two.The horizontal component 197la of the second pixel electrode 191la is stacked with the transverse electrode 137 of connecting electrode 135 (it is applied in the voltage identical with the first pixel electrode 191ha), thus forms coupling condenser Ccp.Storage electrode line 131, first pixel electrode 191a and the second pixel electrode 191b is stacked on top of each other, thus forms the first holding capacitor Csta and the second holding capacitor Cstb.

In addition, the various characteristics of the liquid crystal panel assembly shown in Figure 34 and former embodiment also can be applied to the present embodiment.

Then, with reference to Figure 36, be described to another example of the liquid crystal panel assembly shown in Figure 26.

Figure 36 is the equivalent circuit diagram of two sub-pixels of liquid crystal panel assembly according to another embodiment of the invention.

With reference to Figure 36, (it comprises two gate lines G adjacent one another are to comprise signal wire according to the liquid crystal panel assembly of the present embodiment _iand G _i+1, the first data line D _jwith the second data line D _j+1and public pressure wire (not shown)) and be connected to multiple pixel PX of signal wire.

Each pixel PX comprises the first sub-pixel PXh and the second sub-pixel PXl and boosting (boost-up) unit B U.First sub-pixel PXh/ second sub-pixel PXl comprises the first on-off element Qha/Qla, second switch element Qb, liquid crystal capacitor Clch/Clcl, the first holding capacitor Cstha/Cstla and the second holding capacitor Cstb.Boosting unit BU comprises the 3rd on-off element Qc, the 4th on-off element Qd and boost capacitor Cb.

The control end of the first on-off element Qha/Qla of the first sub-pixel PXh/ second sub-pixel PXl is connected to gate lines G _i, its input end is connected to the first data line D _j, its output terminal is connected to liquid crystal capacitor Clch/Clcl and the first holding capacitor Cstha/Cstla.The control end of second switch element Qb is connected to gate lines G _i, the input end of second switch element Qb is connected to the second data line D _j+1, the output terminal of second switch element Qb is connected to liquid crystal capacitor Clch and Clcl and the second holding capacitor Cstb.

The control end of the 3rd on-off element Qc is connected to gate lines G _i, the input end of the 3rd on-off element Qc is connected to public pressure wire (not shown), and the output terminal of the 3rd on-off element Qc is connected to the 4th on-off element Qd and boost capacitor Cb.

The control end of the 4th on-off element Qd is connected to next root gate lines G _i+1, the input end of the 4th on-off element Qd is connected to the output terminal of the first on-off element Ql, liquid crystal capacitor Clcl and the first holding capacitor Cstla, and the output terminal of the 4th on-off element Qd is connected to output terminal and the boost capacitor Cb of the 3rd on-off element Qc.

Below, the operation of the liquid crystal display to the liquid crystal panel assembly comprised according to the present embodiment is described.

First, the data voltage relative to common electric voltage Vcom with positive polarity is applied to data line D _jdata line D is applied to the data voltage relative to common electric voltage Vcom with negative polarity _j+1situation as an example.

When gate-on voltage Von is applied to gate lines G _itime, be connected to gate lines G _ithe first to the three on-off element Qha, Qla, Qb and Qc conducting.

Therefore, data line D _jpositive data voltage be applied to each one end of liquid crystal capacitor Clch and Clcl, data line D by the first on-off element Qha and Qla of conducting _j+1negative data voltage be applied to each other end of liquid crystal capacitor Clch and Clcl by second switch element Qb.

Meanwhile, common electric voltage Vcom is applied to one end of boost capacitor Cb by the 3rd on-off element Qc, and boost capacitor Cb passes through the voltage difference charging between the output terminal of the first on-off element Qha and common electric voltage Vcom.

Then, when grid cut-off voltage Voff is applied to gate lines G _iand gate-on voltage Von is applied to next root gate lines G _i+1time, the first to the three on-off element Qha, Qla, Qb and Qc turns off, the 4th on-off element Qd conducting.

Then, the positive charge being gathered in the output terminal of the first on-off element Qla mixes with the negative charge of the output terminal being gathered in the 3rd on-off element Qc, thus the voltage of the output terminal of the first on-off element Qla reduces, and the voltage of the output terminal of the 3rd on-off element Qc increases.When the voltage of the output terminal of the 3rd on-off element Qc of the one end as boost capacitor Cb increases, the voltage of the output terminal of the first on-off element Qha of isolation also increases thereupon, thus increases the voltage difference at the two ends of liquid crystal capacitor Clch.On the contrary, the voltage of the output terminal of the first on-off element Qla reduces, thus reduces the voltage at the two ends of liquid crystal capacitor Clcl.

Alternatively, the data voltage relative to common electric voltage Vcom with negative polarity is being applied to the first data line D _jtime, the electric charge being gathered in each two ends of capacitor Clch, Clcl, Cstha, Cstla, Cb and Cstb can contrary with former description.

In the present embodiment, always the charging voltage of the liquid crystal capacitor Clch of the first sub-pixel PXh polarity of data voltage that no matter can apply higher than the charging voltage of the liquid crystal capacitor Clcl of the second sub-pixel PXl.Thus, the brightness of two sub-pixel PXh and PXl can be changed by the charging voltage changing liquid crystal capacitor Clch and Clcl and not reduce brightness and transmissivity substantially.

No matter when gate-on voltage is applied to gate lines G _i, the voltage of boost capacitor Cb returns to common electric voltage Vcom by the 3rd on-off element Qc, thus removes the image retention caused by frame before.

Meanwhile, the data voltage with different polarity is applied to the first data line D _jwith the second data line D _j+1, thus transmissivity and the response speed of liquid crystal display can be improved, and the various effects in former embodiment can be applied to the present embodiment.

In an alternate embodiment of the invention, replace the first holding capacitor Cstha/Cstla and the second holding capacitor Cstb, the first each of sub-pixel PXh/ second sub-pixel PXl can comprise a holding capacitor (not shown).

Then, with reference to Figure 37, be described to another example of the liquid crystal panel assembly shown in Fig. 2.

Figure 37 is the equivalent circuit diagram of two pixels of liquid crystal panel assembly according to an embodiment of the invention.

First, referring to figs. 2 and 37, according to the liquid crystal layer 3 that the liquid crystal panel assembly of the present embodiment also comprises top panel 100 respect to one another and lower panel 200 and is plugged in therebetween.

(it comprises gate lines G to comprise signal wire according to the liquid crystal panel assembly of the present embodiment _i, the first data line D _j, the second data line D _j+1with the 3rd data line D _j+2) and the first pixel PX _nwith the second pixel PX _n+1.

Gate lines G _i, data line D _j, D _j+1and D _j+2and first pixel electrode PEa and the second pixel electrode PEb formed by patterned metal layer.

Gate lines G _iwith data line D _j, D _j+1and D _j+2formed in the different layers, and insulation course can be plugged between the two.First pixel electrode PEa can be formed in the different layers with the second pixel electrode PEb or in identical layer.

The first to the three data line D of the liquid crystal panel assembly shown in Figure 37 _j, D _j+1and D _j+2be formed in identical layer.

Pixel PX _nand PX _n+1eachly comprise the first on-off element Qa, second switch element Qb, liquid crystal capacitor Clc and the first holding capacitor Csta and the second holding capacitor Cstb.

First pixel PX _nthe first on-off element Qa be connected to gate lines G _iwith the first data line D _j.First pixel PX _nsecond switch element Qb be connected to gate lines G _iwith the second data line D _j+1.Second pixel PX _n+1the first on-off element Qa be connected to gate lines G _iwith the 3rd data line D _j+2.Second pixel PX _n+1second switch element Qb be connected to gate lines G _iwith the second data line D _j+1.Namely, the first pixel PX adjacent one another are _nsecond switch element and the second pixel PX _n+1second switch element Qb be connected to identical data line D _j+1(below, being called as " sharing data line ").

Each thin film transistor (TFT) being three-terminal element and being such as arranged in lower panel 100 of the first on-off element Qa and second switch element Qb.The control end of the first on-off element Qa and second switch element Qb is connected to gate lines G _i, its input end is connected to data line D _j, D _j+1and D _j+2, its output terminal is connected respectively to liquid crystal capacitor Clc, the first holding capacitor Csta and the second holding capacitor Cstb.

Referring again to Fig. 2, liquid crystal layer 3 has dielectric anisotropy, and in the absence of an electric field, it is the major axis of the horizontal surface perpendicular to panel 100 and 200 that the liquid crystal molecule of liquid crystal layer 3 can have by orientation.In contrast, in the absence of an electric field, liquid crystal molecule can have by orientation is that level (or parallel) is in the major axis of the horizontal surface of panel 100 and 200.

In addition, liquid crystal capacitor Clc and holding capacitor Csta and Cstb has been described in former embodiment, so eliminate detailed description.

Below, with reference to Figure 38 and Figure 39, be described to the operation of liquid crystal display according to an embodiment of the invention.

Figure 38 and Figure 39 be illustrate when the minimum voltage that liquid crystal capacitor adopts according to an embodiment of the invention be 0V, ceiling voltage is 14V, common electric voltage Vcom is 7V time, in two consecutive frames the liquid crystal capacitor of four neighbors charging voltage and be applied to the curve map of voltage of data line.

With reference to Figure 38 and Figure 39, a data lines is present between two pixel PX, and two pixel PX are jointly connected to shared data line D _j+1and D _j+4.For every frame, most high driving voltage (such as, 14V) and minimum drive voltage (such as, 0V) are alternately applied to shared data line D _j+1and D _j+4.Namely, when 0V is as shown in Figure 38 applied to shared data line D in a frame _j+1and D _j+4time, 14V is applied to shared data line D in the next frame as shown in figure 39 _j+1and D _j+4.

First, shared data line D is applied to reference to Figure 38,0V _j+1and D _j+4, the data voltage of 14V is applied to the first data line D _j(there is the target charging voltage of first pixel of 14V).10V is applied to the second data line D _j+2(there is the target charging voltage of second pixel of 10V).5V is applied to the 3rd data line D _j+3(there is the target charging voltage of the 3rd pixel of 5V).1V is applied to the 4th data line D _j+5(there is the target charging voltage of the 4th pixel of 1V).Now, the voltage having an opposite polarity relative to the voltage being applied to left pixel is applied to the adjacent pixel on right side, causes carrying out reverse drive operation.In addition, display characteristic can be improved.

As shown in figure 39, the most high driving voltage of 14V is applied to shared data line D in the next frame _j+1and D _j+4.Because the target charging voltage of the first pixel is 13V, so the data of 1V are applied to the first data line D _j.Because the target charging voltage of the second pixel is 8V, so 6V is applied to the second data line D _j+2.Because the target charging voltage of the 3rd pixel is 6V, so 8V is applied to the 3rd data line D _j+3.Because the target charging voltage of the 4th pixel is 3V, so 11V is applied to the 4th data line D _j+5.Thus the voltage with the polarity contrary with the polarity of voltage in former frame is applied to each pixel, and adjacent pixel also can be applied in the voltage of polarity opposite each other.

In the present embodiment, be arranged between adjacent pixel because share data line, so can the aperture ratio of liquid crystal panel assembly be increased by reducing the quantity of data line and can be reduced the manufacturing cost of liquid crystal display by the number reducing data driver.

Below, with reference to Figure 40, be described in detail to liquid crystal panel assembly according to another embodiment of the invention.

Figure 40 is the equivalent circuit diagram of two pixels of liquid crystal panel assembly according to another embodiment of the invention.

With reference to Figure 40, (it comprises gate lines G also to comprise signal wire according to the liquid crystal panel assembly of the present embodiment _i, first data line D adjacent one another are _j, the second data line D _j+1with the 3rd data line D _j+2) and be connected to the first pixel PX of signal wire _nwith the second pixel PX _n+1, pixel PX _nand PX _n+1eachly comprise the first on-off element Qa and second switch element Qb and liquid crystal capacitor Clc.

But, be different from the liquid crystal panel assembly shown in Figure 37, in liquid crystal panel assembly shown in Figure 40, pixel PX _nand PX _n+1eachly comprise a holding capacitor Cst, do not need thus to form the additional independent wiring for common electric voltage Vcom, thus improve aperture ratio.Holding capacitor Cst can by being plugged in stacked on top of each other for the output terminal of the first on-off element Qa and second switch element Qb and insulator therebetween and being formed.

Below, with reference to Figure 41 and Figure 42 and Fig. 1 described above, liquid crystal panel assembly is according to another embodiment of the invention described.

Figure 41 and Figure 42 is according to other the equivalent circuit diagram of two pixels of liquid crystal panel assembly of embodiment various of the present invention.

With reference to Figure 41 and Figure 42, (it comprises gate lines G to comprise signal wire according to the liquid crystal panel assembly of the present embodiment _i, the first data line D _jwith the second data line D _j+1) and be connected to the first pixel PX of signal wire _nwith the second pixel PX _n+1, pixel PX _nand PX _n+1eachly comprise the first on-off element Qa and second switch element Qb and liquid crystal capacitor Clc.

In the liquid crystal panel assembly shown in Figure 41 and Figure 42, pixel PX _nand PX _n+1eachly comprise holding capacitor Cst.But, pixel PX _nand PX _n+1the first on-off element Qa and second switch element Qb can be comprised and be connected respectively to the first and second holding capacitor (not shown) of the first on-off element Qa and second switch element Qb.

But be different from the liquid crystal panel assembly shown in Figure 37 or Figure 40, in the liquid crystal panel assembly shown in Figure 41 and Figure 42, data line is not formed between the pixels.Liquid crystal panel assembly comprises and being formed as and gate lines G _ithe shared data line D of level _k.Share data line D _knot with other data lines D _jand D _j+1be formed in identical layer, and and gate lines G _ibe formed in identical layer.Share data line D _kbe not connected to data driver 500, unlike other data line D _jand D _j+1.Thus voltage does not apply from data driver 500, but can apply from outside separately with the ceiling voltage of every frame Unit alteration and minimum voltage.

But, in liquid crystal panel assembly shown in Figure 41, relative to corresponding pixel PX _n, share data line D _kbe arranged on and gate lines G _ihomonymy, in liquid crystal panel assembly shown in Figure 42, relative to corresponding pixel PX _n, share data line D _kbe arranged on and gate lines G _iopposite side.

Compared with the liquid crystal panel assembly shown in Figure 37 or Figure 40, the liquid crystal panel assembly shown in Figure 41 and Figure 42 can reduce the quantity of data line and the quantity of data driver 500, thus improves the aperture ratio of liquid crystal panel assembly and reduce manufacturing cost.

Below, with reference to figure 2 and Figure 42, be described in detail to liquid crystal panel assembly according to another embodiment of the invention.

Figure 43 is the equivalent circuit diagram of two pixels of liquid crystal panel assembly according to an embodiment of the invention.

With reference to figure 2 and Figure 43, substantially identical with the liquid crystal panel assembly shown in Figure 37 according to the liquid crystal panel assembly of the present embodiment.

But, pixel PX _nand PX _n+1eachly comprise the first liquid crystal capacitor Clch and the second liquid crystal capacitor Clcl with different electric capacity.As shown in figure 43, the distance between the first liquid crystal capacitor Clch two ends is greater than the distance between the second liquid crystal capacitor Clcl two ends.Thus, even if identical voltage is applied to each two ends of the first liquid crystal capacitor Clch and the second liquid crystal capacitor Clcl, electric field intensity as generation in the liquid crystal layer 3 of dielectric substance is different, and the molecule of two liquid crystal capacitor Clch and Clcl has different degree of tilt.Thus, by the distance between the end of adjustment liquid crystal capacitor Clch and Clcl, the image viewability watch from the side of liquid crystal display can be made above maximum so that close from the image watched, thus improve side visuality.

In addition, to gate lines G _i, data line D _j, D _j+1and D _j+2, the first on-off element Qa, second switch element Qb and the description of holding capacitor Csta with Cstb and identical in the embodiment shown in Figure 37, thus eliminate description of them.

Below, with reference to Figure 44 to Figure 47, be described in detail to the example of the liquid crystal panel assembly shown in Figure 43.

Figure 44 to Figure 47 is two pixel PX and PX of liquid crystal panel assembly according to an embodiment of the invention _n+1layout.

With reference to Figure 44, substantially identical with hierarchy with the planar structure of the liquid crystal panel assembly shown in Figure 21 with Figure 22 with hierarchy according to the planar structure of the liquid crystal panel assembly of the present embodiment.Below, mainly the place different from the embodiment shown in Figure 21 and Figure 22 will be described.

Be different from the liquid crystal panel assembly shown in Figure 21 and Figure 22, comprise many data lines 171 according to the liquid crystal panel assembly of the present embodiment and be positioned at adjacent pixel PX _nand PX _n+1between many shared data lines 172.

Then, will to being included in pixel PX _nand PX _n+1each in the first pixel electrode 191a and the second pixel electrode 191b be described in detail.

First pixel electrode 191a is included in left vertical component 192a, the central horizontal part 193a extending to right side from the center of left vertical component 192a and multiple top set part 194a and lower branch portion 195a that vertical direction extends longly.Top set part 194a is positioned at above central horizontal part 193a, and extends to upper right obliquely from left vertical component 192a and central horizontal part 193a.Lower branch portion 195a is positioned at below central horizontal part 193a, and from left vertical component 192a and central horizontal part 193a downward-extension to the right.At each pixel PX _nor PX _n+1core and upper part and lower part, the gap between top set part 194a and the gap between lower branch portion 195a relatively narrow, except each pixel PX _nor PX _n+1core and upper part and lower part region outside low gray areas LA in these gaps relatively large.

Second pixel electrode 191b is included in right vertical component 192b, the upper horizontal component 193b1 extending to left side from the top and bottom of right vertical component 192b and lower horizontal component 193b2 and multiple top set part 194b and lower branch portion 195b that vertical direction extends longly.Top set part 194b is positioned at above central horizontal part 193a, and from right vertical component 192b and upper horizontal component 193b1 below extension left obliquely.Lower branch portion 195b is positioned at below central horizontal part 193a, and extends to upper left side obliquely from right vertical component 192b and lower horizontal component 193b2.At each pixel PX _nor PX _n+1core and upper part and lower part, the gap between top set part 194b and the gap between lower branch portion 195b are also relatively narrow, except each pixel PX _nor PX _n+1core and upper part and lower part region outside low gray areas LA in these gaps relatively large.

Component 194a, 194b, 195a and 195b of first pixel electrode 191a and the second pixel electrode 191b are arranged alternately.Compared with in other parts, the gap between component 194a, 194b, 195a and 195b is larger in low gray scale.Final effect is identical with the effect in other embodiments comprising the embodiment shown in Figure 21 with Figure 22, thus will omit description of them.

In addition, at each pixel PX _nor PX _n+1in, first grid electrode 124a/ second grid electrode 124b, the first source electrode 173a/ second source electrode 173b form the first film transistor Qa/ second thin film transistor (TFT) Qb with the first drain electrode 175a/ second drain electrode 175b together with the first semiconductor 154a/ second semiconductor 154b.The raceway groove of the first film transistor Qa and the second thin film transistor (TFT) Qb is formed in the first source electrode 173a and the second source electrode 173b and the first semiconductor 154a between the first drain electrode 175a and the second drain electrode 175b and the second semiconductor 154b.

Two adjacent pixel PX _nand PX _n+1shared data line 172 is connected to respectively on right side and left side.Left pixel PX _nthe first pixel electrode 191a be applied with data voltage from data line 171 by the first film transistor Qa, the second pixel electrode 191b is applied with maximum driving voltage from shared data line 172 or minimum driving voltage by the second thin film transistor (TFT) Qb.In addition, right pixel PX _n+1the first pixel electrode 191a be applied with maximum driving voltage from shared data line 172 or minimum driving voltage by the second thin film transistor (TFT) Qb, the second pixel electrode 191b is applied with the voltage from data line 171 by the first film transistor Qa.

Then, with reference to Figure 45, substantially identical with the above-mentioned liquid crystal panel assembly shown in Figure 44 according to the liquid crystal panel assembly of the present embodiment, but the gap between the component of the first pixel electrode 191a and the second pixel electrode 191b is comparatively large, in low gray areas LA the first pixel electrode 191a and the second pixel electrode 191b component between gap be little.

Then, with reference to Figure 46, also substantially identical with the hierarchy of the liquid crystal panel assembly shown in Figure 24 according to the hierarchy of the liquid crystal panel assembly of the present embodiment.Below, mainly the place different from the embodiment shown in Figure 24 will be described.

Comprise many data lines 171 according to the liquid crystal panel assembly of the present embodiment and be positioned at adjacent pixel PX _nand PX _n+1between shared data line 172.

Will to being included in pixel PX _nand PX _n+1each in the first pixel electrode 191a and the second pixel electrode 191b be described in detail.

First pixel electrode 191a comprises and is positioned at pixel PX _nand PX _n+1the horizontal component 193a of each bottom and multiple tilting upward from horizontal component 193a extend and bending divide 196a with the curved branches forming two " > " number shapes connected vertically three times.Second pixel electrode 191b also comprises and is arranged on pixel PX _nand PX _n+1top horizontal component 193b and be multiplely tilted to downward-extension from horizontal component 193b and bending divide 196b with the curved branches forming two " > " number shapes connected vertically three times.The curved branches of the first pixel electrode 191a and the second pixel electrode 191b divides 196a and curved branches to divide 196b to be arranged alternately.At pixel PX _nand PX _n+1each left region in, curved branches divides 196a and curved branches to divide the gap between 196b to be little; In right region, curved branches divides 196a and curved branches to divide the gap between 196b to be large.The description of final effect is identical with the effect in other embodiments comprising the embodiment shown in Figure 21 with Figure 22, thus the description of will omit it.

In addition, identical with former embodiment to the description of data line 171, shared data line 172, first pixel electrode 191a, the second pixel electrode 191b, thus the description to it will be omitted.

Then, with reference to Figure 47, also identical with the hierarchy of the liquid crystal panel assembly shown in Figure 25 according to the hierarchy of the liquid crystal panel assembly of the present embodiment.Below, mainly the place different from the embodiment shown in Figure 25 will be described.

Also comprise many data lines 171 according to the liquid crystal panel assembly of the present embodiment and be positioned at pixel PX _nand PX _n+1between many shared data lines 172.

First pixel electrode 191a be included in left vertical component 192a, upper horizontal component 193a that vertical direction extends longly, transverse curvature three times and a pair vertical curve part 196a from upper horizontal component 193a to downward-extension, the horizontal component 197a extended to the right from the center of vertical curve part 196a, from the lower bending point of vertical curve part 196a to the vertical component 198a of downward-extension and multiple inclination component.Second pixel electrode 191b comprises right vertical component 192b, lower horizontal component 193b, transverse curvature three times and a pair vertical curve part 196b upwards extended from lower lateral part 193b, the upper horizontal component 197b extended to the left from the upper bending point of vertical curve part 196b, the lower horizontal component 198b extended to the left from the lower bending point of vertical curve part 196b and multiple inclination component.The inclination component of the first pixel electrode 191a and the second pixel electrode 191b can tilt about 45 degree relative to gate line 121.

The inclination component of the first pixel electrode 191a and the second pixel electrode 191b is arranged alternately, and can the well-regulated interval of tool.Gap between the vertical curve part 196a of the first pixel electrode 191a and the second pixel electrode 191b and 196b is less than the gap between the first adjacent pixel electrode 191a and the inclination component of the second pixel electrode 191b, thus the pitch angle of the liquid crystal molecule of liquid crystal layer 3 is comparatively large, therefore transmissivity is higher.In addition, the description comprised in other embodiments of the embodiment shown in Figure 21 and Figure 22 can be applied.

In addition, identical with former embodiment with the description of the second pixel electrode 191b to data line 171, shared data line 172 and the first pixel electrode 191a, because omitted herein description of them.

In embodiment shown in Figure 44 to Figure 47, at a pixel PX _nor PX _n+1in, the region that the first pixel electrode 191a and the second pixel electrode 191b is far away each other and at a pixel PX _nor PX _n+1in the nearer each other region of the first pixel electrode 191a and the second pixel electrode 191b be arranged alternately, thus the electric field intensity produced in liquid crystal layer 3 can be changed, and the pitch angle of liquid crystal molecule 31 can being changed, the visual transmissivity with improving liquid crystal display in side of liquid crystal display can being improved.

Alternatively, the region that several regions that the first pixel electrode 191a and the second pixel electrode 191b is far away each other can follow the first pixel electrode 191a and the second pixel electrode 191b nearer each other.In addition, the region that several regions that the first pixel electrode 191a and the second pixel electrode 191b is nearer each other can follow the first pixel electrode 191a and the second pixel electrode 191b far away each other.In addition, by adjusting the layout in distance between the first pixel electrode 191a and the second pixel electrode 191b or adjustment the first pixel electrode 191a and the second pixel electrode 191b region far away each other and the first pixel electrode 191a and the second pixel electrode 191b region nearer each other, transmissivity can be made maximum and improve side visuality.

Below, with reference to Figure 48, be described in detail to the liquid crystal panel assembly of an alternative embodiment of the invention.

Figure 48 is the structure of the liquid crystal panel assembly illustrated according to another embodiment of the invention and the equivalent circuit diagram of a pixel.

With reference to Figure 48, each pixel PX comprises a pair sub-pixel, and each sub-pixel comprises liquid crystal capacitor Clch and Clcl and holding capacitor Csth and Cstl.At least one of two sub-pixels comprises two the on-off element (not shown) being connected to gate line, data line and liquid crystal capacitor Clch and Clcl.

First pixel electrode PEha and PEla of liquid crystal capacitor Clch and Clcl employing lower panel 100 and the second pixel electrode PEhb and PElb is as two ends.Liquid crystal layer 3 between first pixel electrode PEha and PEla and the second pixel electrode PEhb and PElb is used as dielectric substance.The each of second pixel electrode PEhb and PElb can be connected to on-off element (not shown) separately, and at least one of the first pixel electrode PEha and PEla is also connected to on-off element (not shown) separately.Alternatively, the second pixel electrode PEhb with PElb can not be separated each other, and can form the electrode being connected to an on-off element (not shown).But in contrast, the second pixel electrode PEhb and PElb can be arranged in top panel 200.Now, the second pixel electrode PEhb and PElb be free of attachment to this on-off element and independently common electric voltage Vcom can be applied in.Meanwhile, the liquid crystal molecule of liquid crystal layer 3 has dielectric anisotropy and can orientation be perpendicular to panel 100 and panel 200.In contrast, liquid crystal molecule can orientation be and panel 100 and panel 200 level.

Holding capacitor Csth and Cstl performed for the booster action of liquid crystal capacitor Clch and Clcl is formed by the first pixel electrode PEha and PEla and the second pixel electrode PEhb and PElb being inserted with insulator between lower panel 100.

In addition, to color filter CF and the description of polarizer (not shown) and identical in former embodiment, because omitted herein description of them.

Below, with reference to Figure 49 to Figure 51, be described in detail to the example of the liquid crystal panel assembly shown in Figure 48.

Figure 49 to Figure 51 is the equivalent circuit diagram of two sub-pixels of the liquid crystal panel assembly illustrated according to another embodiment of the invention.

First, with reference to Figure 49, comprise signal wire according to the liquid crystal panel assembly of the present embodiment and (comprise gate lines G _i, first data line D adjacent one another are _jwith the second data line D _j+1and adjacent gate line G _ishared data line D _k) and be connected to the pixel PX of signal wire.

A pair sub-pixel PXh and PXl that pixel PX comprises.Each sub-pixel PXh/PXl comprises and is connected to corresponding gate lines G _iwith corresponding data line D _j/ D _j+1the first on-off element Qha/Qla and second switch element Qhb/Qlb, the liquid crystal capacitor Clch/Clcl being connected to on-off element and the first holding capacitor Cstha/Cstla and the second holding capacitor Csthb/Cstlb.

Electrode separately can by the first pixel electrode PEha/PEla and the second pixel electrode PEhb/PElb stacked and between be inserted with insulator thus form the first holding capacitor Cstha/Cstla and the second holding capacitor Csthb/Cstlb.

In contrast, each of sub-pixel PXh and PXl can comprise holding capacitor Csth or Cstl.

The first on-off element Qha of the first sub-pixel PXh is connected to gate lines G _iwith the first data line D _j.The second switch element Qhb of the first sub-pixel PXh is connected to gate lines G _iwith shared data line D _k.The first on-off element Qla of the second sub-pixel PXl is connected to gate lines G _iwith the second data line D _j+1.The second switch element Qlb of the second sub-pixel PXl is connected to gate lines G _iwith shared data line D _k.Namely, adjacent switch element Qhb and Qlb is connected to identical data line D _k.Share data line D _kbe described above, thus the description of will omit it.

First on-off element Qha and second switch element Qlb is also in above description, thus the description of will omit it.

In the liquid crystal display comprising liquid crystal panel assembly, signal controller 600 accepts input and is used for picture signal R, G and B of a pixel PX, and output image signal DAT received image signal R, G and B converted to for two sub-pixel PXh and PXl is to be transferred to data driver 500.In contrast, grayscale voltage for two sub-pixel PXh and PXl can produce independently and alternately be provided to data driver 500 or alternate selection in data driver 500 in grayscale voltage generator 800, thus applies different voltage to two sub-pixel PXh and PXl.But, now, preferably picture signal be corrected or produce grayscale voltage thus the synthesis gamma curve of two sub-pixel PXh and PXl comparatively close to front with reference to gamma curve.Such as, front synthesis gamma curve is most suitable front consistent with reference to gamma curve with being confirmed as liquid crystal panel assembly, and synthesis gamma curve in side is closest to front reference gamma curve.

Then, with reference to Figure 50, according to the liquid crystal panel assembly signal wire of the present embodiment, (it comprises containing first grid polar curve G adjacent one another are _iwith second gate line G _i+1, data line D _j, adjacent gate line G _ishared data line D _k) and be connected to the pixel PX of signal wire.Pixel PX comprises a pair sub-pixel PXh and PXl.Sub-pixel PXh/PXl each comprises on-off element Qha and Qhb/Qla and Qlb, liquid crystal capacitor Clch/Clcl and the first holding capacitor Cstha/Cstla and the second holding capacitor and Csthb/Cstlb.

Be different from the liquid crystal panel assembly shown in Figure 49, in liquid crystal panel assembly shown in Figure 50, two sub-pixels are adjacent one another are and be connected to different gate lines G at column direction _iand G _i+1.

Namely, the first on-off element Qha of the first sub-pixel PXh is connected to first grid polar curve G _iwith data line D _j.The second switch element Qhb of the first sub-pixel PXh is connected to first grid polar curve G _iwith shared data line D _k.The first on-off element Qla of the second sub-pixel PXl is connected to second gate line G _i+1with data line D _j.The second switch element Qlb of the second sub-pixel PXl is connected to second gate line G _i+1with shared data line D _k.Namely, the first on-off element Qha of each sub-pixel PXh or sub-pixel PXl and Qla/ second switch element Qhb and Qlb is connected to identical data line D _j/ D _k.

The operation of liquid crystal display (it comprises liquid crystal capacitor Clch with Clcl, the first holding capacitor Cstha with Cstla and the second holding capacitor Csthb with Cstlb and liquid crystal panel assembly) is substantially identical with former embodiment, thus omits detailed description.But in liquid crystal display shown in Figure 49, two sub-pixel PXh and PXl forming a pixel PX are applied simultaneously data voltage, and in the present embodiment, apply data voltage with the mistiming to two sub-pixel PXh and PXl.

Then, with reference to Figure 51, (it comprises gate lines G to comprise signal wire according to the liquid crystal panel assembly of the present embodiment _i, data line D adjacent one another are _j, D _j+1and D _j+2) and be connected to the pixel PX of signal wire.

Pixel PX comprises a pair sub-pixel PXh and PXl.Each the comprising of sub-pixel PXh/PXl is connected to corresponding gate lines G _iwith corresponding data line D _j/ D _j+2the first on-off element Qha/Qla, be connected to gate lines G _iwith shared data line D _j+1second switch element Qhb/Qlb, the liquid crystal capacitor Clch/Clcl being connected to on-off element and the first holding capacitor Cstha/Cstla and the second holding capacitor and Csthb/Cstlb.

Basic substantially identical with the liquid crystal panel assembly shown in Figure 49 according to the liquid crystal panel assembly of the present embodiment, but share data line D _j+1out-of-level in gate lines G _iformed, and be formed between sub-pixel PXh and PXl.Share data line D _j+1be formed in the data line D with other _jand D _j+2in identical layer, and be connected to data driver 500 to be applied in voltage.

Below, with reference to Figure 52 to Figure 58, be described in detail to another example of the liquid crystal panel assembly shown in Figure 48.

Figure 52 to Figure 58 is the equivalent circuit diagram of two pixels of liquid crystal panel assembly according to another embodiment of the invention.

With reference to Figure 52, (it comprises first grid polar curve G to comprise signal wire according to the liquid crystal panel assembly of the present embodiment _iwith second gate line G _i+1, the first to the three data line D _j, D _j+1and D _j+2) and be connected to two pixel PX of signal wire _nand PX _n+1.Pixel PX _nand PX _n+1eachly comprise a pair sub-pixel PXh and PXl.Each sub-pixel PXh/PXl comprises on-off element Qha and Qhb/Qla and Qlb, be connected to the liquid crystal capacitor Clch/Clcl of on-off element and the first holding capacitor Cstha/Cstla and the second holding capacitor and Csthb/Cstlb.

Be different from the liquid crystal panel assembly shown in Figure 49, in liquid crystal panel assembly shown in Figure 52, on-off element Qhb and Qlb adjacent one another are in the row direction is jointly connected to the second data line D _j+1, namely, share data line D _j+1.Namely, the first pixel PX _nsecond switch element Qhb, the second pixel PX of the first sub-pixel PXh _n+1second switch element Qhb, the first pixel PX of the first sub-pixel PXh _nthe second switch element Qlb of the second sub-pixel PXl and the second pixel PX _n+1the second switch element Qlb of the second sub-pixel PXl be connected to shared data line D _j+1.

In addition, be different from the liquid crystal panel assembly shown in Figure 51, in liquid crystal panel assembly shown in Figure 52, form a pixel PX _nor PX _n+1two sub-pixel PXh and PXl adjacent one another are and be connected to different gate lines G at column direction _iand G _i+1.Detailed description is substantially identical with the embodiment shown in Figure 50, thus will omit detailed description.

Then, with reference to Figure 53, comprise signal wire according to the liquid crystal panel assembly of the present embodiment and (comprise gate lines G _i, the first to the three data line D _j, D _j+1and D _j+2) and be connected to two pixel PX of signal wire _nand PX _n+1.

To each pixel PX _nand PX _n+1description identical with the description of the liquid crystal panel assembly shown in Figure 34, thus omit description to it.

But, in the present embodiment, neighbor PX _nand PX _n+1each second switch element Qb be connected to gate lines G _iwith shared data line D _j+1.

According in the liquid crystal panel assembly of the present embodiment, share data line D _j+1out-of-level in gate lines G _iformed, and be formed in two pixel PX _nand PX _n+1between.Share data line D _j+1in above description, thus detailed description will be omitted.

Then, identical with the liquid crystal panel assembly shown in Figure 53 with reference to the liquid crystal panel assembly shown in Figure 54, Figure 54, but in the present embodiment, share data line D _kbe not formed in pixel PX _nand PX _n+1between, but the level that is formed as is in gate lines G _i.Share data line D _knot with other data line D _jand D _j+1be formed in identical layer, and and gate lines G _ibe formed in identical layer.Share data line D _kbe free of attachment to data driver 500, unlike other data line D _jand D _j+1.Thus voltage does not apply from data driver 500, but the voltage changed between the ceiling voltage and minimum voltage of every frame can apply respectively from outside.

Then, with reference to Figure 55, comprise signal wire according to the liquid crystal panel assembly of the present embodiment and (comprise gate lines G _i, the first to the three data line D adjacent one another are _j, D _j+1and D _j+2) and be connected to two pixel PX of signal wire _nand PX _n+1.

To each pixel PX _nor PX _n+1description identical with the description of the liquid crystal panel assembly shown in Figure 29, thus will description to it be omitted.

But, in the present embodiment, neighbor PX _nand PX _n+1each second switch element Qhb and Qlb be connected to gate lines G _iwith shared data line D _j+1.

Above to being formed in two pixel PX _nand PX _n+1between shared data line D _j+1be described, thus will detailed description be omitted.

Then, with reference to Figure 56, the liquid crystal panel assembly according to the present embodiment is substantially identical with the liquid crystal panel assembly shown in Figure 55, but shares data line D _kbe not formed in pixel PX _nand PX _n+1between, but the level that is formed as is in gate lines G _i.Then, with reference to Figure 57, the liquid crystal panel assembly according to the present embodiment comprises signal wire and (comprises gate lines G _i, the first to the three data line D adjacent one another are _j, D _j+1and D _j+2, public pressure wire (not shown)) and be connected to two pixel PX of signal wire _nand PX _n+1.

To each pixel PX _nor PX _n+1description identical with the description of the liquid crystal panel assembly shown in Figure 36, thus will description to it be omitted.

Then, with reference to Figure 58, the liquid crystal panel assembly according to the present embodiment is substantially identical with the liquid crystal panel assembly shown in Figure 57, but shares data line D _kbe not formed in pixel PX _nand PX _n+1between, but be formed as and gate lines G _ilevel.

Driving method shown in Figure 38 and Figure 39 also can be applied to the liquid crystal display comprising the liquid crystal panel assembly shown in Figure 37 to Figure 57.In addition, the liquid crystal molecule of liquid crystal layer has positive dielectric anisotropy, and can is perpendicular to panel 100 and 200 by orientation in the absence of an electric field.In this case, when electric field produces in liquid crystal layer, liquid crystal molecule by the direction tilted for being parallel to electric field, thus changes polarisation of light state.When utilization has the liquid crystal molecule of positive dielectric anisotropy, because liquid crystal molecule has the stagnant degree of rotation (rotation viscosity) lower than the liquid crystal molecule with negative dielectric anisotropy, so response speed faster can be obtained, and because the vergence direction of liquid crystal molecule 31 is restricted to the direction of electric field, even if so liquid crystal molecule 31 also can rearrange due to the dispersed liquid crystal molecule 31 of external action.Therefore, excellent display characteristic can be obtained.

According to the present invention, by increase liquid crystal display can pixel voltage scope and non-replacement data drivers etc. can improve transmissivity.In addition, the manufacturing cost of driver can be reduced and improve the aperture ratio of panel.

According to embodiments of the invention, the high contrast of liquid crystal display and wide light visual angle can be guaranteed, and increase the response speed of liquid crystal molecule.

In addition, can not have to obtain excellent display characteristic under the prerequisite such as from the impact of the pressure etc. of the outside of liquid crystal display.

Although describe the preferred embodiments of the present invention in detail, but obviously those skilled in the art can carry out various amendment and change to it under the prerequisite of the principle and spirit that do not depart from inventive concept of the present invention, scope of the present invention limits in appended claims and its equivalent.

Although invention has been described to have combined the embodiment being considered to reality at present, but it should be understood that and the invention is not restricted to the disclosed embodiments, on the contrary, the present invention is intended to cover and is included in various amendment in the spirit and scope of appended claims and equivalent arrangement.

This application claims on June 17th, 2008 and right of priority and the rights and interests of submitting korean patent application Nos.10-2008-0057043 and 10-2008-0056321 of Korean Intellectual Property Office on June 16th, 2008, and the two full content is incorporated in this with way of reference.

Claims

1. a liquid crystal display, comprising:

First substrate and second substrate, the two is toward each other;

Liquid crystal layer, it comprises liquid crystal molecule, and described liquid crystal layer is plugged between described first substrate and described second substrate;

Gate line, it to be formed on described first substrate and to transmit signal;

First data line, the second data line and the 3rd data line, to be formed on described first substrate and to transmit the first data voltage, the second data voltage and the 3rd data voltage respectively;

First on-off element, it is connected to described gate line and described first data line;

Second switch element, it is connected to described gate line and described second data line;

3rd on-off element, it is connected to described gate line and described second data line;

4th on-off element, it is connected to described gate line and described 3rd data line; And

First pixel electrode, the second pixel electrode, the 3rd pixel electrode and the 4th pixel electrode, be connected respectively to described first on-off element, described second switch element, described 3rd on-off element and described 4th on-off element,

Wherein said first pixel electrode, the second pixel electrode, the 3rd pixel electrode and the 4th pixel electrode belong to a pixel.

2. liquid crystal display according to claim 1, wherein said liquid crystal layer has positive dielectric anisotropy.

3. liquid crystal display according to claim 2, wherein said liquid crystal molecule is substantially perpendicular or parallel in the horizontal surface of described first substrate and described second substrate by orientation.

4. liquid crystal display according to claim 1, wherein said second data voltage changes with predetermined period between the first level and second electrical level.

5. liquid crystal display according to claim 4, wherein said first level is the ceiling voltage that can be used for described liquid crystal display, and described second electrical level is minimum voltage available in described liquid crystal display.

6. liquid crystal display according to claim 4, wherein said predetermined period is a frame.

7. liquid crystal display according to claim 4, wherein said first data line, described second data line and described 3rd data line are formed in identical layer.

8. liquid crystal display according to claim 4, wherein said second data line is formed in identical layer with described gate line.

9. liquid crystal display according to claim 1, also comprises the storage electrode line be formed on described first substrate.

10. liquid crystal display according to claim 1, wherein

Described first pixel electrode and described second pixel electrode comprise multiple branch electrodes, and

The described branch electrodes of described first pixel electrode and the described branch electrodes of described second pixel electrode are arranged alternately.

11. liquid crystal display according to claim 10, the distance between the contiguous branch electrode of wherein said first pixel electrode and described second pixel electrode is different according to their position.

12. 1 kinds of liquid crystal display, comprising:

Pixel, it comprises the first sub-pixel and the second sub-pixel;

Gate line, is formed on substrate; And

First data line, the second data line and the 3rd data line, formed on the substrate;

Wherein said first sub-pixel comprises the first on-off element being connected to described gate line and described first data line, the second switch element being connected to described gate line and described second data line and is connected to the liquid crystal capacitor of described first on-off element and described second switch element

Described second sub-pixel comprises the 3rd on-off element being connected to described gate line and described second data line, the 4th on-off element being connected to described gate line and described 3rd data line and is connected to the liquid crystal capacitor of described 3rd on-off element and described 4th on-off element, and

Described first sub-pixel and described second sub-pixel are applied in the different data voltage obtained from image information.

13. liquid crystal display according to claim 12, wherein said liquid crystal capacitor comprises the liquid crystal layer with positive dielectric anisotropy.

14. liquid crystal display according to claim 13, it is the liquid crystal molecule of the substantially perpendicular or parallel horizontal surface in described substrate that wherein said liquid crystal layer comprises by orientation.

15. liquid crystal display according to claim 12, the voltage being wherein applied to described second data line changes with predetermined period between the first level and second electrical level.

16. liquid crystal display according to claim 15, wherein said first data line, described second data line and described 3rd data line are formed in identical layer.

17. liquid crystal display according to claim 15, wherein said second data line is formed in identical layer with described gate line.

18. liquid crystal display according to claim 12, also comprise formation storage electrode line on the substrate.

19. 1 kinds of liquid crystal display, comprising:

Multiple pixel, is arranged to matrix, and each pixel comprises the first sub-pixel and the second sub-pixel;

Many first grid polar curves and Duo Gen second gate line, be formed on substrate; And

Many first data lines and Duo Gen second data line, formed on the substrate,

Wherein said first sub-pixel comprises the first on-off element being connected to described first grid polar curve and described first data line, the second switch element being connected to described first grid polar curve and described second data line and is connected to the first liquid crystal capacitor of described first on-off element and described second switch element

Described second sub-pixel comprises the 3rd on-off element being connected to described second gate line and described first data line, the 4th on-off element being connected to described second gate line and described second data line and is connected to the second liquid crystal capacitor of described 3rd on-off element and described 4th on-off element, and

20. liquid crystal display according to claim 19, wherein said liquid crystal capacitor comprises the liquid crystal layer with positive dielectric anisotropy.

21. liquid crystal display according to claim 20, it is the liquid crystal molecule of the substantially perpendicular or parallel horizontal surface in described substrate that wherein said liquid crystal layer comprises by orientation.

22. liquid crystal display according to claim 19, the voltage being wherein applied to described second data line changes with predetermined period between the first level and second electrical level.

23. liquid crystal display according to claim 19, wherein said second data line is formed in identical layer with described first grid polar curve and described second gate line.

24. liquid crystal display according to claim 19, also comprise:

Many 3rd data lines, are formed on the substrate,

Wherein when the pixel that two in described multiple pixel are adjacent represents the first pixel and the second pixel,

Described first sub-pixel of described second pixel comprises the 5th on-off element being connected to described first grid polar curve and described 3rd data line, the 6th on-off element being connected to described first grid polar curve and described second data line and is connected to the 3rd liquid crystal capacitor of described 5th on-off element and described 6th on-off element

Described second sub-pixel of described second pixel comprises the 7th on-off element being connected to described second gate line and described 3rd data line, the 8th on-off element being connected to described second gate line and described second data line and is connected to the 4th liquid crystal capacitor of described 7th on-off element and described 8th on-off element, and

Described first sub-pixel and described second sub-pixel of described second pixel are applied in the different data voltage obtained from image information.

25. liquid crystal display according to claim 19, also comprise

Storage electrode line, it is formed on the substrate.

26. 1 kinds of liquid crystal display, comprising:

First pixel adjacent one another are and the second pixel, each pixel comprises the first sub-pixel and the second sub-pixel;

Gate line, it is formed on substrate; And

First data line, the second data line and the 3rd data line, formed on the substrate,

Described first sub-pixel of wherein said first pixel comprises the first on-off element being connected to described first grid polar curve and described first data line, the second switch element being connected to described first grid polar curve and described second data line and is connected to the first liquid crystal capacitor of described first on-off element and described second switch element

The coupling condenser of described first pixel is connected to described first on-off element,

The second liquid crystal capacitor that described second sub-pixel of described first pixel comprises described second switch element and is connected between described coupling condenser and described second switch element,

Described first sub-pixel of described second pixel comprises the 3rd on-off element being connected to described first grid polar curve and described second data line, the 4th on-off element being connected to described first grid polar curve and described 3rd data line and is connected to the 3rd liquid crystal capacitor of described 3rd on-off element and described 4th on-off element

The coupling condenser of described second pixel is connected to described 4th on-off element, and

The 4th liquid crystal capacitor that described second sub-pixel of described second pixel comprises described 3rd on-off element and is connected between described coupling condenser and described 3rd on-off element.

27. liquid crystal display according to claim 26, wherein said first liquid crystal capacitor comprises the liquid crystal layer with positive dielectric anisotropy to described each of 4th liquid crystal capacitor.

28. liquid crystal display according to claim 27, wherein said liquid crystal layer is horizontal or vertical oriented layer.

29. liquid crystal display according to claim 26, the voltage being wherein applied to described second data line changes with predetermined period between the first level and second electrical level.

30. liquid crystal display according to claim 26, wherein said first data line, described second data line and described 3rd data line are formed in identical layer.

31. liquid crystal display according to claim 26, wherein said second data line is formed in identical layer with described gate line.