CN101606315B - Power amplifier time-delay invariant predistortion methods and apparatus - Google Patents
Power amplifier time-delay invariant predistortion methods and apparatus Download PDFInfo
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- CN101606315B CN101606315B CN200880003130.3A CN200880003130A CN101606315B CN 101606315 B CN101606315 B CN 101606315B CN 200880003130 A CN200880003130 A CN 200880003130A CN 101606315 B CN101606315 B CN 101606315B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
- H03F1/3294—Acting on the real and imaginary components of the input signal
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
- H03F1/3247—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits using feedback acting on predistortion circuits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/336—A I/Q, i.e. phase quadrature, modulator or demodulator being used in an amplifying circuit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/57—Separate feedback of real and complex signals being present
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2201/00—Indexing scheme relating to details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements covered by H03F1/00
- H03F2201/32—Indexing scheme relating to modifications of amplifiers to reduce non-linear distortion
- H03F2201/3224—Predistortion being done for compensating memory effects
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2201/00—Indexing scheme relating to details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements covered by H03F1/00
- H03F2201/32—Indexing scheme relating to modifications of amplifiers to reduce non-linear distortion
- H03F2201/3233—Adaptive predistortion using lookup table, e.g. memory, RAM, ROM, LUT, to generate the predistortion
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Abstract
The invention is a time-delay invariant predistortion approach to linearize power amplifiers in wireless RF transmitters. The predistortion architecture is based on the stored-compensation or memory-compensation principle by using a combined time-delay addressing method, and therefore, the architecture has an intrinsic, self-calibrating time-delay compensation function. The predistortion architecture only uses a lookup table to conduct both the correction of non-linear responses of a power amplifier and the compensation of any time-delay effects presented in the same system. Due to the time-delay invariant characteristic, the predistortion design has a wider dynamic range processing advantage for wireless RF signals, and therefore can be implemented in multi-carrier and multi-channel wireless systems.
Description
related application
The application is that title is System and Method for Digital MemorizedPredistortion for Wireless Communication, be filed in the U.S. Patent Application Serial Number 11/262 on October 27th, 2005, 079 part continuation application, this U.S. Patent application is again that title is the U.S. Patent Application Serial Number 10/137 of System and Method for Digital Memorized Predistortionfor Wireless Communication, 556, it is now United States Patent (USP) the 6th, 985, the continuation application of No. 704, by reference these two applications are incorporated into this.The application requires the priority of aforementioned application and also requires the priority of following application: the U.S. Patent Application Serial Number 11/799 that is filed on April 30th, 2007,239 and relevant title be High Efficiency Linearization Power Amplifier ForWireless Communication, be filed in the U.S. Provisional Patent Application sequence number 60/795,820 on April 28th, 2006; Title is Power Amplifier Predistortion Methodsand Apparatus, be filed in the U.S. Provisional Patent Application the 60/876th on December 22nd, 2006, No. 640 with the relevant non-interim U.S. Patent application 11/962,025 that is filed on December 20th, 2007; Title is Power Amplifier Time-Delay InvariantPredistortion Methods and Apparatus, be filed in the U.S. Provisional Patent Application sequence number 60/897,746 on January 26th, 2007; Title is Power AmplifierTime-Delay Invariant Predistortion Methods and Apparatus, be filed in the U.S. Provisional Patent Application sequence number 60/898 on January 29th, 2007, No. 312, by reference all these applications are incorporated into this.
Technical field
The present invention relates to for using the predistortion will be such as the system and method for the linearization of the such PA of wireless transmitting system power amplifier used (PA).Particularly, the present invention proofreaies and correct the non-linear of PA with auto-adaptive time delay control method.Particularly, the present invention relates to postpone service time constant predistortion framework by the system and method for the linearization of the power amplifier in wireless transmitting system (PA).
Background technology
At the pre-distortion system of the typical prior art for power amplifier linearization, this system comprises multiple signal transmission paths conventionally, such as reference path and feedback path.In predistortion linearized system, in the time that signal passes unlike signal transmission path as reference path and feedback path, occur that the timing difference being caused by unlike signal path is inevitable.This difference that is commonly referred to time delay is brought the obvious problem relevant with the accuracy of predistortion correction.These problems are because time delay may be along with comprising that this fact of the variation such as temperature, system condition (comprising signal power level, system aging) becomes even worse.Therefore being difficult to measure such intrinsic time delay parameter in laboratory, can not be constant by the parameter designing postponing for correction time in addition.Many effort are paid in the prior art to compensate, to reduce or to eliminate this time delay.Traditionally, two kinds of methods have been used in the predistortion circuit of prior art by the problem that solves to be caused by time delay.
First method is that the difference of passing the same signal of different transmission path by measurements and calculations is made special time delay cable so that compensating time delay effect, such as the processing in simulation feedforward pre-distortion system.This mode locks into following restriction: time delay cable applies regular time delay, and therefore, in the time of the change of the operating period of real system Lock-in signal and environment, this regular time postpones but can not regulate.
Second method is to use special number signal processing (DSP) algorithm and circuit calculates and regulate adaptively through the time difference of the same signal of different transmission path, then use obtained time delay information to carry out the non-linear of correcting power amplifier.This mode is generally implemented in digital feedback mode and wireless environment.But, need to be generally additional circuit and the associated algorithms of latch, and the accuracy that time delay is calculated is also relevant with convergence of algorithm speed.
Summary of the invention
Next-Generation Wireless Communication Systems need to be used for improved transmitted signal quality and the improved overall RF sender system performance of various broadbands and multimedia service.These demands of senior RF sender system will be met by the power amplifier having than current obtainable higher power efficiency and spectrum efficiency at least in part.In order to obtain better predistortion result, the present invention assesses time delay parameter as the variable of being estimated by particular algorithm and circuit and calculate.
Particularly, the nonlinear distortion that the present invention is PA by a kind of predistortion and time delay look-up table configuration of combination in a kind of enforcement and the time delay of system provide correction factor.This allows system and method for the present invention to become the self calibration solution of a kind of improvement in performance for wireless RF sender system and gamma correction.
This design can be implemented and can be for nearly all less radio-frequency (RF) transmission system to improve power efficiency and spectrum efficiency expediently by good simple circuit structure.The example of some applicable RF transmission systems comprises that wireless base station, access point, cell phone (including but not limited to honeycomb and GPRS agreement), mobile radio terminal, portable wireless apparatus and other wireless communication system are as microwave and satellite communication.
Here the new time presenting postpones constant method and uses following combination: (i) auto-adaptive time postpones non-linear for the treatment of PA of control method; And simultaneously (ii) time delay equalization and without regulating and adjunct circuit and/or the algorithm of customization for special time delay.The method based on algorithm of this novelty can be implemented by pre-distortion unit, and this unit comprises that other in non-linear, time delay information and the system that can store and remember PA disturbs as the time delay addressing look-up table of noise.
Implement according to the below specific descriptions of carrying out by reference to the accompanying drawings these and other aspect that the present invention may be better understood.
Brief description of the drawings
Fig. 1 illustrates according to system of the present invention and device;
Fig. 2 illustrate in simplified form for look-up table serial addressing and by the history of accumulation be entered into look-up table one implement;
Fig. 3 illustrates in simplified form and is different from a kind of look-up table parallel addressing enforcement shown in Fig. 2.
Embodiment
In a kind of enforcement of the present invention, according to the U.S. Patent Application Serial Number 11/262 unsettled, that be filed on October 27th, 2005 being all incorporated into by reference this and attaching as appendix A and B, 079 and be filed in the technology of describing in the U.S. Patent Application Serial Number 11/799,239 on April 30th, 2007 and develop the entry for look-up table.It will be appreciated by those skilled in the art that the error range occurring is bounded in reality system; That is to say have and there is minimum value and peaked scope, and will drop within the scope of this at applicable correction factor of the time of any given sample in nearly all circumstances.By select the look-up table of suitable size and with as fill look-up table by the definite appropriate value of the method in above-mentioned patent (these values are to select) in the whole operation frequency spectrum of PA and associated system, being suitable for the correction factor that input signal respectively samples will be one of existing value in look-up table.Therefore,, once fully fill look-up table, correction factor of the present invention can temporal evolution; That is to say, they are time-independent.Although the size of look-up table can change significantly along with particular implementation and can be little as 16 entries for some systems, for more complicated enforcement, such as being suitable for the enforcement of wireless RF transmission system, it is 2 that this table will have rank
12individual or more entry and can there is obviously more entry according to admissible power consumption, cost and relevant system factor.Implement for some, have been found that 2
12individual with 2
14table size between individual entry is acceptable.
In one is implemented, the look-up table of pre-distortion unit or predistorter carrys out addressing by the address set relevant with the time that can be constructed by shift register, although following stationery body discussion can implement in some versions like that parallel addressing.For current object, use shift register technology is described.The addressing of look-up table is based on following storage-compensation or memory-compensation principle, this principle by vector form in different time storage information and input vector is mapped to one of entry in look-up table.Addressing sets of entries in look-up table will obtain following output signal, and this output signal is the mapping function of corresponding input vector.Because Input Address vector comprises different time signal, so the output signal of look-up table is in fact relevant to different time information, comprise current demand signal and first top n transmitted signal, wherein N > 1 and N are integer.What result can be considered as the signal of storing in each entry of look-up table the combination of all transmitted signals in the past instead of current input signal only has a response.Conventionally, the bit length of the address vector in look-up table is determined the duration of time-delay signal to be covered.
Do not utilize latch or other auxiliary correcting circuit, pre-distortion algorithms to utilize function to be incorporated to time-delay signal combination in order to utilize look-up table unit to proofread and correct the non-linear of PA in time delay environment according to the present invention.Look-up table is stored the nonlinear transformations deriving from PA together with the time delay factor being caused by unlike signal transmission path.By in response to sample, look-up table suitably being carried out to addressing, look-up table provides and both comprises that suitable predistortion correction also comprises the correction factor of reasonable time delay compensation.The output of look-up table is the essentially no time delay error with combined this PA acquisition linearisation output so that input to be provided to PA of original input signal then.
Due to memory and the memory function of look-up table, the nonlinear characteristic of being proofreaied and correct by look-up table is not subject to time-based data limit by PA.The self-adaptive processing of look-up table and characteristic time-independent are benefits of the addressing of look-up table at least some enforcements of arranging.Implement the addressing of look-up table by comprising the collection of N bit vector data of current input signal and first top n input signal.Therefore, the address of look-up table is that length is the combination of the consecutive list entries of N.The address longer (therefore look-up table is larger) of look-up table, the scope duration wider, i.e. the admissible time delay effect of system of the time delay information that system can be held is longer.But although larger table can allow to store more information, entry a bit becomes repetition at certain, thereby larger table is given the marginal returns that successively decreases, waste memory resource and is unnecessarily increased power consumption.
The look-up table of predistortion processor is the storage-compensation principle based on input vector collection being mapped to actual signal output.Because the address packet of look-up table contains the input message from different time storage, so many signal combination of the each output signal being generated by look-up table and transmission are closely related.Therefore,, based on the layout of look-up table, it is also closely relevant with the combined information of the input signal from different time points storage that table upgrades entry.
Then with reference to Fig. 1, can understand particularly one embodiment of the present of invention.Particularly, illustrated embodiment comprises analog multiplier 11, and this multiplier receives the RF signal v of modulation from the radio frequency modulator part 10 of base station
rFand also receive predistortion correction signal v from look-up table and the relevant parts that can broadly be described as predistortion processor (below specifically discussing)
p.Generally speaking, predistortion processor can be considered as ADC 21 and 25 and DAC 30 between all parts.The output of analogue amplifier 11 is as input V
inoffer power amplifier (PA) 12, this PA is again by output signal V
osend to antenna 13.Although the not inevitable quadrature modulator that is still generally of radio frequency modulator 10.May be embodied as by understanding multiplier 11 the multiple multipliers that are associated with one or more orthogonal signalling separately.
The modulator of input down-converter circuit 20 from base station receives Utopian reference signal V
rFand setovered by local oscillator 40, thereby it will export V
doffer AD converter 21.ADC 21 is by signal V
dconvert digital form (as I and Q signal) to, wherein it offers digital predistortion processor and offers respectively particularly variable 22I and 22Q as a pair of input.
The feedback down-conversion converter circuit 26 of also being setovered by local oscillator 40 receives original feedback signal V from the output of PA
o(t) and by feedback signal V
foffer feedback ADC 25.The numeral output of this ADC 25 is then by the second input, feedback signal offers digital predistortion processor and offers particularly variable 24I and 24Q.Below digital output signal Vr is offered DAC 30 by the concrete digital pre-distortion of discussing, and this DAC30 converts digital signal to analog form, wherein it in multiplier 11 with the RF signal combination of modulation.
As shown in fig. 1, address date shaper 32I-32Q receives input and is designed to generate the desired signal form for look-up table 33I/Q from ADC21I/Q.Data formation device 32I/Q carries out addressing to the mnemon in look-up table 33I/Q, and wherein independent I and Q output are offered adder 31 by look-up table.May be embodied as one or more look-up table by understanding look-up table 33.The address being provided by address shaper 32I-32Q can be considered as look-up table keyword or address.
Predistortion controller look-up table 33I-33Q is designed to the mnemon of storage for the linearizing pre-distorted signals of high power amplifier.Pre-distorted signals in table is based on passing through more satisfactory signal v
dwith feedback signal v
fthe error generating and the adaptive algorithm presenting.Be stored in the data of table in 33I-Q and can upgrade and form by adaptive iteration as mentioned below the data of the Numerical Index that reflects non-linearity of power amplifier characteristic.
By at idealized signal V
rF(t) with feedback signal V
o(t) AM-AM between and the comparison of AM-PM information, digital predistortion processor is calculated the output signal V being caused by the nonlinear transmission characteristic of high power amplifier 12
o(t) amplitude and the error of phase component.
Based on by aforementioned relatively obtain control information, predistortion processor is based at United States Patent (USP) the 6th, 985,704, AM-AM and AM-PM distortion that the compensating signal that in number, disclosed lookup table algorithm is calculated and generation has the characteristic contrary with the transforming function transformation function of PA 12 is adaptively caused by PA 12 with predistortion.
The output v of predistortion look-up table 33I-33Q
pafter adder 31 and digital-to-analog converter 30, be fed to multiplier 11 to revise the RF signal from the modulation of modulator 10.The output of multiplier be in order to input to high power amplifier produce precompensation, its non-linear contrary required pre-distorted signals v non-linear and power amplifier 12
in(k).
It will be appreciated by those skilled in the art that as ideal signal v
rFwith feedback signal V
o(t) when these two signals arrive predistortion controller, between these signals, may there is signal difference.The time delay difference between two signals that cause in the different paths that time difference is advanced when going to controller by each leisure.This signal time postpones parameter and other environmental factor and changing randomly that can be based on circuit and parts.Result is to be difficult to estimate, to calculate and regulate signal difference such in on-the-spot applied environment.In order to overcome this problem, the present invention is by using by the United States Patent (USP) of previously having quoted the 6th, and a kind of algorithm of 985, No. 704 instructions regulates this time delay adaptively.
The use of look-up table 33 is allowed memory function to be incorporated at least some embodiment of the present invention.The look-up table of predistortion controller is the storage compensation principle based on input data set being mapped to numeral output and adaptive updates.Based on the function of storage, each output signal of look-up table in fact with current and previous transmitted signal all about, therefore there is following memory function: it not only compensates the non-linear of PA and has avoided for the needs such as normally used special time delay equalization circuit in prior art.
Based on the framework of predistortion shown in Fig. 1, the non-linear output signal v by predistortion processor of power amplifier
pproofread and correct.Signal v
pwith the input of the RF signal multiplication of modulating using generation pre-distorted signals as power amplifier.In fact, the input signal of power amplifier is can be aspect amplitude/envelope controlled and at complex gain signal adjustable aspect phase place.The relation of input and output can be described as following complex gain expression formula:
v
in＝v
RFv
p＝v
RFF(V) (1)
Wherein v
pthat the predistortion processor being generated by the mapping function F of look-up table is exported.Conventionally, mapping function F is unknown and be difficult to express with mathematical way.But, can pass through according to the entry in adaptive algorithm renewal look-up table to realize and { 0,1}
n→ v
pf is determined in likely shining upon that these relations are corresponding adaptively.
Therefore look-up table is mapped to actual output v by each N position Input Address vector set V
p.In fact the transmitted signal sequence through power amplifier from current time to the first top n time that, the vector representative of N dimension address is expressed by following formula:
V(k)＝(d
1(k)，d
2(k)，...，d
N(k))
T (2)
The wherein each data d in above-mentioned vector V
ibe be expressed as follows 1 or 0:
D
i(k)=0 or 1, wherein 1≤i≤N (3)
In a kind of enforcement shown in Fig. 2, the serial shift register 205 that addressing is carried out by the each corresponding entry to look-up table during predistortion process in the address of look-up table 200 forms.Because the information of addressing is relevant with current and first top n transmitted signal, send the function of data, be therefore incorporated to time delay corrective element so the output signal 210 of look-up table can be considered as last N.Upgrade 220 and upgrade adaptively look-up table by combine adaptive error 215 and look-up table in combiner 225.Even presentative time late effect in the time that same signal passes different transmission path, the layout that is configured to the look-up table of predistortion processor still can be by the correction signal of combination systematically for the gamma correction of PA and the processing of time delay equalization.
Make to there is no need to use additional period delay disposal and relevant circuit to thering is the technology that look-up table that the predistortion of combination and time delay proofread and correct uses.Because the address packet of look-up table contains the control information of current and previous transmission, so be the many temporal informations combinations of enriching signal component that comprise from current time to the first top n time inherently from each output signal of look-up table.Result pre-distortion algorithms has the built-in mechanism in order to compensating signal late effect.This obtains a kind of than the obvious simpler and easy and more effective pre-distortion structure of traditional solution.
In the predistortion framework as shown in Figures 1 and 2 with look-up table, memory table is by its address register addressing.The figure place length of shift register is determined the size of look-up table and is therefore determined the time delay scope, the i.e. maximum constraints of time late effect that cover.Each data set of storing in look-up table has unique allocation index.This allocation index of data set is corresponding to the input data sampling time point of data set.Then utilize that allocation index calculates as non-linear error calibration for PA time calibration this purpose timestamp.In other words, at each predistortion point computing time, pre-distortion algorithms is selected from only data set of concrete addressing entry as the output of look-up table for the further non-linear error calibration processing of PA.If selected output signal is only relevant with current time transmitted signal and irrelevant with other transmitted signal, during pre-distortion, must consider by the time delay causing by the current transmitted signal of different transmission path to the accurate Signal Matching between reference and feedback signal is provided.
By relevant with the figure place of address register the time delay scope being covered by look-up table.For the look-up table with N bit address register, the size of lookup table entries is M=2
n-1.This means that all data that have M entry and be stored in entry in look-up table are to cover the function of current time k to the address vector of a previous k-M+1 time.Input Address vector set A can be expressed as:
A＝{V(k)，V(k-1)，...，V(k-M+1)}(4)
Wherein V (k) is the Input Address vector at time k, and this vector recording needle may predistortion information to the nonlinear M of PA and signal and the time-delay signal component of the current transmission of each information recording.
Based on memory-compensation principle, the time delay look-up table configuration of combination relates to catch the simple and easy logical operation and the signal processing that postpone through the signal time of different transmission path.Particularly, due to the characteristic of time-delay invariant, this predistortion framework can be in wider dynamic range and is processed and to proofread and correct PA non-linear without adjunct circuit and algorithm.
Those skilled in the art also will understand for some embodiment, the normally larger and sample rate higher embodiment relatively of look-up table, can use parallel addressing scheme, than parallel addressing scheme as shown in Figure 3, this scheme is except being used to identical with Fig. 2 in fact the parallel input 300 of look-up table.If closely obtain together the data point (than faster sample rate) of sampling, thereby effectively become identical for the correction factor of sample t and sample t+1, can use parallel addressing mode to carry out addressing to look-up table.In certain embodiments, if the size of look-up table is large and meet computing capability and miscellaneous equipment problem fully, parallel addressing mode can be given compared with serial addressing mode and the performance of Yan Gengjia in the environment that uses very fast sample rate.
Describe particularly the present invention who comprises some embodiment and alternate embodiment completely, it will be appreciated by those skilled in the art that many other existing within the scope of the invention substitutes and equivalent embodiment.Therefore the present invention not will in fact only be limited by claims by foregoing description.
Claims (9)
1. for by a pre-distortion system for the linearization of power amplifier, comprising:
First signal, represents RF modulation signal,
Feedback signal, represents the nonlinear characteristic of power amplifier,
Predistortion controller, comprise at least one look-up table with pre-sizing, be suitable for receiving described first signal and described feedback signal and generate the correction factor of the described nonlinear characteristic for proofreading and correct described power amplifier, and the value of wherein said at least one look-up table drops on by the definite scope of the size of described at least one look-up table
Wherein said at least one look-up table be configured in response to the in-phase component of feedback signal described in the quadratic sum of the in-phase component from described first signal square between the difference input of deriving and the quadratic sum of the quadrature component of described first signal described in feedback signal quadrature component square between the difference input of deriving; And
Multiplier, is configured to:
Combine described RF modulation signal and the analog signal corresponding with described correction factor, described correction factor is generated and is depended on the output of described at least one look-up table by described predistortion controller, described output is fed into described multiplier after adder and digital-to-analog converter; And
By the signal provision of described combination to described power amplifier with by the linearization of described power amplifier.
2. pre-distortion system according to claim 1, also comprises serial shift register, is used to form the address for described at least one look-up table.
3. pre-distortion system according to claim 1, wherein said at least one look-up table carrys out addressing by parallel signal.
4. pre-distortion system according to claim 1, the value of wherein said at least one look-up table automatically compensates the time delay through the signal of different transmission path.
5. for by a pre-distortion system for the linearization of power amplifier, comprising:
First signal, represents RF modulation signal,
Feedback signal, represents the nonlinear characteristic of power amplifier,
Predistortion controller, comprises address shaper and look-up table, and the value in wherein said look-up table is temporal evolution and the operating characteristic based on described power amplifier and wireless RF transmission system not,
Wherein said look-up table be configured in response to the in-phase component of feedback signal described in the quadratic sum of the in-phase component from described first signal square between the difference input of deriving and from the quadrature component of feedback signal described in the quadratic sum of the quadrature component of described first signal square between the difference input of deriving; And
Multiplier, is configured to:
Combine described RF modulation signal and the analog signal corresponding with time-independent correction factor, described correction factor is generated and is depended on the output of described look-up table by described predistortion controller, described output is fed into described multiplier after adder and digital-to-analog converter.
6. by a method for the linearization of power amplifier, comprising:
The RF modulation signal that represents ideal signal is provided,
The feedback signal of the nonlinear characteristic that represents power amplifier is provided,
To representing described power amplifier and multiple samples of the error characteristics scope that comprises time delay of the transmission system that is associated are sampled,
Determine multiple time-independent error correction factor in response to described sample with look-up table,
Wherein said look-up table be configured in response to the in-phase component of feedback signal described in the quadratic sum of the in-phase component from described RF modulation signal square between the difference input of deriving and from the quadrature component of feedback signal described in the quadratic sum of the quadrature component of described RF modulation signal square between the difference input of deriving;
Combine described RF modulation signal and the analog signal corresponding with described time-independent error correction factor with multiplier, described multiplier arrangement becomes to receive from the output that is positioned at adder digital-to-analog converter afterwards, and described adder is configured to combine the output of described look-up table;
The simulation error correction signal that is provided for the output of power amplifier described in linearisation, described simulation error correction signal represents the combination of described RF modulation signal and described analog signal.
7. pre-distortion system according to claim 1, wherein said digital-to-analog converter is configured to convert the digital signal corresponding with described correction factor to the described analog signal corresponding with described correction factor.
8. pre-distortion system according to claim 5, wherein said digital-to-analog converter is configured to convert the digital signal corresponding with described correction factor to the described analog signal corresponding with described correction factor.
9. method according to claim 6, also comprises: by representative for the digital error correction signal of one of described correction factor of the linearization of described power amplifier being converted to representative for by the described simulation error correction signal of one of described correction factor of the linearization of described power amplifier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410199319.1A CN103997301B (en) | 2007-01-26 | 2008-01-28 | The pre-distortion method and device of power amplifier time-delay invariant |
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US89774607P | 2007-01-26 | 2007-01-26 | |
| US60/897,746 | 2007-01-26 | ||
| US89831207P | 2007-01-29 | 2007-01-29 | |
| US60/898,312 | 2007-01-29 | ||
| PCT/IB2008/000996 WO2008155610A2 (en) | 2007-01-26 | 2008-01-28 | Power amplifier time-delay invariant predistortion methods and apparatus |
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|---|---|---|---|
| CN201410199319.1A Division CN103997301B (en) | 2007-01-26 | 2008-01-28 | The pre-distortion method and device of power amplifier time-delay invariant |
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| CN101606315A CN101606315A (en) | 2009-12-16 |
| CN101606315B true CN101606315B (en) | 2014-07-02 |
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| CN200880003130.3A Active CN101606315B (en) | 2007-01-26 | 2008-01-28 | Power amplifier time-delay invariant predistortion methods and apparatus |
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| CN201410199319.1A Active CN103997301B (en) | 2007-01-26 | 2008-01-28 | The pre-distortion method and device of power amplifier time-delay invariant |
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| Country | Link |
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| EP (1) | EP2118999A4 (en) |
| CN (2) | CN103997301B (en) |
| WO (1) | WO2008155610A2 (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US8380143B2 (en) | 2002-05-01 | 2013-02-19 | Dali Systems Co. Ltd | Power amplifier time-delay invariant predistortion methods and apparatus |
| US8811917B2 (en) | 2002-05-01 | 2014-08-19 | Dali Systems Co. Ltd. | Digital hybrid mode power amplifier system |
| KR20100014339A (en) | 2006-12-26 | 2010-02-10 | 달리 시스템즈 씨오. 엘티디. | Method and system for baseband predistortion linearization in multi-channel wideband communication systems |
| US8682338B2 (en) | 2010-09-14 | 2014-03-25 | Dali Systems Co., Ltd. | Remotely reconfigurable distributed antenna system and methods |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5959499A (en) * | 1997-09-30 | 1999-09-28 | Motorola, Inc. | Predistortion system and method using analog feedback loop for look-up table training |
| CN1302476A (en) * | 1998-08-06 | 2001-07-04 | 三星电子株式会社 | Apparatus and method of linearizing power amplifier in mobile radio communication system |
| US6998909B1 (en) * | 2004-02-17 | 2006-02-14 | Altera Corporation | Method to compensate for memory effect in lookup table based digital predistorters |
| US7109792B2 (en) * | 2003-09-17 | 2006-09-19 | Andrew Corporation | Table-based pre-distortion for amplifier systems |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7035345B2 (en) * | 2001-06-08 | 2006-04-25 | Polyvalor S.E.C. | Adaptive predistortion device and method using digital receiver |
| US6657510B2 (en) * | 2001-11-27 | 2003-12-02 | Harris Corporation | Corrective phase quadrature modulator system and method |
| US6985704B2 (en) * | 2002-05-01 | 2006-01-10 | Dali Yang | System and method for digital memorized predistortion for wireless communication |
| US8064850B2 (en) * | 2002-05-01 | 2011-11-22 | Dali Systems Co., Ltd. | High efficiency linearization power amplifier for wireless communication |
-
2008
- 2008-01-28 EP EP08806836A patent/EP2118999A4/en not_active Withdrawn
- 2008-01-28 CN CN201410199319.1A patent/CN103997301B/en active Active
- 2008-01-28 WO PCT/IB2008/000996 patent/WO2008155610A2/en active Application Filing
- 2008-01-28 CN CN200880003130.3A patent/CN101606315B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5959499A (en) * | 1997-09-30 | 1999-09-28 | Motorola, Inc. | Predistortion system and method using analog feedback loop for look-up table training |
| CN1302476A (en) * | 1998-08-06 | 2001-07-04 | 三星电子株式会社 | Apparatus and method of linearizing power amplifier in mobile radio communication system |
| US7109792B2 (en) * | 2003-09-17 | 2006-09-19 | Andrew Corporation | Table-based pre-distortion for amplifier systems |
| US6998909B1 (en) * | 2004-02-17 | 2006-02-14 | Altera Corporation | Method to compensate for memory effect in lookup table based digital predistorters |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2008155610A3 (en) | 2009-04-30 |
| EP2118999A2 (en) | 2009-11-18 |
| CN103997301A (en) | 2014-08-20 |
| WO2008155610A2 (en) | 2008-12-24 |
| CN101606315A (en) | 2009-12-16 |
| CN103997301B (en) | 2018-09-28 |
| EP2118999A4 (en) | 2010-01-27 |
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