CN101594047B - Simple power-on surge suppression circuit - Google Patents
Simple power-on surge suppression circuit Download PDFInfo
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- CN101594047B CN101594047B CN 200910097211 CN200910097211A CN101594047B CN 101594047 B CN101594047 B CN 101594047B CN 200910097211 CN200910097211 CN 200910097211 CN 200910097211 A CN200910097211 A CN 200910097211A CN 101594047 B CN101594047 B CN 101594047B
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Abstract
The invention discloses a simple power-on surge suppression circuit, which comprises a main circuit and a silicon controlled rectifier surge suppression circuit, wherein the main circuit is a BOOST power conversion circuit consisting of an inductor L1, a diode D2, a capacitor C4 and a switching tube Q2; and the silicon controlled rectifier surge suppression circuit comprises a silicon controlled rectifier Q1, a starting resistor R2 and a silicon controlled rectifier delay trigger circuit. Compared with the prior art, the simple power-on surge suppression circuit has the advantages that: 1, when the circuit works normally, the effective value of current flowing through the SCR is small, the turn on loss is reduced and the power supply efficiency is improved; 2, the surge compression can berealized without current detection, and the cost is reduced; 3, when a power supply works at an extra-low temperature, the efficiency is not influenced by the power-on surge compression circuit; and 4, the simple power-on surge suppression circuit can be used in the conditions of hot start and cold start of circuits or network side current fluctuation, and is also suitable for high-power application occasions.
Description
Technical field
The present invention relates to a kind of simple start surge current suppression circuit.More particularly, the present invention relates to a kind of control and simply, do not need the start of current detecting surge current suppression circuit.
Background technology
Switching Power Supply generally all adopts big capacitor filtering to obtain HVDC at input side, so switch is when opening, and line voltage is instantaneous to cause the start surge current to big electric capacity charging, damages semiconductor element probably.Even the employing circuit of power factor correction also because big electric capacity is adopted in the output of BOOST topology, still can't suppress the surge of starting shooting.
In order to improve reliability, suppress surge current, conventional method uses relay, thermocouple, semiconductor die brake tube or similar device to be connected with resistance or thermocouple usually, suppresses the surge current in the AC-DC circuit.In these methods, it is the simplest that input side seals in thermocouple, and cost is minimum.But the resistance value of thermocouple can raise along with the reduction of temperature, especially when the power work ambient temperature is extremely low, thermocouple when operate as normal, can produce very big loss, lower efficiency.
Input side adopts serial connection controllable silicon (SCR) can eliminate Influence of Temperature, in the prior art, is illustrated in figure 1 as a kind of surge restraint circuit (US.Patent NO.5202819), and thermocouple 6 is a series element, can cause the extra power consumption of input side.Use " zero-crossing detector 4 " to drive two silicon controlled rectifiers 5 in addition in the circuit, when current on line side is unstable, need a big electric capacity that energy is provided, increased cost and product space like this.Be illustrated in figure 2 as another kind of surge restraint circuit (US.Patent NO.5715154), use a series element-semiconductor die brake tube 22, increased power consumption, and power consumption is directly proportional with input current, so be not suitable for high power circuit.Be illustrated in figure 3 as another surge restraint circuit, similar among the shortcoming of existence and Fig. 2.
Summary of the invention
Technical problem to be solved by this invention be to overcome deficiency of the prior art and provide a kind of reliably, surge restraint circuit efficiently, can be used for the situation of high power circuit cold start-up or warm start or current on line side fluctuation.
In order to solve the problems of the technologies described above; The present invention adopts following technical scheme: a kind of power-on surge suppression circuit; Comprise main circuit, controllable silicon surge restraint circuit, described main circuit is the BOOST power conversion circuit of being made up of inductance L 1, diode D2, capacitor C 4 and switching tube Q2, the termination input anode of inductance L 1; The anode of another terminating diode D2 and the drain electrode of switching tube Q2; The negative terminal of capacitor C 4 connects source electrode and the ground of switching tube Q2, it is characterized in that described controllable silicon surge restraint circuit comprises controllable silicon Q1, starting resistance R2 and controllable silicon delay trigger circuit, and the anode of controllable silicon Q1 connects the end of R2 of negative electrode and the starting resistance of diode D2; The negative electrode of controllable silicon Q1 connects the other end of starting resistance R2 and the anode of capacitor C 4, and the gate pole of controllable silicon Q1 connects the controllable silicon delay trigger circuit.
During startup, electric current flow through main circuit inductance L 1, diode D2, starting resistance R2 and capacitor C 4, starting resistance suppresses surge current.After the circuit operate as normal, the controllable silicon delay trigger circuit triggers controllable silicon Q1 gate pole, makes it conducting, simultaneously with starting resistance R2 short circuit.Electric current flow through main circuit inductance L 1, diode D2, controllable silicon Q1 and capacitor C 4.
Compared with prior art, the invention has the beneficial effects as follows:
1, the current effective value that flows through among the SCR during operate as normal is little, has reduced conduction loss, improves power-efficient.
2, need not current detecting just can realize that surge suppresses, and reduces cost.
3, power supply is when extremely low temperature is worked, the do not started shooting influence of surge restraint circuit of efficient.
4, can be used for the situation of circuit warm start, cold start-up or current on line side fluctuation, also be suitable for the high power applications occasion.
According to the present invention; The mode of an optimization is that described controllable silicon delay trigger circuit comprises resistance R 1, capacitor C 1, capacitor C 2 and driving power Vbias; The end of one terminating resistor R1 of capacitor C 1 and the gate pole of controllable silicon Q1; The other end of the other end connecting resistance R1 of capacitor C 1, the anode of capacitor C 2 and the anode of driving power Vbias, the negative terminal of driving power Vbias connects the negative terminal of capacitor C 2 and the negative terminal of capacitor C 4.Resistance R 1 is used for regulating controllable silicon Q1 trigger current.
According to the present invention, described driving power Vbias provides the anode of a terminating diode D4 of the secondary winding of inductance L 1, the negative terminal of another termination capacitor C 2 by secondary winding and a diode D4 of inductance L 1; The negative electrode of diode D4 connects the anode of capacitor C 2.
According to the present invention; Described driving power Vbias is provided by secondary winding and a voltage doubling rectifing circuit that comprises capacitor C 5, capacitor C 6, diode D4 and diode D5 of inductance L 1; The end of one termination capacitor C5 of the secondary winding of inductance L 1, the anode of the negative terminal of another termination capacitor C 2, diode D4 and an end of capacitor C 6; The negative electrode of another terminating diode D4 of capacitor C 5 and the anode of diode D5; The negative electrode of diode D5 connects the other end of capacitor C 6 and the anode of capacitor C 2.
According to the present invention; Described driving power Vbias is provided by secondary winding and a voltage doubling rectifing circuit that comprises capacitor C 5, capacitor C 6, diode D4 and diode D5 of inductance L 1; The anode of one terminating diode D5 of the secondary winding of inductance L 1 and the negative electrode of diode D4, an end of another termination capacitor C 5 and an end of capacitor C 6; The anode of another terminating diode D4 of capacitor C 5 and the negative terminal of capacitor C 2, the negative electrode of another terminating diode D5 of capacitor C 6 and capacitor C 2 anodes.
According to the present invention, described driving power Vbias is provided by external drive circuit.
As further improvement of the present invention, between the anode of controllable silicon Q1 and ground, connect and absorb capacitor C 3, in order to absorb the surge voltage on the controllable silicon Q1.
According to the present invention, the mode of another optimization is that described controllable silicon delay trigger circuit comprises resistance R 3, capacitor C 7 and diode D3, and the anode of diode D3 connects the anode of diode D2; The end of the negative electrode connecting resistance R3 of diode D3 and an end of capacitor C 7; The other end ground connection of capacitor C 7; The gate pole of another termination controllable silicon Q1 of resistance R 3.
Description of drawings
Below in conjunction with accompanying drawing and embodiment the present invention is described further.
Fig. 1 is a surge restraint circuit figure instance 1 in the prior art
Fig. 2 is a surge restraint circuit figure instance 2 in the prior art
Fig. 3 is a surge restraint circuit figure instance 3 in the prior art
Fig. 4 is surge restraint circuit figure of the present invention
Fig. 5 is surge restraint circuit figure embodiment 1 of the present invention
Fig. 6 is surge restraint circuit figure embodiment 2 of the present invention
Fig. 7 is surge restraint circuit figure embodiment 3 of the present invention
Fig. 8 is surge restraint circuit figure embodiment 4 of the present invention
Fig. 9 is surge restraint circuit figure embodiment 5 of the present invention
Embodiment
With reference to accompanying drawing 4, surge restraint circuit figure of the present invention comprises main circuit, controllable silicon surge restraint circuit.
Described main circuit is the BOOST power conversion circuit of being made up of inductance L 1, diode D2, capacitor C 4 and switching tube Q2.The one termination input anode of inductance L 1, the anode of another terminating diode D2 and the drain electrode of switching tube Q2; The negative electrode of diode D2 connects the end of R2 of anode and the starting resistance of controllable silicon Q2; The other end of the negative electrode of one termination controllable silicon Q2 of capacitor C 4 and the R2 of starting resistance, another termination of C4 and the source electrode of switching tube Q2 and ground.
Described controllable silicon surge restraint circuit is made up of resistance R 1, capacitor C 1, capacitor C 2, controllable silicon Q1, resistance R 2, capacitor C 3 and driving power Vbias.The end of the anode connecting resistance R2 of controllable silicon Q1 and an end of capacitor C 3, the negative terminal of the other end of negative electrode connecting resistance R2, the anode of capacitor C 4 and capacitor C 2, the end of gate pole connecting resistance R1 and an end of capacitor C 2; The end of one terminating resistor R2 of capacitor C 3, other end ground connection; The anode of the positive termination capacitor C 2 of driving power Vbias, negative terminal connects the negative terminal of capacitor C 2.
During startup, electric current flow through main circuit inductance L 1, diode D2, starting resistance R2 and capacitor C 4, starting resistance limit inrush currents.After the circuit operate as normal, the auxiliary winding of inductance gives capacitor C 2 chargings, triggers controllable silicon Q1 gate pole, makes it conducting, is about to starting resistance R2 short circuit.Electric current flow through main circuit inductance L 1, diode D2, controllable silicon Q1 and capacitor C 4.Resistance R 1 is regulated controllable silicon Q1 trigger current.During startup, capacitor C 2 provides evoked potential for controllable silicon Q1 gate pole.When capacitor C 1 is not full of electricity, for controllable silicon Q1 provides the transient state trigger current, the gate trigger current of the controllable silicon Q1 resistance R 1 of flowing through during stable state; The surge voltage that capacitor C 3 absorbs on the controllable silicon Q1.
With reference to accompanying drawing 5, surge restraint circuit figure embodiment 1 of the present invention.The driving power Vbias of described controllable silicon surge restraint circuit is provided by inductance secondary winding.The anode of inductance winding one terminating diode D4, the negative terminal of another termination capacitor C 2; The negative electrode of diode D4 connects the anode of capacitor C 2.All the other structures of the described surge restraint circuit figure of the embodiment of the invention are identical with aforesaid Fig. 4.
With reference to accompanying drawing 6, surge restraint circuit figure embodiment 2 of the present invention.The driving power Vbias of described controllable silicon surge restraint circuit is provided by inductance secondary winding and voltage doubling rectifing circuit.The end of inductance winding one termination capacitor C5, the anode of the negative terminal of another termination capacitor C 2, diode D4 and an end of capacitor C 6; The negative electrode of another terminating diode D4 of capacitor C 5 and the anode of diode D5; The negative electrode of diode D5 connects the other end of capacitor C 6 and the anode of capacitor C 2.All the other structures of the described surge restraint circuit figure of the embodiment of the invention are identical with aforesaid first instance.
With reference to accompanying drawing 7, surge restraint circuit figure embodiment 3 of the present invention.The driving power Vbias of described controllable silicon surge restraint circuit is provided by inductance secondary winding and voltage doubling rectifing circuit.The anode of inductance winding one terminating diode D5 and the negative electrode of diode D4, an end of another termination capacitor C 5 and an end of capacitor C 6; The anode of another terminating diode D4 of capacitor C 5 and the negative terminal of capacitor C 2, the negative electrode of another terminating diode D5 of capacitor C 6 and capacitor C 2 anodes.All the other structures of the described surge restraint circuit figure of the embodiment of the invention are identical with aforesaid first instance.
With reference to accompanying drawing 8, surge restraint circuit figure embodiment 4 of the present invention.The driving power Vbias of described controllable silicon surge restraint circuit is provided by external drive circuit when high-power applications.The anode of the positive termination capacitor C 2 of external drive power supply, negative terminal connects the negative terminal of capacitor C 2.All the other structures of the described surge restraint circuit figure of inventive embodiments are identical with aforesaid first instance.
With reference to accompanying drawing 9, surge restraint circuit figure embodiment 5 of the present invention.Described controllable silicon delay trigger circuit comprises resistance R 3, capacitor C 7 and diode D3, and the anode of diode D3 connects the anode of diode D2; The end of the negative electrode connecting resistance R3 of diode D3 and an end of capacitor C 7; The other end ground connection of capacitor C 7; The gate pole of another termination controllable silicon Q1 of resistance R 3.All the other structures of the described surge restraint circuit figure of the embodiment of the invention are identical with aforesaid first instance.
Inventive point of the present invention is: during startup, starting resistance suppresses surge current, and after the PFC level work, controllable silicon is with the starting resistance short circuit.Circuit of the present invention is simple relatively, volume is little, efficient is high, and cost is low, realizes easily, and is easy to use, is the invention of very with practical value and an economic benefit.
At last, it is also to be noted that what more than enumerate only is specific embodiment of the present invention.Obviously, the invention is not restricted to above embodiment, many distortion can also be arranged.All distortion that those of ordinary skill in the art can directly derive or associate from content disclosed by the invention all should be thought the protection range of inventing.
What should be understood that is: the foregoing description is just to explanation of the present invention, rather than limitation of the present invention, and any innovation and creation that do not exceed in the connotation scope of the present invention all fall within protection scope of the present invention.
Claims (9)
1. power-on surge suppression circuit; Comprise main circuit, controllable silicon surge restraint circuit; Described main circuit is the BOOST power conversion circuit of being made up of inductance L 1, diode D2, capacitor C 4 and switching tube Q2; The one termination input anode of inductance L 1, the anode of another terminating diode D2 and the drain electrode of switching tube Q2, the negative terminal of capacitor C 4 connects source electrode and the ground of switching tube Q2; It is characterized in that described controllable silicon surge restraint circuit comprises controllable silicon Q1, starting resistance R2 and controllable silicon delay trigger circuit; The anode of controllable silicon Q1 connects the end of R2 of negative electrode and the starting resistance of diode D2, and the negative electrode of controllable silicon Q1 connects the other end and the anode of capacitor C 4 of the R2 of starting resistance, and the gate pole of controllable silicon Q1 connects the controllable silicon delay trigger circuit.
2. a kind of power-on surge suppression circuit as claimed in claim 1; It is characterized in that described controllable silicon delay trigger circuit comprises resistance R 1, capacitor C 1, capacitor C 2 and driving power Vbias; The end of one terminating resistor R1 of capacitor C 1 and the gate pole of controllable silicon Q1; The other end of the other end connecting resistance R1 of capacitor C 1, the anode of capacitor C 2 and the anode of driving power Vbias, the negative terminal of driving power Vbias connects the negative terminal of capacitor C 2 and the anode of capacitor C 4.
3. a kind of power-on surge suppression circuit as claimed in claim 2; It is characterized in that described driving power Vbias is provided by secondary winding and a diode D4 of inductance L 1; The anode of one terminating diode D4 of the secondary winding of inductance L 1, the negative terminal of another termination capacitor C 2; The negative electrode of diode D4 connects the anode of capacitor C 2.
4. a kind of power-on surge suppression circuit as claimed in claim 2; It is characterized in that described driving power Vbias is provided by secondary winding and a voltage doubling rectifing circuit that comprises capacitor C 5, capacitor C 6, diode D4 and diode D5 of inductance L 1; The end of one termination capacitor C5 of the secondary winding of inductance L 1, the anode of the negative terminal of another termination capacitor C 2, diode D4 and an end of capacitor C 6; The negative electrode of another terminating diode D4 of capacitor C 5 and the anode of diode D5; The negative electrode of diode D5 connects the other end of capacitor C 6 and the anode of capacitor C 2.
5. a kind of power-on surge suppression circuit as claimed in claim 2; It is characterized in that described driving power Vbias is provided by secondary winding and a voltage doubling rectifing circuit that comprises capacitor C 5, capacitor C 6, diode D4 and diode D5 of inductance L 1; The anode of one terminating diode D5 of the secondary winding of inductance L 1 and the negative electrode of diode D4, an end of another termination capacitor C 5 and an end of capacitor C 6; The anode of another terminating diode D4 of capacitor C 5 and the negative terminal of capacitor C 2, the negative electrode of another terminating diode D5 of capacitor C 6 and capacitor C 2 anodes.
6. a kind of power-on surge suppression circuit as claimed in claim 2 is characterized in that described driving power Vbias is provided by external drive circuit.
7. like any one described a kind of power-on surge suppression circuit of claim 2-6, it is characterized in that between the anode of controllable silicon Q1 and ground, connecing and absorb capacitor C 3, in order to absorb the surge voltage on the controllable silicon Q1.
8. a kind of power-on surge suppression circuit as claimed in claim 1 is characterized in that described controllable silicon delay trigger circuit comprises resistance R 3, capacitor C 7 and diode D3, and the anode of diode D3 connects the anode of diode D2; The end of the negative electrode connecting resistance R3 of diode D3 and an end of capacitor C 7; The other end ground connection of capacitor C 7; The gate pole of another termination controllable silicon Q1 of resistance R 3.
9. a kind of power-on surge suppression circuit as claimed in claim 8 is characterized in that between the anode of controllable silicon Q1 and ground, connecing and absorbs capacitor C 3, in order to absorb the surge voltage on the controllable silicon Q1.
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CN 200910097211 CN101594047B (en) | 2009-03-30 | 2009-03-30 | Simple power-on surge suppression circuit |
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CN 200910097211 CN101594047B (en) | 2009-03-30 | 2009-03-30 | Simple power-on surge suppression circuit |
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CN101594047B true CN101594047B (en) | 2012-12-26 |
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Families Citing this family (11)
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CN101784146B (en) * | 2010-01-05 | 2013-03-06 | 英飞特电子(杭州)股份有限公司 | Circuit for improving silicon controlled rectifier (SCR) dimmer to adapt to capacitive load |
CN102570809B (en) | 2010-12-31 | 2016-02-24 | 意法半导体研发(深圳)有限公司 | Short-circuit protection circuit and method |
JP5975375B2 (en) * | 2012-01-17 | 2016-08-23 | パナソニックIpマネジメント株式会社 | 2-wire dimmer switch |
CN103457472A (en) * | 2012-05-31 | 2013-12-18 | 海洋王照明科技股份有限公司 | Switching power supply and lamp applying same |
CN103916031A (en) * | 2013-01-09 | 2014-07-09 | 中国长城计算机深圳股份有限公司 | Half-controlled bridge rectifier with surge suppression function |
CN103683255A (en) * | 2013-11-28 | 2014-03-26 | 成都市宏山科技有限公司 | Starting-up anti-surge circuit |
CN104601153A (en) * | 2015-01-05 | 2015-05-06 | 中国科学院等离子体物理研究所 | Gate electrode time-delayed trigger control device of controllable semiconductor device |
CN104917405B (en) * | 2015-05-14 | 2018-09-07 | 华为技术有限公司 | Circuit for silicon-controlled driving circuit and AC module |
CN105262332B (en) * | 2015-11-18 | 2017-10-31 | 广东工业大学 | A kind of upper electric surge current suppression circuit applied to Switching Power Supply |
US10250058B2 (en) * | 2016-09-15 | 2019-04-02 | Raytheon Company | Charge management system |
CN109639126B (en) * | 2019-01-29 | 2024-05-07 | 杨团团 | Surge current prevention circuit and electric equipment |
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CN1115551A (en) * | 1994-07-01 | 1996-01-24 | 克罗内有限公司 | Method for the protection in particular of telecommunication installations and protection circuit for carrying-out said method |
JP2006121808A (en) * | 2004-10-21 | 2006-05-11 | Cosel Co Ltd | Switching power supply device |
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Patent Citations (2)
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CN1115551A (en) * | 1994-07-01 | 1996-01-24 | 克罗内有限公司 | Method for the protection in particular of telecommunication installations and protection circuit for carrying-out said method |
JP2006121808A (en) * | 2004-10-21 | 2006-05-11 | Cosel Co Ltd | Switching power supply device |
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