CN101527550B - Gallium arsenide monolithic integrated numerical-control real time delay circuit - Google Patents
Gallium arsenide monolithic integrated numerical-control real time delay circuit Download PDFInfo
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Abstract
The invention discloses a gallium arsenide monolithic integrated numerical-control real time delay circuit which consists of different basic delay potentials and is characterized in that more than two different basic delay potentials are integrated on the same chip by adopting the integrated circuit technology and the basic delay potentials are connected in series, wherein, each basic delay potential comprises single-pole double-throw switch modules, a delay module and an amplitude adjustment module; the common terminal of one single-pole double-throw switch module is connected with the input signals, and the other two terminals thereof are connected with the input terminals of the delay module and the amplitude adjustment module respectively; and the common terminal of the other single-pole double-throw switch module is the signal output terminal, and the output terminals of the delay module and the amplitude adjustment module are connected with the other two ends thereof. The invention can improve the delay precision, so that better consistency of electrical properties is ensured and the invention is least controlled and affected by the technology; meanwhile, the invention increases the signal amplitude adjustment circuit, compensates for the amplitude fluctuation of the delay branch, fulfils the functions of a plurality of circuits in the transceiver system and reduces the complexity of the system.
Description
Technical field
The time that the present invention relates to a kind of transmission signals to modern advanced electronics receive-transmit system is selected control, realize multichannel microwave signal arriving signal processing center unit simultaneously, thereby realize the radio frequency beam point and track towards of electronics receive-transmit system accurately, especially a kind of gallium arsenide monolithic integrated numerical-control real time delay circuit.
Background technology
The real time delay line circuit as shown in Figure 1, is the structured flowchart of the electronics receive-transmit system of a simplification as the extensively utilization in the microwave transmitting and receiving system of parts, and electronics receive-transmit system 200 has comprised 211,212,213,214,215,216,217,218,219,21A, 21B and 21C be totally 12 antenna elements and 221,222,223,224,225,226,227,228,229,22A, 22B and 22C be totally 12 phase shifter element, phase shifter element of each antenna element serial connection, the transmission-receiving function of realization signal.In Fig. 1,4 antenna element serial connection phase shifter element constitute a submatrix, and each submatrix is connected in series in 231,232 and 233 3 delay line circuit units.By beam controlling system 240 codings, form control signal Pc1, Pc2 and Pc3, thereby control delay unit and phase shifter element realize the change of the electromagnetic wave direction D of electronics receive-transmit system transmitting-receiving.Wave surface direction W is and electromagnetic wave direction D quadrature that the Signal Processing mode is similar.In the utilization of reality, the electronics receive-transmit system comprises more submatrix and more antenna element.
Along with the requirement of miniaturization of electronics receive-transmit system and mass, fiber delay time device that adopts in this system or microwave hybrid circuit can not satisfy the requirement of through engineering approaches in batches at present.Simultaneously, present delay line circuit makes the signal through time-delay have the fluctuation of certain amplitude, needs increasing degree to adjust circuit and adjusts signal amplitude, has increased the complexity of circuit, and its delay precision, electrical property also are subjected to influence to a certain degree simultaneously.
Summary of the invention
For addressing the above problem, the technical solution used in the present invention is: a kind of gallium arsenide monolithic integrated numerical-control real time delay circuit, form by different basic time-delay positions, on with chip piece, adopt the integrated basic time-delay position different more than two of integrated circuit technology, adopt between the basic time-delay position and be connected in series, wherein each position of delaying time substantially comprises the single-pole double-throw switch (SPDT) module, time delay module, amplitude adjusting module, the public termination input signal of single-pole double-throw switch (SPDT) module, other two ports connect the input of time delay module and amplitude adjusting module respectively, the output of time delay module and amplitude adjusting module connects two ports in addition of another single-pole double-throw switch (SPDT) module respectively, the common port of another single-pole double-throw switch (SPDT) module is a signal output part, described amplitude adjusting module adopts thin-film technique to be produced on the substrate, form by microstrip line X2-X6 and resistance R 9-R11, X2 wherein, R9, X3, X4, R10, X6 connects successively, X3, the node of X4 connects the end of X5, and the other end of X5 is by resistance R 11 ground connection.
Described amplitude adjusting module adopts T type or ∏ type resistor network.
Described time delay module adopts thin-film technique to be produced on the substrate, by microstrip line X10, X11, X14-X20, mutual inductance coupling element L1-L16 and capacitor C 1-C8 form, X10 wherein, L1, L2, X14, L3, L4, X16, L5, L6, X18, L7, L8, X20, L9, L10, X19, L11, L12, X17, L13, L14, X15, L15, L16, X13, X11 connects successively, L1, the node of L2 is by capacitor C 1 ground connection, L3, the node of L4 is by capacitor C 2 ground connection, L5, the node of L6 is by capacitor C 3 ground connection, L7, the node of L8 is by capacitor C 4 ground connection, L9, the node of L10 is by capacitor C 5 ground connection, L11, the node of L12 is by capacitor C 6 ground connection, L13, the node of L14 is by capacitor C 7 ground connection, L15, the node of L16 is by capacitor C 8 ground connection.
Described single-pole double-throw switch (SPDT) module is voltage-controlled field effect transistor circuit, adopt thin-film technique to be produced on the substrate, by control end K1, K2, resistance R 1-R8, switched field effect pipe T1-T8, microstrip line X1, X7, X12, X13, form, wherein control end K2 by resistance R 1, R3, R6, R8 respectively with the grid that is connected switched field effect pipe T1, T3, T6, T8, control end K1 pass through resistance R 2, R4, R5, R7 respectively with the grid that is connected switched field effect pipe T2, T4, T5, T7.
Adopt the beneficial effect that technique scheme produced to be: the present invention is with on the different integrated same chips in basic time-delay position, adopt the monolithic integrated circuit form to realize the real time delay function, can improve delay precision, make electrical property consistency better, be subjected to technology controlling and process, influence minimum; Increase the signal amplitude regulating circuit that adopts T type or ∏ type resistor network to realize simultaneously, the amplitude fluctuation of compensation delay branch road has realized the function of a plurality of circuit in the receive-transmit system, has reduced the complexity of system, saved expense greatly, signal amplitude is changed in ± 0.5dB.Generally speaking, GaAs MMIC (monolithic integrated microwave circuit) the real time delay line with amplitude compensate function reduces the volume of transceiver module, the complexity of simplified system.
Description of drawings
Fig. 1 is the simplified block diagram of existing electronics receive-transmit system;
Fig. 2 is the simplified structure block diagram of a basic time-delay of the present invention position;
Fig. 3 is the structural representation of 8 integrated numerical-control delay lines of the present invention;
Fig. 4 is the schematic diagram of 1 figure place control delay line (basic time-delay position);
Fig. 5 is the chip layout of 1 figure place control delay line (basic time-delay position);
Fig. 6 is that 8 basic attitudes of integrated numerical-control delay line are inserted the test curve figure of loss.
Embodiment
Below in conjunction with accompanying drawing the present invention is done and to describe in further detail:
The present invention adopts ic manufacturing process, a circuit element of will delaying time substantially adopts thin-film technique to be produced on the substrate (matrix), a plurality of basic time-delay position circuit with different delayed time time are integrated in the same chip, all circuit of delaying time substantially are connected in series, wherein each circuit of delaying time substantially comprises the single-pole double-throw switch (SPDT) module, time delay module, amplitude adjusting module, its structured flowchart as shown in Figure 2, the public termination input signal of single-pole double-throw switch (SPDT) module, other two ports connect the input of time delay module and amplitude adjusting module respectively, the output of time delay module and amplitude adjusting module connects two ports in addition of another single-pole double-throw switch (SPDT) module respectively, and the common port of another single-pole double-throw switch (SPDT) module is a signal output part.
In actual fabrication, the single-pole double-throw switch (SPDT) module adopts voltage-controlled GaAs switch field effect transistor to realize, realizes the switching of single-pole double throw by the switch of voltage control field effect transistor, and amplitude adjusting module adopts T type or ∏ type resistor network to realize.
As shown in Figure 3, structure diagram for 8 concrete gallium arsenide monolithic integrated numerical-control real time delay embodiment of the present invention, the input and output port of circuit is respectively 23a and 23b, 8 basic time- delay position 230a, 230b, 230c, 230d, 230e, 230f, 230g and 230h are followed in series to form numerical control delay line line circuit, wherein 313 is amplitude adjusting module, and 314 is time delay module, Pca, Pcb, Pcc, Pcd, Pce, Pcf, Pcg, Pch is respectively 230a, 230b, 230c, 230d, 230e, 230f, 230g, delay time the substantially control end of single-pole double throw module of position of 230h.The single-pole double throw module adopts the GaAs field effect transistor switching circuit, described 230a, 230b, 230c, 230d, 230e, 230f, 8 basic time-delays of 230g, 230h position is followed successively by a 2.5ps switching mode time-delay position, a 5ps switching mode time-delay position, a 10ps switching mode time-delay position, a 20ps switching mode time-delay position, a 40ps switching mode time-delay position, a 80ps switching mode time-delay position, a 160ps switching mode time-delay position and a 320ps switching mode time-delay position.Then the input of 2.5ps switching mode time-delay position is the input 23a of circuit, and the output of 320ps switching mode time-delay position is the output 23b of circuit.Because each circuit of delaying time substantially is the component parameters difference, circuit structure is identical, so followingly with regard to a 160ps switching mode time-delay position circuit operation principle of the present invention and embodiment are described respectively.
As shown in Figure 4, be the schematic diagram of 160ps switching mode time-delay of the present invention position, it is made up of control end K1, the K2 of 8 GaAs switch field effect transistor T1-T8, microstrip line X1-X13, mutual inductance coupling element L1-L16, resistance R 1-R11, capacitor C 1-C8, one group of complementation.Wherein microstrip line X2-X6 and resistance R 9-R11 constitute amplitude adjusting module 313, and X2, R9, X3, X4, R10, X6 connect successively, and the node of X3, X4 connects the end of X5, and the other end of X5 is by resistance R 11 ground connection; Microstrip line X10, X11, X14-X20, mutual inductance coupling element L1-L16 and capacitor C 1-C8 constitute time delay module 314, X10, L1, L2, X14, L3, L4, X16, L5, L6, X18, L7, L8, X20, L9, L10, X19, L11, L12, X17, L13, L14, X15, L15, L16, X13, X11 connects successively, L1, the node of L2 is by capacitor C 1 ground connection, L3, the node of L4 is by capacitor C 2 ground connection, L5, the node of L6 is by capacitor C 3 ground connection, L7, the node of L8 is by capacitor C 4 ground connection, L9, the node of L10 is by capacitor C 5 ground connection, L11, the node of L12 is by capacitor C 6 ground connection, L13, the node of L14 is by capacitor C 7 ground connection, L15, the node of L16 is by capacitor C 8 ground connection.8 GaAs switch field effect transistor T1-T8, barriers constitute the two-single-pole double-throw switch (SPDT) module of microwave signal jointly from resistance R 1-R8 and microstrip line X1, X7, X12, X13, X8 and X9, thereby realize the two-way strobe case of amplitude adjusted reference state and time-delay attitude.Control end K1 is connected with switched field effect pipe T2, T4, T5, T7 respectively from resistance R 2, R4, R5, R7 by barrier; Control end K2 is connected with switched field effect pipe T1, T3, T6, T8 respectively from resistance R 1, R3, R6, R8 by barrier.When control level was zero volt, the switched field effect pipe was a conducting state; When control level was 1.5 to 2 times of switched field effect pipe clamp outage pressures, switched field effect Guan Weiguan held attitude.During work, switched field effect pipe T1, T3, T6 and T8 are conducting state, and switched field effect pipe T2, T4, T5 and T7 are for closing off-state, and promptly microwave signal is by the time-delay attitude; Another state is that switched field effect pipe T1, T3, T6 and T8 are the pass off-state, and switched field effect pipe T2, T4, T5 and T7 are conducting state, and promptly microwave signal is by the amplitude adjusted reference state.The time difference of microwave transmission signal under this two states is required amount of delay.
As shown in Figure 5, be the domain of a basic time-delay position of the embodiment of the invention (160ps), manufacture craft adopts thin-film technique that circuit element is manufactured on the substrate.
As shown in Figure 6, for the basic attitude of the present invention's 8 figure place control delay lines is inserted the test curve figure of loss, as seen from the figure, changes in amplitude of the present invention is in ± 0.5dB, this invention has realized the function of a plurality of circuit in the receive-transmit system by the increasing degree regulating circuit, reduces the complexity of system.
Claims (3)
1. gallium arsenide monolithic integrated numerical-control real time delay circuit, form by different basic time-delay positions, it is characterized in that: on chip piece, adopt the integrated basic time-delay position different more than two of integrated circuit technology, adopt between the basic time-delay position and be connected in series, wherein each position of delaying time substantially comprises the single-pole double-throw switch (SPDT) module, time delay module, amplitude adjusting module, the public termination input signal of single-pole double-throw switch (SPDT) module, other two ports connect the input of time delay module and amplitude adjusting module respectively, the output of time delay module and amplitude adjusting module connects two ports in addition of another single-pole double-throw switch (SPDT) module respectively, the common port of another single-pole double-throw switch (SPDT) module is a signal output part, described amplitude adjusting module adopts thin-film technique to be produced on the substrate, form by microstrip line X2-X6 and resistance R 9-R11, X2 wherein, R9, X3, X4, R10, X6 connects successively, X3, the node of X4 connects the end of X5, and the other end of X5 is by resistance R 11 ground connection.
2. gallium arsenide monolithic integrated numerical-control real time delay circuit according to claim 1, it is characterized in that described time delay module adopts thin-film technique to be produced on the substrate, by microstrip line X10, X11, X14-X20, mutual inductance coupling element L1-L16 and capacitor C 1-C8 form, X10 wherein, L1, L2, X14, L3, L4, X16, L5, L6, X18, L7, L8, X20, L9, L10, X19, L11, L12, X17, L13, L14, X15, L15, L16, X13, X11 connects successively, L1, the node of L2 is by capacitor C 1 ground connection, L3, the node of L4 is by capacitor C 2 ground connection, L5, the node of L6 is by capacitor C 3 ground connection, L7, the node of L8 is by capacitor C 4 ground connection, L9, the node of L10 is by capacitor C 5 ground connection, L11, the node of L12 is by capacitor C 6 ground connection, L13, the node of L14 is by capacitor C 7 ground connection, L15, the node of L16 is by capacitor C 8 ground connection.
3. gallium arsenide monolithic integrated numerical-control real time delay circuit according to claim 1, it is characterized in that described single-pole double-throw switch (SPDT) module is voltage-controlled field effect transistor circuit, adopt thin-film technique to be produced on the substrate, by control end K1, K2, resistance R 1-R8, switched field effect pipe T1-T8, microstrip line X1, X7, X12, X13, form, wherein control end K2 is by resistance R 1, R3, R6, R8 respectively be connected switched field effect pipe T1, T3, T6, the grid of T8, control end K1 is by resistance R 2, R4, R5, R7 respectively be connected switched field effect pipe T2, T4, T5, the grid of T7.
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| CN103701535B (en) * | 2013-12-12 | 2019-02-01 | 安弗施无线射频***（上海）有限公司 | Adjust the method and device of intelligent antenna calibration plate |
| CN104753507B (en) * | 2015-03-13 | 2018-04-10 | 河北盛平电子科技有限公司 | Delay line circuit |
| CN105911599A (en) * | 2016-03-28 | 2016-08-31 | 大同市快安科技有限公司 | Detection device and method based on metal detection automatic balance compensation technology |
| US10116029B2 (en) * | 2016-05-11 | 2018-10-30 | The Regents Of The University Of California | Ultra-wide band circulators with sequentially-switched delay line (SSDL) |
| US10784576B2 (en) * | 2017-10-13 | 2020-09-22 | General Electric Company | True time delay beam former module and method of making the same |
| CN117156544B (en) * | 2023-10-30 | 2023-12-29 | 为准（北京）电子科技有限公司 | Circuit capable of adjusting radio frequency signal time delay and communication device |
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