CN101478030A - Phase-change memory including interlayer and manufacturing process - Google Patents
Phase-change memory including interlayer and manufacturing process Download PDFInfo
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Abstract
The invention relates to a phase change memory unit with an interlayer and a fabrication method thereof. The phase change memory unit is characterized in that a pure metal interlayer structure with a thickness less than 10 nm is added between an electrode material layer and a phase change material layer. The pure metal interlayer has any of the following three structures: (1) the pure metal interlayer is located between a lower electrode layer and the phase change material layer; (2) the pure metal interlayer is located between the phase change material layer and an upper electrode layer; and (3) the first interlayer of the pure metal is located between the lower electrode layer and the phase change material layer, the second interlayer of the pure metal is located between the phase change material layer and the upper electrode layer, and the pure metal components and the thicknesses of the first interlayer and the second interlayer can be the same or different. The introduction of the interlayer can improve the crystallization speed of the phase change material and lower the melting point of the phase change material. Compared with the structure of the conventional phase change memory, the phase change memory with the interlayer has higher programming speed and lower programming power consumption.
Description
Technical field
The present invention relates to comprise the phase transition storage and the manufacture method of interlayer, or rather, relate to the phase change memory structure that between electrode and phase-change material, adds simple substance interlayers such as antimony, tin, silver, bismuth, tellurium, thereby can improve the program speed of device, the programming power consumption of reduction device.The invention belongs to the micro-nano electronic technology field.
Background technology
The phase transition storage technology is based on Ovshinsky at late 1960s (Phys.Rev.Lett., 21,1450～1453,1968) beginning of the seventies (Appl.Phys.Lett., 18,254～257,1971) phase-change thin film of Ti Chuing can be applied to that the conception of phase change memory medium sets up, and is the memory device of a kind of low price, stable performance.Phase transition storage can be made on the silicon wafer substrate, and its critical material is recordable phase-change thin film, heating electrode material, heat-insulating material and extraction electrode material etc.The basic principle of phase transition storage is to utilize electric impulse signal to act on the device cell, make phase-change material between amorphous state and polycrystalline attitude, reversible transition take place, low-resistance when high resistant during by the resolution amorphous state and polycrystalline attitude can realize writing, wipe and read operation of information.
Phase transition storage owing to have reads at a high speed, high erasable number of times, non-volatile, advantages such as component size is little, strong motion low in energy consumption, anti-and radioresistance, is thought flash memories that most possible replacement is present by international semiconductor TIA and becomes following memory main product and become the device of commercial product at first.
The research of memory develops towards the direction of high speed, high density, low-power consumption always.Mechanism's great majority of being engaged at present the phase transition storage R﹠D work in the world are major companies of semicon industry, the focus that they pay close attention to all concentrates in the commercialization that realizes phase transition storage how as early as possible, therefore corresponding research focus also just launches around its device technology: the physical mechanism research of device, comprise the operating current that how to reduce device, promptly reduce power consumption; Device architecture design and the research of storage mechanism etc.; The manufacturing process research of high-density device array comprises the nanoscale problem that how to realize device cell, the technological problems of high-density device chip, the Problem of Failure of device cell etc.Wherein the raising of the program speed of device is very crucial and important with the programming power consumption reduction.One of effective ways that improve program speed are to reach the purpose that shortens the phase-change material crystallization time by phase-change material being carried out doping vario-property, and the method for reduction device power consumption has: the contact area that reduces electrode and phase-change material; Improve the resistance of phase-change material; Reduce the fusing point of phase-change material; Between electrode and phase-change material or the inner thermoresistance layer or the like that adds of phase-change material.And add interlayer between electrode and phase-change material is the more simple method that can realize shortening the phase-change material crystallization time simultaneously and reduce by two kinds of purposes of phase-change material fusing point.Between electrode material and phase-change material, add the extremely thin interlayer of one deck, be heated in the process counterdiffusion mutually that realizes between part sandwich material and the phase-change material at phase-change material, reach the purpose of phase-change material being carried out doping vario-property, after the sandwich material that is added mixes to phase-change material, can improve the phase velocity of phase-change material on the one hand, also can reduce simultaneously the fusing point of phase-change material, play the dual purpose that improves program speed and reduce programming power consumption.In addition, because the very thin thickness of interlayer can not cause the whole modifications of phase-change material, the material of modification only is distributed at the interface, is unlikely to like this because the storage characteristics loss or the reduction of mixing and causing phase-change material.At last, it is also simple to utilize the self-diffusion of sandwich material to realize that phase-change material is entrained on the preparation method, can not increase the difficulty of technology.Above-mentioned some starting point of the present invention just.
Summary of the invention
The objective of the invention is to be to provide phase change memory structure and the manufacture method that comprises interlayer, the purpose that reduce the device cell programming power consumption to reach, improves device programming speed.
The phase transformation memory device unit that comprises interlayer provided by the invention, comprise upper electrode layer, phase-change material layers and lower electrode layer, and upper electrode layer links to each other with peripheral circuit respectively with lower electrode layer, constitute complete phase-changing memory unit, it is characterized in that adding between electrode material layer and phase-change material layers the structure of elemental metals interlayer, the thickness of described elemental metals interlayer is less than 10nm.
Described interpolation elemental metals interlayer is any in following three kinds of structures:
1. the elemental metals interlayer is between lower electrode layer and phase-change material layers;
2. the elemental metals interlayer is between phase-change material layers and upper electrode layer;
3. first interlayer of elemental metals is between lower electrode layer and phase-change material layers, second interlayer of elemental metals is between phase-change material layers and upper electrode layer, and the elemental metals component of first interlayer and second interlayer is identical or inequality, and the thickness of first interlayer and second interlayer is identical or inequality.
The elemental metals of described elemental metals interlayer is antimony, tin, silver, bismuth or tellurium, has stronger adhesive force between they and phase-change material or electrode material.
With representative, 3. planting structure with above-mentioned is the example explanation for sake of convenience.The preparation process of phase transformation memory device unit provided by the present invention, specific as follows:
1) preparation lower electrode layer (100) (as shown in Figure 1), the method that is adopted be in sputtering method, evaporation, chemical vapour deposition technique (CVD), plasma enhanced chemical vapor deposition method (PECVD), Low Pressure Chemical Vapor Deposition (LPCVD), metallic compound vapour deposition process (MOCVD), molecular beam epitaxy (MBE), atomic vapor deposition method (AVD) or the atomic layer deposition method (ALD) any; Lower electrode material is the monometallic material, and is a kind of in the monometallic material among W, Pt, Au, Ti, Al, Ag, Cu or the Ni, or it is combined into alloy material, or by the nitride or the oxide of described electrode monometallic material.
2) go up preparation the 1st interlayer (200) (as shown in Figure 2) at lower electrode layer (100), the method that is adopted be in sputtering method, evaporation, chemical vapour deposition technique (CVD), plasma enhanced chemical vapor deposition method (PECVD), Low Pressure Chemical Vapor Deposition (LPCVD), metallic compound vapour deposition process (MOCVD), molecular beam epitaxy (MBE), atomic vapor deposition method (AVD) or the atomic layer deposition method (ALD) any; Sandwich material thickness is less than 10nm; Sandwich material is simple substance interlayers such as antimony, tin, silver, bismuth, tellurium.
3) go up preparation phase-change material layers (300) (as shown in Figure 3) at the 1st interlayer (200), the method that is adopted be in sputtering method, evaporation, chemical vapour deposition technique (CVD), plasma enhanced chemical vapor deposition method (PECVD), Low Pressure Chemical Vapor Deposition (LPCVD), metallic compound vapour deposition process (MOCVD), molecular beam epitaxy (MBE), atomic vapor deposition method (AVD) or the atomic layer deposition method (ALD) any; Phase-change material is a kind of in chalcogenide compound, GeSb, SiSb, the metal oxide.
4) go up preparation the 2nd interlayer (400) (as shown in Figure 4) at phase-change material layers (300), the method that is adopted be in sputtering method, evaporation, chemical vapour deposition technique (CVD), plasma enhanced chemical vapor deposition method (PECVD), Low Pressure Chemical Vapor Deposition (LPCVD), metallic compound vapour deposition process (MOCVD), molecular beam epitaxy (MBE), atomic vapor deposition method (AVD) or the atomic layer deposition method (ALD) any; Sandwich material thickness is less than 10nm; Sandwich material is simple substance interlayers such as antimony, tin, silver, bismuth, tellurium.
5) go up preparation upper electrode layer (500) (as shown in Figure 5) at the 2nd interlayer (400), the method that is adopted be in sputtering method, evaporation, chemical vapour deposition technique (CVD), plasma enhanced chemical vapor deposition method (PECVD), Low Pressure Chemical Vapor Deposition (LPCVD), metallic compound vapour deposition process (MOCVD), molecular beam epitaxy (MBE), atomic vapor deposition method (AVD) or the atomic layer deposition method (ALD) any; Upper electrode material is the monometallic material, and is a kind of in the monometallic material among W, Pt, Au, Ti, Al, Ag, Cu or the Ni, or it is combined into alloy material, or by the nitride or the oxide of described electrode monometallic material.
6) integrated the control switch and the peripheral circuit of the upper and lower electrode of phase transformation memory device unit and device cell at last, prepare the phase transformation memory device unit of nanoscale, the processing method that is adopted is conventional semiconductor technology; As the material of extraction electrode be among W, Pt, Au, Ti, Al, Ag, Cu or the Ni any, or it is combined into alloy material.
Obviously, the structure of provided by the invention the 1st, 2 kind of single interlayer only needs above-mentioned steps is simplified, and as only at bottom electrode and phase-change material interlayer interlayer being arranged, then can save step 4, then can save step 2 as interlayer between phase-change material layers and upper electrode layer.
In sum, the present invention is directed to the storage principle and the characteristics of phase transition storage, design has proposed to add the phase change memory structure of simple substance interlayers such as antimony, tin, silver, bismuth, tellurium between electrode and phase-change material, because the introducing of interlayer can improve the crystallization rate of phase-change material, the fusing point of reduction phase-change material, compare with traditional phase change memory structure, the phase transition storage that comprises interlayer has higher program speed and lower programming power consumption.
Description of drawings
Fig. 1 prepares lower electrode layer
Fig. 2 prepares the 1st interlayer on lower electrode layer
Fig. 3 prepares phase-change material layers on the 1st interlayer
Fig. 4 prepares the 2nd interlayer on phase-change material layers
Fig. 5 prepares upper electrode layer on the 2nd interlayer
Among the figure: 100-lower electrode layer; 200-the 1 interlayer; 300-phase-change material layers; 400-the 2 interlayer; 500-upper electrode layer
Embodiment
Further specify substantive distinguishing features of the present invention and obvious improvement below by specific embodiment, but the present invention only limiting to embodiment absolutely not, also is that described embodiment limits the present invention absolutely not.
Embodiment 1
The preparation process of the phase transformation memory device unit that comprises interlayer of the present invention is specific as follows:
Step 1: adopt the CVD legal system to be equipped with the W lower electrode layer, the diameter of W electrode is 80nm, highly is 200nm.(Fig. 1)
Step 2: adopt magnetron sputtering method to prepare the antimony interlayer on the W lower electrode layer, technological parameter is: initial vacuum degree (claim background air pressure again, English is Basic Pressure) is 1 * 10
-5Pa, Ar gas air pressure is 0.5Pa during sputter, and sputtering power is 200W, and underlayer temperature is 25 ℃, and film thickness is 5nm.(Fig. 2)
Step 3: on the antimony interlayer, adopt magnetron sputtering method to prepare Ge
2Sb
2Te
5Phase-change material layers, technological parameter is: background air pressure is 1 * 10
-5Pa, Ar gas air pressure is 0.2Pa during sputter, and sputtering power is 200W, and underlayer temperature is 25 ℃, and film thickness is 200nm.(Fig. 3)
Step 4: at Ge
2Sb
2Te
5Adopt magnetron sputtering method to prepare the antimony interlayer on the phase-change material layers, technological parameter is: background air pressure is 1 * 10
-5Pa, Ar gas air pressure is 0.5Pa during sputter, and sputtering power is 200W, and underlayer temperature is 25 ℃, and film thickness is 5nm.(Fig. 4)
Step 5: adopt magnetron sputtering method to prepare the TiN upper electrode layer on the antimony interlayer, technological parameter is: background air pressure is 1 * 10
-5Pa, air pressure is 0.2Pa during sputter, Ar/N
2Gas flow ratio be 1:1, sputtering power is 300W, underlayer temperature is 25 ℃, TiN top electrode thickness is 40nm.(Fig. 5)
Step 6: adopt magnetron sputtering method to prepare extraction electrode Al film, film thickness is 500nm, adopt common semiconductor processes to etch extraction electrode, integrated with the control switch and the peripheral circuit of device cell, thus prepare complete phase transformation memory device unit.
Embodiment 2
Antimony interlayer preparation method among the embodiment 1 is changed into AVD or ALD method, and all the other steps and embodiment 1 are identical.
Embodiment 3
The 2nd antimony interlayer (between phase-change material and top electrode) in embodiment 1 or 2 is removed, and all the other steps and embodiment 1 and 2 are identical.
Embodiment 4
The first interlayer antimony in embodiment 1,2 or 3 is changed into any sandwich material in tin, silver, bismuth or the tellurium, remainder is identical with embodiment 1,2 or 3 respectively, be built into first sandwich material material different with second interlayer, the thickness of two interlayers of same material or two interlayers of different materials also can be different, and vice versa.
Embodiment 5
The Ge in embodiment 1,2,3 or 4
2Sb
2Te
5Phase-change material changes GeSb or SiSb into, and remainder is identical with embodiment 1,2,3 or 4 respectively.
Embodiment 6
With deletion the 2nd interlayer among the embodiment 1, then can save step 4, and sandwich material can be used other elemental metals.
Claims (6)
1, the phase transformation memory device unit that comprises interlayer, comprise upper electrode layer, phase-change material layers and lower electrode layer, and upper electrode layer links to each other with peripheral circuit respectively with lower electrode layer, constitute complete phase-changing memory unit, it is characterized in that adding between electrode material layer and phase-change material layers the structure of elemental metals interlayer, the thickness of described elemental metals interlayer is less than 10nm.
2,, it is characterized in that described interpolation elemental metals interlayer is any in following three kinds of structures by the described phase transformation memory device unit that comprises interlayer of claim 1:
1. the elemental metals interlayer is between lower electrode layer and phase-change material layers;
2. the elemental metals interlayer is between phase-change material layers and upper electrode layer;
3. first interlayer of elemental metals is between lower electrode layer and phase-change material layers, second interlayer of elemental metals is between phase-change material layers and upper electrode layer, and the elemental metals component of first interlayer and second interlayer is identical or inequality, and the thickness of first interlayer and second interlayer is identical or inequality.
3, by claim 1 or the 2 described phase transformation memory device units that comprise interlayer, the elemental metals that it is characterized in that described elemental metals interlayer is antimony, tin, silver, bismuth or tellurium, has adhesive force between they and phase-change material or electrode material.
4, make the method that comprises the phase transformation memory device unit of interlayer as claimed in claim 2, it is characterized in that the making step of 1. planting structure is:
A) preparation lower electrode layer (100), the method that is adopted be in sputtering method, evaporation, chemical vapour deposition technique, plasma enhanced chemical vapor deposition method, Low Pressure Chemical Vapor Deposition (LPCVD), metallic compound vapour deposition process, molecular beam epitaxy, atomic vapor deposition method and the atomic layer deposition method any; Lower electrode material is any among monometallic material W, Pt, Au, Ti, Al, Ag, Cu and the Ni, or it is combined into alloy material, or by the nitride or the oxide of described electrode monometallic material;
B) lower electrode layer (100) of step a making is gone up preparation elemental metals interlayer (200), and the method that is adopted is any in sputtering method, evaporation, chemical vapour deposition technique, plasma enhanced chemical vapor deposition method, Low Pressure Chemical Vapor Deposition, metallic compound vapour deposition process, molecular beam epitaxy, atomic vapor deposition method and the atomic layer deposition method; Sandwich material is any simple substance interlayer in antimony, tin, silver, bismuth and the tellurium;
C) the elemental metals interlayer (200) that contains that step b makes is gone up preparation phase-change material layers (300), and the method that is adopted is any in sputtering method, evaporation, chemical vapour deposition technique, plasma enhanced chemical vapor deposition method, Low Pressure Chemical Vapor Deposition, metallic compound vapour deposition process, molecular beam epitaxy, atomic vapor deposition method and the atomic layer deposition method; Phase-change material is any in chalcogenide compound, GeSb, SiSb and the metal oxide;
D) prepare upper electrode layer (500) on the phase-change material layers that step c makes, the method that is adopted is any in sputtering method, evaporation, chemical vapour deposition technique, plasma enhanced chemical vapor deposition method, Low Pressure Chemical Vapor Deposition, metallic compound vapour deposition process, molecular beam epitaxy, atomic vapor deposition method and the atomic layer deposition method; Described upper electrode material be among monometallic material W, Pt, Au, Ti, Al, Ag, Cu and the Ni any, or its alloy material that is combined into, or by the nitride or the oxide of described electrode monometallic material;
E) control switch and the peripheral circuit of the upper and lower electrode of the phase transformation memory device unit of at last above-mentioned steps being made and device cell are integrated, prepare the phase transformation memory device unit of nanoscale, and the processing method that is adopted is conventional semiconductor technology; As the material of extraction electrode be among W, Pt, Au, Ti, Al, Ag, Cu or the Ni any, or it is combined into alloy material.
5, make the method that comprises the phase transformation memory device unit of interlayer as claimed in claim 2, it is characterized in that the making step of 2. planting structure is:
A) at first, preparation lower electrode layer (100), the method that is adopted is any in sputtering method, evaporation, chemical vapour deposition technique, plasma enhanced chemical vapor deposition method, Low Pressure Chemical Vapor Deposition, metallic compound vapour deposition process, molecular beam epitaxy, atomic vapor deposition method and the atomic layer deposition method; Lower electrode material is any among monometallic material W, Pt, Au, Ti, Al, Ag, Cu and the Ni, or it is combined into alloy material, or by the nitride or the oxide of described electrode monometallic material;
B) the lower electrode material layer of making at step a (100) is gone up preparation phase-change material layers (300), and the method that is adopted is any in sputtering method, evaporation, chemical vapour deposition technique, plasma enhanced chemical vapor deposition method, Low Pressure Chemical Vapor Deposition, metallic compound vapour deposition process, molecular beam epitaxy, atomic vapor deposition method and the atomic layer deposition method; Described phase-change material is a kind of in chalcogenide compound, GeSb, SiSb, the metal oxide;
C) phase-change material layers of making at step b (300) is gone up preparation elemental metals interlayer (400), and the method that is adopted is any in sputtering method, evaporation, chemical vapour deposition technique, plasma enhanced chemical vapor deposition method, Low Pressure Chemical Vapor Deposition, metallic compound vapour deposition process, molecular beam epitaxy, atomic vapor deposition method and the atomic layer deposition method; Sandwich material is antimony, tin, silver, bismuth or tellurium simple substance;
D) interlayer (400) of the elemental metals of making at step c is gone up preparation upper electrode layer (500), the method that is adopted be in sputtering method, evaporation, chemical vapour deposition technique, plasma enhanced chemical vapor deposition method, Low Pressure Chemical Vapor Deposition, metallic compound vapour deposition process, molecular beam epitaxy, atomic vapor deposition method or the atomic layer deposition method any; Described upper electrode material is the monometallic material, any among W, Pt, Au, Ti, Al, Ag, Cu and the Ni, or it is combined into alloy material, or by the nitride or the oxide of described electrode monometallic material;
E) it is integrated to comprise the control switch and the peripheral circuit of the upper and lower electrode of phase transformation memory device unit with dissection and device cell at last, prepares the phase transformation memory device unit of nanoscale, and the processing method that is adopted is conventional semiconductor technology; As the material of extraction electrode is among W, Pt, Au, Ti, Al, Ag, Cu and the Ni any, or it is combined into alloy material.
6, make the method that comprises the phase transformation memory device unit of interlayer as claimed in claim 2, it is characterized in that the making step of 3. planting structure is:
A) at first, preparation lower electrode layer (100), the method that is adopted is any in sputtering method, evaporation, chemical vapour deposition technique, plasma enhanced chemical vapor deposition method, Low Pressure Chemical Vapor Deposition, metallic compound vapour deposition process, molecular beam epitaxy, atomic vapor deposition method and the atomic layer deposition method; Described lower electrode material is any among monometallic material W, Pt, Au, Ti, Al, Ag, Cu and the Ni, or it is combined into alloy material, or by the nitride or the oxide of described electrode monometallic material;
B) lower electrode layer of making at step a (100) is gone up preparation the 1st elemental metals interlayer (200), and the method that is adopted is any in sputtering method, evaporation, chemical vapour deposition technique, plasma enhanced chemical vapor deposition method, Low Pressure Chemical Vapor Deposition, metallic compound vapour deposition process, molecular beam epitaxy, atomic vapor deposition method and the atomic layer deposition method; Described sandwich material is antimony, tin, silver, bismuth or tellurium simple substance material;
C) the 1st interlayer of making at step b (200) is gone up preparation phase-change material layers (300), and the method that is adopted is any in sputtering method, evaporation, chemical vapour deposition technique, plasma enhanced chemical vapor deposition method, Low Pressure Chemical Vapor Deposition, metallic compound vapour deposition process, molecular beam epitaxy, atomic vapor deposition method and the atomic layer deposition method; Described phase-change material is any in chalcogenide compound, GeSb, SiSb and the metal oxide;
D) then, go up preparation the 2nd interlayer (400) at phase-change material layers (300), the method that is adopted is any in sputtering method, evaporation, chemical vapour deposition technique, plasma enhanced chemical vapor deposition method, Low Pressure Chemical Vapor Deposition, metallic compound vapour deposition process, molecular beam epitaxy, atomic vapor deposition method or the atomic layer deposition method; Described sandwich material is antimony, tin, silver, bismuth or tellurium simple substance material;
E) go up preparation upper electrode layer (500) at the 2nd interlayer (400), the method that is adopted is any in sputtering method, evaporation, chemical vapour deposition technique, plasma enhanced chemical vapor deposition method, Low Pressure Chemical Vapor Deposition, metallic compound vapour deposition process, molecular beam epitaxy, atomic vapor deposition method and the atomic layer deposition method; Described upper electrode material is the monometallic material, any among W, Pt, Au, Ti, Al, Ag, Cu and the Ni, or its alloy material that is combined into, or by the nitride or the oxide of described electrode monometallic material;
F) control switch and the peripheral circuit of upper and lower electrode of at last above-mentioned steps being made that contains the interlayer phase transformation memory device unit and device cell are integrated, prepare the phase transformation memory device unit of nanoscale, the processing method that is adopted is conventional semiconductor technology; As the material of extraction electrode be among W, Pt, Au, Ti, Al, Ag, Cu or the Ni any, or it is combined into alloy material.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106992251A (en) * | 2017-05-12 | 2017-07-28 | 华中科技大学 | One kind is based on VOxThe phase-change memory cell of gate tube |
| CN109065708A (en) * | 2018-07-06 | 2018-12-21 | 东华大学 | A kind of bilayer phase-change material, phase-changing memory unit and preparation method thereof |
| CN113594361A (en) * | 2021-07-27 | 2021-11-02 | 长江先进存储产业创新中心有限责任公司 | Phase change film, phase change memory and operation method of phase change memory |
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2009
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106992251A (en) * | 2017-05-12 | 2017-07-28 | 华中科技大学 | One kind is based on VOxThe phase-change memory cell of gate tube |
| CN106992251B (en) * | 2017-05-12 | 2019-08-30 | 华中科技大学 | One kind being based on VOxThe phase-change memory cell of gate tube |
| CN109065708A (en) * | 2018-07-06 | 2018-12-21 | 东华大学 | A kind of bilayer phase-change material, phase-changing memory unit and preparation method thereof |
| CN113594361A (en) * | 2021-07-27 | 2021-11-02 | 长江先进存储产业创新中心有限责任公司 | Phase change film, phase change memory and operation method of phase change memory |
| CN113594361B (en) * | 2021-07-27 | 2024-05-24 | 长江先进存储产业创新中心有限责任公司 | Phase change film, phase change memory and operation method of phase change memory |
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